Skip to content

Commit b180bbf

Browse files
committed
ggml-cuda: tune D=256 tile flash-attn config for RDNA3.5
With rocWMMA FlashAttention off, D=256 prefill runs on the tile kernel. Add an RDNA3.5 config that overrides the D=256, ncols=32 row with a smaller K tile and higher occupancy (nbatch_K 128->64, occupancy 3->4); other cases fall back to the shared RDNA table. Selection is matched on host (cc) and device (RDNA3_5 macro). Assisted-by: Claude Opus 4 (1M context)
1 parent 4b5ac96 commit b180bbf

1 file changed

Lines changed: 15 additions & 2 deletions

File tree

ggml/src/ggml-cuda/fattn-tile.cuh

Lines changed: 15 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,8 +309,19 @@ static constexpr __host__ __device__ uint32_t ggml_cuda_fattn_tile_get_config_am
309309
return 0;
310310
}
311311

312+
static constexpr __host__ __device__ uint32_t ggml_cuda_fattn_tile_get_config_amd_rdna3_5(const int DKQ, const int DV, const int ncols) {
313+
// With rocWMMA FlashAttention off, D=256 prefill runs on the tile kernel; on RDNA3.5 a smaller
314+
// K tile with higher occupancy is faster than the shared RDNA values. Other cases fall back.
315+
GGML_CUDA_FATTN_TILE_CONFIG_CASE(256, 256, 32, 256, 4, 64, 64)
316+
317+
return ggml_cuda_fattn_tile_get_config_amd_rdna(DKQ, DV, ncols);
318+
}
319+
312320
static __host__ uint32_t ggml_cuda_fattn_tile_get_config(const int DKQ, const int DV, const int ncols, const int cc) {
313321
if (GGML_CUDA_CC_IS_AMD(cc)) {
322+
if (GGML_CUDA_CC_IS_RDNA3_5(cc)) {
323+
return ggml_cuda_fattn_tile_get_config_amd_rdna3_5(DKQ, DV, ncols);
324+
}
314325
if (GGML_CUDA_CC_IS_RDNA(cc)) {
315326
return ggml_cuda_fattn_tile_get_config_amd_rdna(DKQ, DV, ncols);
316327
}
@@ -324,11 +335,13 @@ static __host__ uint32_t ggml_cuda_fattn_tile_get_config(const int DKQ, const in
324335

325336
static constexpr __device__ uint32_t ggml_cuda_fattn_tile_get_config(const int DKQ, const int DV, const int ncols) {
326337
#ifdef GGML_USE_HIP
327-
#ifdef RDNA
338+
#ifdef RDNA3_5
339+
return ggml_cuda_fattn_tile_get_config_amd_rdna3_5(DKQ, DV, ncols);
340+
#elif defined(RDNA)
328341
return ggml_cuda_fattn_tile_get_config_amd_rdna(DKQ, DV, ncols);
329342
#else
330343
return ggml_cuda_fattn_tile_get_config_amd(DKQ, DV, ncols);
331-
#endif // RDNA
344+
#endif // RDNA3_5
332345
#else
333346
#ifdef FAST_FP16_AVAILABLE
334347
return ggml_cuda_fattn_tile_get_config_nvidia_fp16(DKQ, DV, ncols);

0 commit comments

Comments
 (0)