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Default.ucf
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## =============================================================================================================================================================
## Xilinx User Constraint File (UCF)
## =============================================================================================================================================================
## Board: Digilent - Atlys - Spartan-6 LX45
## FPGA: Xilinx Spartan-6
## Device: XC6SLX45
## Package: CSG324
## Speedgrade: -3
##
## Notes:
## VCCB2 (Bank2) is defaulted to 2.5V (choices: 2.5V, 3.3V) by jumper JP12
##
## =============================================================================================================================================================
## Miscellaneous
## =============================================================================================================================================================
CONFIG PART = XC6SLX45-CSG324-3;