forked from VLSI-EDA/PoC
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathGPIO.Switch.ucf
22 lines (21 loc) · 1.52 KB
/
GPIO.Switch.ucf
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
## =============================================================================================================================================================
## General Purpose I/O
## =============================================================================================================================================================
##
## DIP-Switches
## =============================================================================
## Bank: 13
## VCCO: 1,8V (VCC1V8_FPGA)
## Location: SW2
## -----------------------------------------------------------------------------
NET "VC707_GPIO_Switches<0>" LOC = "AV30"; ## SW2.1; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<1>" LOC = "AY33"; ## SW2.2; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<2>" LOC = "BA31"; ## SW2.3; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<3>" LOC = "BA32"; ## SW2.4; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<4>" LOC = "AW30"; ## SW2.5; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<5>" LOC = "AY30"; ## SW2.6; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<6>" LOC = "BA30"; ## SW2.7; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<7>" LOC = "BB31"; ## SW2.8; high-active; external 4k7 pulldown resistor
NET "VC707_GPIO_Switches<?>" IOSTANDARD = LVCMOS18;
## Ignore timings on async I/O pins
NET "VC707_GPIO_Switches<?>" TIG;