Skip to content

Commit 8e07f57

Browse files
jakubcabaljakubcabal
committed
Merge branch 'valek-feat-fb2cghh_net_mod_disable' into 'devel'
feat(fb2cghh): add option to disable Network module See merge request ndk/ndk-fpga!321
2 parents ef2e737 + 1892961 commit 8e07f57

File tree

4 files changed

+55
-28
lines changed

4 files changed

+55
-28
lines changed

‎cards/silicom/fb2cghh/constr/qsfp_disconnect.xdc‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
# qsfp_disconnect.xdc
2+
# Copyright (C) 2024 CESNET z.s.p.o.
3+
# Author(s): Jakub Cabal <[email protected]>
4+
#
5+
# SPDX-License-Identifier: BSD-3-Clause
6+
7+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP0_TX_P[*]}]
8+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP0_TX_N[*]}]
9+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP1_TX_P[*]}]
10+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP1_TX_N[*]}]
11+
12+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP?_LPMODE}]
13+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP?_RESET_N}]
14+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP?_SCL}]
15+
set_property IO_BUFFER_TYPE NONE [get_ports {QSFP?_SDA}]

‎cards/silicom/fb2cghh/src/Modules.tcl‎

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -35,14 +35,16 @@ set ARCHGRP_ARR(USE_IP_SUBDIRS) true
3535
# script_path script_name ip_comp_name type modify
3636
lappend IP_COMPONENTS [list "mem" "axi_quad_spi_0" "axi_quad_spi_0" 0 1]
3737

38-
if {$ARCHGRP_ARR(NET_MOD_ARCH) eq "40GE"} {
39-
lappend IP_COMPONENTS [list "eth" "gty_40ge" "gty_40ge" 0 1]
40-
} elseif { $ARCHGRP_ARR(NET_MOD_ARCH) eq "25G4" } {
41-
lappend IP_COMPONENTS [list "eth" "pcs_pma_4x25g" "twenty_five_gig_eth_pcspma" 0 1]
42-
} elseif { $ARCHGRP_ARR(NET_MOD_ARCH) eq "10G4" } {
43-
lappend IP_COMPONENTS [list "eth" "pcs_pma_4x10g" "ten_gig_eth_pcspma" 0 1]
44-
} else {
45-
lappend IP_COMPONENTS [list "eth" "cmac_eth_1x100g" "cmac_eth_1x100g" 0 1]
38+
if {$ARCHGRP_ARR(NET_MOD_ARCH) != "EMPTY"} {
39+
if {$ARCHGRP_ARR(NET_MOD_ARCH) eq "40GE"} {
40+
lappend IP_COMPONENTS [list "eth" "gty_40ge" "gty_40ge" 0 1]
41+
} elseif { $ARCHGRP_ARR(NET_MOD_ARCH) eq "25G4" } {
42+
lappend IP_COMPONENTS [list "eth" "pcs_pma_4x25g" "twenty_five_gig_eth_pcspma" 0 1]
43+
} elseif { $ARCHGRP_ARR(NET_MOD_ARCH) eq "10G4" } {
44+
lappend IP_COMPONENTS [list "eth" "pcs_pma_4x10g" "ten_gig_eth_pcspma" 0 1]
45+
} else {
46+
lappend IP_COMPONENTS [list "eth" "cmac_eth_1x100g" "cmac_eth_1x100g" 0 1]
47+
}
4648
}
4749

4850
if {$ARCHGRP_ARR(MEM_PORTS) > 0} {

‎cards/silicom/fb2cghh/src/Vivado.inc.tcl‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,16 @@ lappend HIERARCHY(COMPONENTS) [list "TOPLEVEL" $CARD_BASE/src $ARCHGRP_ALL]
4646
# XDC constraints for specific parts of the design
4747
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/general.xdc"
4848
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/pcie.xdc"
49-
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/qsfp.xdc"
50-
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/qsfp_loc.xdc"
49+
50+
if {$NET_MOD_ARCH != "EMPTY"} {
51+
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/qsfp.xdc"
52+
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/qsfp_loc.xdc"
53+
} else {
54+
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/qsfp_disconnect.xdc"
55+
}
56+
57+
# if {$MEM_PORTS > 0} {
5158
lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/ddr4.xdc"
59+
# } else {
60+
# lappend SYNTH_FLAGS(CONSTR) "$CARD_BASE/constr/ddr_disconnect.xdc"
61+
# }

‎cards/silicom/fb2cghh/src/fpga.vhd‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -787,24 +787,24 @@ begin
787787
eth_rx_p <= QSFP1_RX_P & QSFP0_RX_P;
788788
eth_rx_n <= QSFP1_RX_N & QSFP0_RX_N;
789789

790-
791-
QSFP1_TX_P <= eth_tx_p(2*ETH_LANES-1 downto 1*ETH_LANES);
792-
QSFP1_TX_N <= eth_tx_n(2*ETH_LANES-1 downto 1*ETH_LANES);
793-
QSFP0_TX_P <= eth_tx_p(1*ETH_LANES-1 downto 0*ETH_LANES);
794-
QSFP0_TX_N <= eth_tx_n(1*ETH_LANES-1 downto 0*ETH_LANES);
795-
796-
797-
QSFP1_LPMODE <= qsfp_lpmode(1);
798-
QSFP1_RESET_N <= qsfp_reset_n(1);
799-
QSFP1_SCL <= qsfp_scl(1);
800-
QSFP1_SDA <= qsfp_sda(1);
801-
QSFP0_LPMODE <= qsfp_lpmode(0);
802-
QSFP0_RESET_N <= qsfp_reset_n(0);
803-
QSFP0_SCL <= qsfp_scl(0);
804-
QSFP0_SDA <= qsfp_sda(0);
805-
806-
qsfp_modprs_n <= QSFP1_MODPRS_N & QSFP0_MODPRS_N;
807-
qsfp_int_n <= QSFP1_INT_N & QSFP0_INT_N;
790+
net_arch_empty_g: if (NET_MOD_ARCH /= "EMPTY") generate
791+
QSFP1_TX_P <= eth_tx_p(2*ETH_LANES-1 downto 1*ETH_LANES);
792+
QSFP1_TX_N <= eth_tx_n(2*ETH_LANES-1 downto 1*ETH_LANES);
793+
QSFP0_TX_P <= eth_tx_p(1*ETH_LANES-1 downto 0*ETH_LANES);
794+
QSFP0_TX_N <= eth_tx_n(1*ETH_LANES-1 downto 0*ETH_LANES);
795+
796+
QSFP1_LPMODE <= qsfp_lpmode(1);
797+
QSFP1_RESET_N <= qsfp_reset_n(1);
798+
QSFP1_SCL <= qsfp_scl(1);
799+
QSFP1_SDA <= qsfp_sda(1);
800+
QSFP0_LPMODE <= qsfp_lpmode(0);
801+
QSFP0_RESET_N <= qsfp_reset_n(0);
802+
QSFP0_SCL <= qsfp_scl(0);
803+
QSFP0_SDA <= qsfp_sda(0);
804+
805+
qsfp_modprs_n <= QSFP1_MODPRS_N & QSFP0_MODPRS_N;
806+
qsfp_int_n <= QSFP1_INT_N & QSFP0_INT_N;
807+
end generate;
808808

809809
axi_spi_clk <= misc_out(0); -- usr_x1 = 100MHz
810810
boot_clk <= misc_out(2); -- usr_x2 = 200MHz

0 commit comments

Comments
 (0)