diff --git a/hugr-llvm/src/emit.rs b/hugr-llvm/src/emit.rs
index c861cbebf..9a048ed58 100644
--- a/hugr-llvm/src/emit.rs
+++ b/hugr-llvm/src/emit.rs
@@ -333,15 +333,11 @@ impl<'c, 'a, H: HugrView<Node = Node>> EmitHugr<'c, 'a, H> {
         }
         let func = self.module_context.get_func_defn(node)?;
         let mut func_ctx = EmitFuncContext::new(self.module_context, func)?;
+        let params_rmb = func_ctx.new_row_mail_box(node.signature.body().input.iter(), "params")?;
+        params_rmb.write(func_ctx.builder(), func.get_params())?;
         let ret_rmb = func_ctx.new_row_mail_box(node.signature.body().output.iter(), "ret")?;
-        ops::emit_dataflow_parent(
-            &mut func_ctx,
-            EmitOpArgs {
-                node,
-                inputs: func.get_params(),
-                outputs: ret_rmb.promise(),
-            },
-        )?;
+        let args = EmitOpArgs::try_new(func_ctx.builder(), node, params_rmb, ret_rmb.promise())?;
+        self::ops::emit_dataflow_parent(&mut func_ctx, args)?;
         let builder = func_ctx.builder();
         match &ret_rmb.read::<Vec<_>>(builder, [])?[..] {
             [] => builder.build_return(None)?,
diff --git a/hugr-llvm/src/emit/args.rs b/hugr-llvm/src/emit/args.rs
index 6852a3365..5d5cac437 100644
--- a/hugr-llvm/src/emit/args.rs
+++ b/hugr-llvm/src/emit/args.rs
@@ -1,9 +1,13 @@
+use anyhow::Result;
 use hugr_core::{ops::OpType, HugrView, Node};
-use inkwell::values::BasicValueEnum;
+use inkwell::{
+    builder::Builder,
+    values::{BasicValueEnum, PointerValue},
+};
 
 use crate::utils::fat::FatNode;
 
-use super::func::RowPromise;
+use super::func::{RowMailBox, RowPromise};
 
 /// A type used whenever emission is delegated to a function, for example in
 /// [crate::custom::extension_op::ExtensionOpMap::emit_extension_op].
@@ -14,13 +18,38 @@ pub struct EmitOpArgs<'c, 'hugr, OT, H> {
     pub inputs: Vec<BasicValueEnum<'c>>,
     /// The results of the node should be put here
     pub outputs: RowPromise<'c>,
+
+    input_mailbox: RowMailBox<'c>,
 }
 
-impl<'hugr, OT, H> EmitOpArgs<'_, 'hugr, OT, H> {
+impl<'c, 'hugr, OT, H> EmitOpArgs<'c, 'hugr, OT, H> {
+    pub fn try_new(
+        builder: &Builder<'c>,
+        node: FatNode<'hugr, OT, H>,
+        input_mailbox: RowMailBox<'c>,
+        outputs: RowPromise<'c>,
+    ) -> Result<Self> {
+        let inputs = input_mailbox.read_vec(builder, [])?;
+        Ok(Self {
+            node,
+            inputs,
+            outputs,
+            input_mailbox,
+        })
+    }
+
     /// Get the internal [FatNode]
     pub fn node(&self) -> FatNode<'hugr, OT, H> {
         self.node
     }
+
+    pub fn input_alloca(&self, i: usize) -> PointerValue<'c> {
+        self.input_mailbox[i].alloca()
+    }
+
+    pub fn output_alloca(&self, i: usize) -> PointerValue<'c> {
+        self.outputs[i].alloca()
+    }
 }
 
 impl<'c, 'hugr, H: HugrView<Node = Node>> EmitOpArgs<'c, 'hugr, OpType, H> {
@@ -33,17 +62,20 @@ impl<'c, 'hugr, H: HugrView<Node = Node>> EmitOpArgs<'c, 'hugr, OpType, H> {
             node,
             inputs,
             outputs,
+            input_mailbox,
         } = self;
         match node.try_into_ot() {
             Some(new_node) => Ok(EmitOpArgs {
                 node: new_node,
                 inputs,
                 outputs,
+                input_mailbox,
             }),
             None => Err(EmitOpArgs {
                 node,
                 inputs,
                 outputs,
+                input_mailbox,
             }),
         }
     }
@@ -60,11 +92,13 @@ impl<'c, 'hugr, H: HugrView<Node = Node>> EmitOpArgs<'c, 'hugr, OpType, H> {
             node,
             inputs,
             outputs,
+            input_mailbox,
         } = self;
         EmitOpArgs {
             node: node.into_ot(ot),
             inputs,
             outputs,
+            input_mailbox,
         }
     }
 }
diff --git a/hugr-llvm/src/emit/func.rs b/hugr-llvm/src/emit/func.rs
index cdaae71c7..7ffa4f444 100644
--- a/hugr-llvm/src/emit/func.rs
+++ b/hugr-llvm/src/emit/func.rs
@@ -196,7 +196,7 @@ impl<'c, 'a, H: HugrView<Node = Node>> EmitFuncContext<'c, 'a, H> {
         ))
     }
 
-    fn build_prologue<T>(&mut self, f: impl FnOnce(&Builder<'c>) -> T) -> T {
+    pub(crate) fn build_prologue<T>(&mut self, f: impl FnOnce(&Builder<'c>) -> T) -> T {
         let b = self.prologue_block();
         self.build_positioned(b, |x| f(&x.builder))
     }
diff --git a/hugr-llvm/src/emit/func/mailbox.rs b/hugr-llvm/src/emit/func/mailbox.rs
index 5dc25fb29..d0b9a1da6 100644
--- a/hugr-llvm/src/emit/func/mailbox.rs
+++ b/hugr-llvm/src/emit/func/mailbox.rs
@@ -1,4 +1,4 @@
-use std::{borrow::Cow, rc::Rc};
+use std::{borrow::Cow, ops, rc::Rc};
 
 use anyhow::{bail, Result};
 use delegate::delegate;
@@ -48,6 +48,10 @@ impl<'c> ValueMailBox<'c> {
         ValuePromise(self.clone())
     }
 
+    pub fn alloca(&self) -> PointerValue<'c> {
+        self.ptr
+    }
+
     pub fn read<'a>(
         &'a self,
         builder: &Builder<'c>,
@@ -175,6 +179,14 @@ impl<'c> FromIterator<ValueMailBox<'c>> for RowMailBox<'c> {
     }
 }
 
+impl<'c> ops::Index<usize> for RowMailBox<'c> {
+    type Output = ValueMailBox<'c>;
+
+    fn index(&self, index: usize) -> &Self::Output {
+        &self.0[index]
+    }
+}
+
 /// A promise to write values into a `RowMailBox`
 #[must_use]
 #[allow(clippy::len_without_is_empty)]
@@ -199,3 +211,11 @@ impl<'c> RowPromise<'c> {
         }
     }
 }
+
+impl<'c> ops::Index<usize> for RowPromise<'c> {
+    type Output = ValueMailBox<'c>;
+
+    fn index(&self, index: usize) -> &Self::Output {
+        &self.0[index]
+    }
+}
diff --git a/hugr-llvm/src/emit/ops.rs b/hugr-llvm/src/emit/ops.rs
index 9cb6f9b10..dc12edd6f 100644
--- a/hugr-llvm/src/emit/ops.rs
+++ b/hugr-llvm/src/emit/ops.rs
@@ -78,7 +78,7 @@ where
             .map(|x| node.hugr().fat_optype(x))
             .try_for_each(|node| {
                 let inputs_rmb = context.node_ins_rmb(node)?;
-                let inputs = inputs_rmb.read(context.builder(), [])?;
+                let inputs = inputs_rmb.read_vec(context.builder(), [])?;
                 let outputs = context.node_outs_rmb(node)?.promise();
                 match node.as_ref() {
                     OpType::Input(_) => {
@@ -89,14 +89,11 @@ where
                         let o = self.take_output()?;
                         o.finish(context.builder(), inputs)
                     }
-                    _ => emit_optype(
-                        context,
-                        EmitOpArgs {
-                            node,
-                            inputs,
-                            outputs,
-                        },
-                    ),
+                    _ => {
+                        let args =
+                            EmitOpArgs::try_new(context.builder(), node, inputs_rmb, outputs)?;
+                        emit_optype(context, args)
+                    }
                 }
             })
     }
@@ -166,21 +163,21 @@ fn emit_tag<'c, H: HugrView<Node = Node>>(
 
 fn emit_conditional<'c, H: HugrView<Node = Node>>(
     context: &mut EmitFuncContext<'c, '_, H>,
-    EmitOpArgs {
-        node,
-        inputs,
-        outputs,
-    }: EmitOpArgs<'c, '_, Conditional, H>,
+    args: EmitOpArgs<'c, '_, Conditional, H>,
 ) -> Result<()> {
-    let exit_rmb =
-        context.new_row_mail_box(node.dataflow_signature().unwrap().output.iter(), "exit_rmb")?;
+    let node = args.node();
+    let exit_rmb = context.new_row_mail_box(
+        args.node().dataflow_signature().unwrap().output.iter(),
+        "exit_rmb",
+    )?;
     let exit_block = context.build_positioned_new_block(
         format!("cond_exit_{}", node.node().index()),
         None,
         |context, bb| {
             let builder = context.builder();
-            outputs.finish(builder, exit_rmb.read_vec(builder, [])?)?;
-            Ok::<_, anyhow::Error>(bb)
+            args.outputs
+                .finish(builder, exit_rmb.read_vec(builder, [])?)?;
+            anyhow::Ok(bb)
         },
     )?;
 
@@ -192,15 +189,9 @@ fn emit_conditional<'c, H: HugrView<Node = Node>>(
             let node = n.try_into_ot::<Case>().ok_or(anyhow!("not a case node"))?;
             let rmb = context.new_row_mail_box(node.get_io().unwrap().0.types.iter(), &label)?;
             context.build_positioned_new_block(&label, Some(exit_block), |context, bb| {
-                let inputs = rmb.read_vec(context.builder(), [])?;
-                emit_dataflow_parent(
-                    context,
-                    EmitOpArgs {
-                        node,
-                        inputs,
-                        outputs: exit_rmb.promise(),
-                    },
-                )?;
+                let args =
+                    EmitOpArgs::try_new(context.builder(), n, rmb.clone(), exit_rmb.promise())?;
+                emit_dataflow_parent(context, args)?;
                 context.builder().build_unconditional_branch(exit_block)?;
                 Ok((rmb, bb))
             })
@@ -208,11 +199,11 @@ fn emit_conditional<'c, H: HugrView<Node = Node>>(
         .collect::<Result<Vec<_>>>()?;
 
     let sum_type = get_exactly_one_sum_type(node.in_value_types().next().map(|x| x.1))?;
-    let sum_input = LLVMSumValue::try_new(inputs[0], context.llvm_sum_type(sum_type)?)?;
+    let sum_input = LLVMSumValue::try_new(args.inputs[0], context.llvm_sum_type(sum_type)?)?;
     let builder = context.builder();
     sum_input.build_destructure(builder, |builder, tag, mut vs| {
         let (rmb, bb) = &rmbs_blocks[tag];
-        vs.extend(&inputs[1..]);
+        vs.extend(&args.inputs[1..]);
         rmb.write(builder, vs)?;
         builder.build_unconditional_branch(*bb)?;
         Ok(())
@@ -330,15 +321,13 @@ fn emit_tail_loop<'c, H: HugrView<Node = Node>>(
     };
 
     context.build_positioned(body_bb, move |context| {
-        let inputs = body_i_rmb.read_vec(context.builder(), [])?;
-        emit_dataflow_parent(
-            context,
-            EmitOpArgs {
-                node,
-                inputs,
-                outputs: body_o_rmb.promise(),
-            },
+        let body_args = EmitOpArgs::try_new(
+            context.builder(),
+            node,
+            body_i_rmb.clone(),
+            body_o_rmb.promise(),
         )?;
+        emit_dataflow_parent(context, body_args)?;
         let dataflow_outputs = body_o_rmb.read_vec(context.builder(), [])?;
         let control_val = LLVMSumValue::try_new(dataflow_outputs[0], control_llvm_sum_type)?;
         let mut outputs = Some(args.outputs);
@@ -367,7 +356,6 @@ fn emit_optype<'c, H: HugrView<Node = Node>>(
     match node.as_ref() {
         OpType::Tag(ref tag) => emit_tag(context, args.into_ot(tag)),
         OpType::DFG(_) => emit_dataflow_parent(context, args),
-
         OpType::ExtensionOp(ref co) => context.emit_extension_op(args.into_ot(co)),
         OpType::LoadConstant(ref lc) => emit_load_constant(context, args.into_ot(lc)),
         OpType::Call(ref cl) => emit_call(context, args.into_ot(cl)),
diff --git a/hugr-llvm/src/emit/ops/cfg.rs b/hugr-llvm/src/emit/ops/cfg.rs
index ce0840254..317164f93 100644
--- a/hugr-llvm/src/emit/ops/cfg.rs
+++ b/hugr-llvm/src/emit/ops/cfg.rs
@@ -107,23 +107,25 @@ impl<'c, 'hugr, H: HugrView<Node = Node>> CfgEmitter<'c, 'hugr, H> {
 
         // emit each child by delegating to the `impl EmitOp<_>` of self.
         for child_node in self.node.children() {
-            let (inputs, outputs) = (vec![], RowMailBox::new_empty().promise());
+            let (inputs, outputs) = (RowMailBox::new_empty(), RowMailBox::new_empty().promise());
             match child_node.as_ref() {
                 OpType::DataflowBlock(ref dfb) => self.emit_dataflow_block(
                     context,
-                    EmitOpArgs {
-                        node: child_node.into_ot(dfb),
+                    EmitOpArgs::try_new(
+                        context.builder(),
+                        child_node.into_ot(dfb),
                         inputs,
                         outputs,
-                    },
+                    )?,
                 ),
                 OpType::ExitBlock(ref eb) => self.emit_exit_block(
                     context,
-                    EmitOpArgs {
-                        node: child_node.into_ot(eb),
+                    EmitOpArgs::try_new(
+                        context.builder(),
+                        child_node.into_ot(eb),
                         inputs,
                         outputs,
-                    },
+                    )?,
                 ),
 
                 // Const is allowed, but requires no work here. FuncDecl is
@@ -147,36 +149,32 @@ impl<'c, 'hugr, H: HugrView<Node = Node>> CfgEmitter<'c, 'hugr, H> {
     fn emit_dataflow_block(
         &mut self,
         context: &mut EmitFuncContext<'c, '_, H>,
-        EmitOpArgs {
-            node,
-            inputs: _,
-            outputs: _,
-        }: EmitOpArgs<'c, 'hugr, DataflowBlock, H>,
+        args: EmitOpArgs<'c, 'hugr, DataflowBlock, H>,
     ) -> Result<()> {
+        let node = args.node();
+
         // our entry basic block and our input RowMailBox
-        let (bb, inputs_rmb) = self.get_block_data(&node)?;
+        let (bb, inputs_rmb) = self.get_block_data(&args.node())?;
         // the basic block and mailbox of each of our successors
-        let successor_data = node
+        let successor_data = args
+            .node()
             .output_neighbours()
             .map(|succ| self.get_block_data(&succ))
             .collect::<Result<Vec<_>>>()?;
 
         context.build_positioned(bb, |context| {
-            let (_, o) = node.get_io().unwrap();
+            let (_, o) = args.node().get_io().unwrap();
             // get the rowmailbox for our output node
             let outputs_rmb = context.node_ins_rmb(o)?;
-            // read the values from our input node
-            let inputs = inputs_rmb.read_vec(context.builder(), [])?;
 
             // emit all our children and read the values from the rowmailbox of our output node
-            emit_dataflow_parent(
-                context,
-                EmitOpArgs {
-                    node,
-                    inputs,
-                    outputs: outputs_rmb.promise(),
-                },
+            let args = EmitOpArgs::try_new(
+                context.builder(),
+                args.node,
+                inputs_rmb,
+                outputs_rmb.promise(),
             )?;
+            emit_dataflow_parent(context, args)?;
             let outputs = outputs_rmb.read_vec(context.builder(), [])?;
 
             // We create a helper block per-tag. We switch to the helper block,
diff --git a/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__diverse_outputs@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__diverse_outputs@pre-mem2reg@llvm14.snap
index b0b14601d..7f23ae9f5 100644
--- a/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__diverse_outputs@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__diverse_outputs@pre-mem2reg@llvm14.snap
@@ -8,12 +8,14 @@ source_filename = "test_context"
 define i8 @_hl.main.1(i8 %0, i8 %1) {
 alloca_block:
   %"0" = alloca i8, align 1
+  %"1" = alloca i8, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i8, align 1
   %"2_1" = alloca i8, align 1
   %"4_0" = alloca i8, align 1
   %"7_0" = alloca i8, align 1
   %"7_1" = alloca i8, align 1
-  %"03" = alloca i8, align 1
+  %"08" = alloca i8, align 1
   %"11_0" = alloca i8, align 1
   %"11_1" = alloca i8, align 1
   %"9_0" = alloca { i8, i8 }, align 8
@@ -21,71 +23,80 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  store i8 %1, i8* %"2_1", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %"2_12" = load i8, i8* %"2_1", align 1
-  store i8 %"2_01", i8* %"7_0", align 1
-  store i8 %"2_12", i8* %"7_1", align 1
+  store i8 %0, i8* %"0", align 1
+  store i8 %1, i8* %"1", align 1
+  %"02" = load i8, i8* %"0", align 1
+  %"13" = load i8, i8* %"1", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  store i8 %"13", i8* %"2_1", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %"2_15" = load i8, i8* %"2_1", align 1
+  %"2_06" = load i8, i8* %"2_0", align 1
+  %"2_17" = load i8, i8* %"2_1", align 1
+  store i8 %"2_06", i8* %"7_0", align 1
+  store i8 %"2_17", i8* %"7_1", align 1
   br label %2
 
 2:                                                ; preds = %11, %entry_block
-  %"7_04" = load i8, i8* %"7_0", align 1
-  %"7_15" = load i8, i8* %"7_1", align 1
-  store i8 %"7_04", i8* %"7_0", align 1
-  store i8 %"7_15", i8* %"7_1", align 1
-  %"7_06" = load i8, i8* %"7_0", align 1
-  %"7_17" = load i8, i8* %"7_1", align 1
-  %3 = insertvalue { i8, i8 } poison, i8 %"7_06", 0
-  %4 = insertvalue { i8, i8 } %3, i8 %"7_17", 1
+  %"7_09" = load i8, i8* %"7_0", align 1
+  %"7_110" = load i8, i8* %"7_1", align 1
+  store i8 %"7_09", i8* %"7_0", align 1
+  store i8 %"7_110", i8* %"7_1", align 1
+  %"7_011" = load i8, i8* %"7_0", align 1
+  %"7_112" = load i8, i8* %"7_1", align 1
+  %"7_013" = load i8, i8* %"7_0", align 1
+  %"7_114" = load i8, i8* %"7_1", align 1
+  %3 = insertvalue { i8, i8 } poison, i8 %"7_013", 0
+  %4 = insertvalue { i8, i8 } %3, i8 %"7_114", 1
   store { i8, i8 } %4, { i8, i8 }* %"9_0", align 1
-  %"9_08" = load { i8, i8 }, { i8, i8 }* %"9_0", align 1
-  store { i8, i8 } %"9_08", { i8, i8 }* %"9_0", align 1
-  %"9_09" = load { i8, i8 }, { i8, i8 }* %"9_0", align 1
+  %"9_015" = load { i8, i8 }, { i8, i8 }* %"9_0", align 1
+  store { i8, i8 } %"9_015", { i8, i8 }* %"9_0", align 1
+  %"9_016" = load { i8, i8 }, { i8, i8 }* %"9_0", align 1
   switch i1 false, label %5 [
   ]
 
 5:                                                ; preds = %2
-  %6 = extractvalue { i8, i8 } %"9_09", 0
-  %7 = extractvalue { i8, i8 } %"9_09", 1
+  %6 = extractvalue { i8, i8 } %"9_016", 0
+  %7 = extractvalue { i8, i8 } %"9_016", 1
   store i8 %6, i8* %"11_0", align 1
   store i8 %7, i8* %"11_1", align 1
   br label %8
 
 8:                                                ; preds = %5
-  %"11_011" = load i8, i8* %"11_0", align 1
-  %"11_112" = load i8, i8* %"11_1", align 1
-  store i8 %"11_011", i8* %"11_0", align 1
-  store i8 %"11_112", i8* %"11_1", align 1
-  %"11_013" = load i8, i8* %"11_0", align 1
-  %9 = insertvalue { i1, i8 } { i1 false, i8 poison }, i8 %"11_013", 1
+  %"11_018" = load i8, i8* %"11_0", align 1
+  %"11_119" = load i8, i8* %"11_1", align 1
+  store i8 %"11_018", i8* %"11_0", align 1
+  store i8 %"11_119", i8* %"11_1", align 1
+  %"11_020" = load i8, i8* %"11_0", align 1
+  %"11_021" = load i8, i8* %"11_0", align 1
+  %9 = insertvalue { i1, i8 } { i1 false, i8 poison }, i8 %"11_021", 1
   store { i1, i8 } %9, { i1, i8 }* %"13_0", align 1
-  %"13_014" = load { i1, i8 }, { i1, i8 }* %"13_0", align 1
-  %"11_115" = load i8, i8* %"11_1", align 1
-  store { i1, i8 } %"13_014", { i1, i8 }* %"13_0", align 1
-  store i8 %"11_115", i8* %"11_1", align 1
-  %"13_016" = load { i1, i8 }, { i1, i8 }* %"13_0", align 1
-  %"11_117" = load i8, i8* %"11_1", align 1
-  %10 = extractvalue { i1, i8 } %"13_016", 0
+  %"13_022" = load { i1, i8 }, { i1, i8 }* %"13_0", align 1
+  %"11_123" = load i8, i8* %"11_1", align 1
+  store { i1, i8 } %"13_022", { i1, i8 }* %"13_0", align 1
+  store i8 %"11_123", i8* %"11_1", align 1
+  %"13_024" = load { i1, i8 }, { i1, i8 }* %"13_0", align 1
+  %"11_125" = load i8, i8* %"11_1", align 1
+  %10 = extractvalue { i1, i8 } %"13_024", 0
   switch i1 %10, label %11 [
     i1 true, label %13
   ]
 
 11:                                               ; preds = %8
-  %12 = extractvalue { i1, i8 } %"13_016", 1
+  %12 = extractvalue { i1, i8 } %"13_024", 1
   store i8 %12, i8* %"7_0", align 1
-  store i8 %"11_117", i8* %"7_1", align 1
+  store i8 %"11_125", i8* %"7_1", align 1
   br label %2
 
 13:                                               ; preds = %8
-  store i8 %"11_117", i8* %"03", align 1
+  store i8 %"11_125", i8* %"08", align 1
   br label %14
 
 14:                                               ; preds = %13
-  %"010" = load i8, i8* %"03", align 1
-  store i8 %"010", i8* %"4_0", align 1
-  %"4_018" = load i8, i8* %"4_0", align 1
-  store i8 %"4_018", i8* %"0", align 1
-  %"019" = load i8, i8* %"0", align 1
-  ret i8 %"019"
+  %"017" = load i8, i8* %"08", align 1
+  store i8 %"017", i8* %"4_0", align 1
+  %"4_026" = load i8, i8* %"4_0", align 1
+  store i8 %"4_026", i8* %"01", align 1
+  %"027" = load i8, i8* %"01", align 1
+  ret i8 %"027"
 }
diff --git a/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@llvm14.snap b/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@llvm14.snap
index 52d8aca1b..6b25bdef8 100644
--- a/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@llvm14.snap
+++ b/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@llvm14.snap
@@ -30,8 +30,8 @@ entry_block:                                      ; preds = %alloca_block
   br label %7
 
 7:                                                ; preds = %6, %4
-  %"03.0" = phi i1 [ true, %4 ], [ false, %6 ]
-  ret i1 %"03.0"
+  %"08.0" = phi i1 [ true, %4 ], [ false, %6 ]
+  ret i1 %"08.0"
 
 8:                                                ; preds = %2
   switch i2 %0, label %9 [
@@ -70,8 +70,8 @@ entry_block:                                      ; preds = %alloca_block
   br label %18
 
 18:                                               ; preds = %17, %15, %13
-  %"06.0" = phi i1 [ true, %13 ], [ %1, %17 ], [ false, %15 ]
-  switch i1 %"06.0", label %19 [
+  %"011.0" = phi i1 [ true, %13 ], [ %1, %17 ], [ false, %15 ]
+  switch i1 %"011.0", label %19 [
     i1 true, label %20
   ]
 
diff --git a/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@pre-mem2reg@llvm14.snap
index 8fbf629ae..c7e0540af 100644
--- a/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/ops/snapshots/hugr_llvm__emit__ops__cfg__test__nested@pre-mem2reg@llvm14.snap
@@ -7,16 +7,18 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(i2 %0, i1 %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca i2, align 1
+  %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"5_0" = alloca {}, align 8
   %"2_0" = alloca i2, align 1
   %"2_1" = alloca i1, align 1
   %"6_0" = alloca i1, align 1
   %"9_0" = alloca i2, align 1
   %"9_1" = alloca i1, align 1
-  %"03" = alloca i1, align 1
+  %"08" = alloca i1, align 1
   %"11_0" = alloca i1, align 1
-  %"06" = alloca i1, align 1
+  %"011" = alloca i1, align 1
   %"20_0" = alloca i1, align 1
   %"25_0" = alloca i1, align 1
   %"39_0" = alloca i1, align 1
@@ -24,65 +26,71 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
+  store i2 %0, i2* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"02" = load i2, i2* %"0", align 1
+  %"13" = load i1, i1* %"1", align 1
   store {} undef, {}* %"5_0", align 1
-  store i2 %0, i2* %"2_0", align 1
-  store i1 %1, i1* %"2_1", align 1
-  %"2_01" = load i2, i2* %"2_0", align 1
-  %"2_12" = load i1, i1* %"2_1", align 1
-  store i2 %"2_01", i2* %"9_0", align 1
-  store i1 %"2_12", i1* %"9_1", align 1
+  store i2 %"02", i2* %"2_0", align 1
+  store i1 %"13", i1* %"2_1", align 1
+  %"2_04" = load i2, i2* %"2_0", align 1
+  %"2_15" = load i1, i1* %"2_1", align 1
+  %"2_06" = load i2, i2* %"2_0", align 1
+  %"2_17" = load i1, i1* %"2_1", align 1
+  store i2 %"2_06", i2* %"9_0", align 1
+  store i1 %"2_17", i1* %"9_1", align 1
   br label %2
 
 2:                                                ; preds = %entry_block
-  %"9_04" = load i2, i2* %"9_0", align 1
-  %"9_15" = load i1, i1* %"9_1", align 1
-  store i2 %"9_04", i2* %"9_0", align 1
-  store i1 %"9_15", i1* %"9_1", align 1
+  %"9_09" = load i2, i2* %"9_0", align 1
+  %"9_110" = load i1, i1* %"9_1", align 1
+  store i2 %"9_09", i2* %"9_0", align 1
+  store i1 %"9_110", i1* %"9_1", align 1
   br label %8
 
 3:                                                ; preds = %19
   store i1 true, i1* %"39_0", align 1
-  %"5_025" = load {}, {}* %"5_0", align 1
-  %"39_026" = load i1, i1* %"39_0", align 1
-  store {} %"5_025", {}* %"5_0", align 1
-  store i1 %"39_026", i1* %"39_0", align 1
-  %"5_027" = load {}, {}* %"5_0", align 1
-  %"39_028" = load i1, i1* %"39_0", align 1
+  %"5_030" = load {}, {}* %"5_0", align 1
+  %"39_031" = load i1, i1* %"39_0", align 1
+  store {} %"5_030", {}* %"5_0", align 1
+  store i1 %"39_031", i1* %"39_0", align 1
+  %"5_032" = load {}, {}* %"5_0", align 1
+  %"39_033" = load i1, i1* %"39_0", align 1
   switch i1 false, label %4 [
   ]
 
 4:                                                ; preds = %3
-  store i1 %"39_028", i1* %"03", align 1
+  store i1 %"39_033", i1* %"08", align 1
   br label %7
 
 5:                                                ; preds = %20
   store i1 false, i1* %"44_0", align 1
-  %"5_029" = load {}, {}* %"5_0", align 1
-  %"44_030" = load i1, i1* %"44_0", align 1
-  store {} %"5_029", {}* %"5_0", align 1
-  store i1 %"44_030", i1* %"44_0", align 1
-  %"5_031" = load {}, {}* %"5_0", align 1
-  %"44_032" = load i1, i1* %"44_0", align 1
+  %"5_034" = load {}, {}* %"5_0", align 1
+  %"44_035" = load i1, i1* %"44_0", align 1
+  store {} %"5_034", {}* %"5_0", align 1
+  store i1 %"44_035", i1* %"44_0", align 1
+  %"5_036" = load {}, {}* %"5_0", align 1
+  %"44_037" = load i1, i1* %"44_0", align 1
   switch i1 false, label %6 [
   ]
 
 6:                                                ; preds = %5
-  store i1 %"44_032", i1* %"03", align 1
+  store i1 %"44_037", i1* %"08", align 1
   br label %7
 
 7:                                                ; preds = %6, %4
-  %"024" = load i1, i1* %"03", align 1
-  store i1 %"024", i1* %"6_0", align 1
-  %"6_033" = load i1, i1* %"6_0", align 1
-  store i1 %"6_033", i1* %"0", align 1
-  %"034" = load i1, i1* %"0", align 1
-  ret i1 %"034"
+  %"029" = load i1, i1* %"08", align 1
+  store i1 %"029", i1* %"6_0", align 1
+  %"6_038" = load i1, i1* %"6_0", align 1
+  store i1 %"6_038", i1* %"01", align 1
+  %"039" = load i1, i1* %"01", align 1
+  ret i1 %"039"
 
 8:                                                ; preds = %2
-  %"9_07" = load i2, i2* %"9_0", align 1
-  store i2 %"9_07", i2* %"9_0", align 1
-  %"9_08" = load i2, i2* %"9_0", align 1
-  switch i2 %"9_08", label %9 [
+  %"9_012" = load i2, i2* %"9_0", align 1
+  store i2 %"9_012", i2* %"9_0", align 1
+  %"9_013" = load i2, i2* %"9_0", align 1
+  switch i2 %"9_013", label %9 [
     i2 1, label %10
     i2 -2, label %11
   ]
@@ -98,55 +106,55 @@ entry_block:                                      ; preds = %alloca_block
 
 12:                                               ; preds = %9
   store i1 true, i1* %"20_0", align 1
-  %"5_010" = load {}, {}* %"5_0", align 1
-  %"20_011" = load i1, i1* %"20_0", align 1
-  store {} %"5_010", {}* %"5_0", align 1
-  store i1 %"20_011", i1* %"20_0", align 1
-  %"5_012" = load {}, {}* %"5_0", align 1
-  %"20_013" = load i1, i1* %"20_0", align 1
+  %"5_015" = load {}, {}* %"5_0", align 1
+  %"20_016" = load i1, i1* %"20_0", align 1
+  store {} %"5_015", {}* %"5_0", align 1
+  store i1 %"20_016", i1* %"20_0", align 1
+  %"5_017" = load {}, {}* %"5_0", align 1
+  %"20_018" = load i1, i1* %"20_0", align 1
   switch i1 false, label %13 [
   ]
 
 13:                                               ; preds = %12
-  store i1 %"20_013", i1* %"06", align 1
+  store i1 %"20_018", i1* %"011", align 1
   br label %18
 
 14:                                               ; preds = %10
   store i1 false, i1* %"25_0", align 1
-  %"5_014" = load {}, {}* %"5_0", align 1
-  %"25_015" = load i1, i1* %"25_0", align 1
-  store {} %"5_014", {}* %"5_0", align 1
-  store i1 %"25_015", i1* %"25_0", align 1
-  %"5_016" = load {}, {}* %"5_0", align 1
-  %"25_017" = load i1, i1* %"25_0", align 1
+  %"5_019" = load {}, {}* %"5_0", align 1
+  %"25_020" = load i1, i1* %"25_0", align 1
+  store {} %"5_019", {}* %"5_0", align 1
+  store i1 %"25_020", i1* %"25_0", align 1
+  %"5_021" = load {}, {}* %"5_0", align 1
+  %"25_022" = load i1, i1* %"25_0", align 1
   switch i1 false, label %15 [
   ]
 
 15:                                               ; preds = %14
-  store i1 %"25_017", i1* %"06", align 1
+  store i1 %"25_022", i1* %"011", align 1
   br label %18
 
 16:                                               ; preds = %11
-  %"5_018" = load {}, {}* %"5_0", align 1
-  %"9_119" = load i1, i1* %"9_1", align 1
-  store {} %"5_018", {}* %"5_0", align 1
-  store i1 %"9_119", i1* %"9_1", align 1
-  %"5_020" = load {}, {}* %"5_0", align 1
-  %"9_121" = load i1, i1* %"9_1", align 1
+  %"5_023" = load {}, {}* %"5_0", align 1
+  %"9_124" = load i1, i1* %"9_1", align 1
+  store {} %"5_023", {}* %"5_0", align 1
+  store i1 %"9_124", i1* %"9_1", align 1
+  %"5_025" = load {}, {}* %"5_0", align 1
+  %"9_126" = load i1, i1* %"9_1", align 1
   switch i1 false, label %17 [
   ]
 
 17:                                               ; preds = %16
-  store i1 %"9_121", i1* %"06", align 1
+  store i1 %"9_126", i1* %"011", align 1
   br label %18
 
 18:                                               ; preds = %17, %15, %13
-  %"09" = load i1, i1* %"06", align 1
-  store i1 %"09", i1* %"11_0", align 1
-  %"11_022" = load i1, i1* %"11_0", align 1
-  store i1 %"11_022", i1* %"11_0", align 1
-  %"11_023" = load i1, i1* %"11_0", align 1
-  switch i1 %"11_023", label %19 [
+  %"014" = load i1, i1* %"011", align 1
+  store i1 %"014", i1* %"11_0", align 1
+  %"11_027" = load i1, i1* %"11_0", align 1
+  store i1 %"11_027", i1* %"11_0", align 1
+  %"11_028" = load i1, i1* %"11_0", align 1
+  switch i1 %"11_028", label %19 [
     i1 true, label %20
   ]
 
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@llvm14.snap
index a47dd8f02..881662d3d 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@llvm14.snap
@@ -32,6 +32,6 @@ entry_block:                                      ; preds = %alloca_block
   %3 = extractvalue { i1, i1 } %2, 0
   %4 = extractvalue { i1, i1 } %2, 1
   %mrv = insertvalue { i1, i1 } undef, i1 %3, 0
-  %mrv7 = insertvalue { i1, i1 } %mrv, i1 %4, 1
-  ret { i1, i1 } %mrv7
+  %mrv13 = insertvalue { i1, i1 } %mrv, i1 %4, 1
+  ret { i1, i1 } %mrv13
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@pre-mem2reg@llvm14.snap
index 268166f27..f8fb03f20 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call@pre-mem2reg@llvm14.snap
@@ -17,25 +17,31 @@ entry_block:                                      ; preds = %alloca_block
 define i1 @_hl.main_unary.5(i1 %0) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"6_0" = alloca i1, align 1
   %"8_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"6_0", align 1
-  %"6_01" = load i1, i1* %"6_0", align 1
-  %1 = call i1 @_hl.main_unary.5(i1 %"6_01")
+  store i1 %0, i1* %"0", align 1
+  %"02" = load i1, i1* %"0", align 1
+  store i1 %"02", i1* %"6_0", align 1
+  %"6_03" = load i1, i1* %"6_0", align 1
+  %"6_04" = load i1, i1* %"6_0", align 1
+  %1 = call i1 @_hl.main_unary.5(i1 %"6_04")
   store i1 %1, i1* %"8_0", align 1
-  %"8_02" = load i1, i1* %"8_0", align 1
-  store i1 %"8_02", i1* %"0", align 1
-  %"03" = load i1, i1* %"0", align 1
-  ret i1 %"03"
+  %"8_05" = load i1, i1* %"8_0", align 1
+  store i1 %"8_05", i1* %"01", align 1
+  %"06" = load i1, i1* %"01", align 1
+  ret i1 %"06"
 }
 
 define { i1, i1 } @_hl.main_binary.9(i1 %0, i1 %1) {
 alloca_block:
   %"0" = alloca i1, align 1
   %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
+  %"12" = alloca i1, align 1
   %"10_0" = alloca i1, align 1
   %"10_1" = alloca i1, align 1
   %"12_0" = alloca i1, align 1
@@ -43,22 +49,28 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"10_0", align 1
-  store i1 %1, i1* %"10_1", align 1
-  %"10_01" = load i1, i1* %"10_0", align 1
-  %"10_12" = load i1, i1* %"10_1", align 1
-  %2 = call { i1, i1 } @_hl.main_binary.9(i1 %"10_01", i1 %"10_12")
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"03" = load i1, i1* %"0", align 1
+  %"14" = load i1, i1* %"1", align 1
+  store i1 %"03", i1* %"10_0", align 1
+  store i1 %"14", i1* %"10_1", align 1
+  %"10_05" = load i1, i1* %"10_0", align 1
+  %"10_16" = load i1, i1* %"10_1", align 1
+  %"10_07" = load i1, i1* %"10_0", align 1
+  %"10_18" = load i1, i1* %"10_1", align 1
+  %2 = call { i1, i1 } @_hl.main_binary.9(i1 %"10_07", i1 %"10_18")
   %3 = extractvalue { i1, i1 } %2, 0
   %4 = extractvalue { i1, i1 } %2, 1
   store i1 %3, i1* %"12_0", align 1
   store i1 %4, i1* %"12_1", align 1
-  %"12_03" = load i1, i1* %"12_0", align 1
-  %"12_14" = load i1, i1* %"12_1", align 1
-  store i1 %"12_03", i1* %"0", align 1
-  store i1 %"12_14", i1* %"1", align 1
-  %"05" = load i1, i1* %"0", align 1
-  %"16" = load i1, i1* %"1", align 1
-  %mrv = insertvalue { i1, i1 } undef, i1 %"05", 0
-  %mrv7 = insertvalue { i1, i1 } %mrv, i1 %"16", 1
-  ret { i1, i1 } %mrv7
+  %"12_09" = load i1, i1* %"12_0", align 1
+  %"12_110" = load i1, i1* %"12_1", align 1
+  store i1 %"12_09", i1* %"01", align 1
+  store i1 %"12_110", i1* %"12", align 1
+  %"011" = load i1, i1* %"01", align 1
+  %"112" = load i1, i1* %"12", align 1
+  %mrv = insertvalue { i1, i1 } undef, i1 %"011", 0
+  %mrv13 = insertvalue { i1, i1 } %mrv, i1 %"112", 1
+  ret { i1, i1 } %mrv13
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@llvm14.snap
index 21e50610d..1753fc181 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@llvm14.snap
@@ -32,6 +32,6 @@ entry_block:                                      ; preds = %alloca_block
   %3 = extractvalue { i1, i1 } %2, 0
   %4 = extractvalue { i1, i1 } %2, 1
   %mrv = insertvalue { i1, i1 } undef, i1 %3, 0
-  %mrv8 = insertvalue { i1, i1 } %mrv, i1 %4, 1
-  ret { i1, i1 } %mrv8
+  %mrv15 = insertvalue { i1, i1 } %mrv, i1 %4, 1
+  ret { i1, i1 } %mrv15
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@pre-mem2reg@llvm14.snap
index b3283ee1b..272ebc77c 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_call_indirect@pre-mem2reg@llvm14.snap
@@ -13,35 +13,43 @@ alloca_block:
 entry_block:                                      ; preds = %alloca_block
   store void ()* @_hl.main_void.1, void ()** %"4_0", align 8
   %"4_01" = load void ()*, void ()** %"4_0", align 8
-  call void %"4_01"()
+  %"4_02" = load void ()*, void ()** %"4_0", align 8
+  call void %"4_02"()
   ret void
 }
 
 define i1 @_hl.main_unary.6(i1 %0) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"7_0" = alloca i1, align 1
   %"9_0" = alloca i1 (i1)*, align 8
   %"10_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"7_0", align 1
+  store i1 %0, i1* %"0", align 1
+  %"02" = load i1, i1* %"0", align 1
+  store i1 %"02", i1* %"7_0", align 1
   store i1 (i1)* @_hl.main_unary.6, i1 (i1)** %"9_0", align 8
-  %"9_01" = load i1 (i1)*, i1 (i1)** %"9_0", align 8
-  %"7_02" = load i1, i1* %"7_0", align 1
-  %1 = call i1 %"9_01"(i1 %"7_02")
+  %"9_03" = load i1 (i1)*, i1 (i1)** %"9_0", align 8
+  %"7_04" = load i1, i1* %"7_0", align 1
+  %"9_05" = load i1 (i1)*, i1 (i1)** %"9_0", align 8
+  %"7_06" = load i1, i1* %"7_0", align 1
+  %1 = call i1 %"9_05"(i1 %"7_06")
   store i1 %1, i1* %"10_0", align 1
-  %"10_03" = load i1, i1* %"10_0", align 1
-  store i1 %"10_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"10_07" = load i1, i1* %"10_0", align 1
+  store i1 %"10_07", i1* %"01", align 1
+  %"08" = load i1, i1* %"01", align 1
+  ret i1 %"08"
 }
 
 define { i1, i1 } @_hl.main_binary.11(i1 %0, i1 %1) {
 alloca_block:
   %"0" = alloca i1, align 1
   %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
+  %"12" = alloca i1, align 1
   %"12_0" = alloca i1, align 1
   %"12_1" = alloca i1, align 1
   %"14_0" = alloca { i1, i1 } (i1, i1)*, align 8
@@ -50,24 +58,31 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"12_0", align 1
-  store i1 %1, i1* %"12_1", align 1
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"03" = load i1, i1* %"0", align 1
+  %"14" = load i1, i1* %"1", align 1
+  store i1 %"03", i1* %"12_0", align 1
+  store i1 %"14", i1* %"12_1", align 1
   store { i1, i1 } (i1, i1)* @_hl.main_binary.11, { i1, i1 } (i1, i1)** %"14_0", align 8
-  %"14_01" = load { i1, i1 } (i1, i1)*, { i1, i1 } (i1, i1)** %"14_0", align 8
-  %"12_02" = load i1, i1* %"12_0", align 1
-  %"12_13" = load i1, i1* %"12_1", align 1
-  %2 = call { i1, i1 } %"14_01"(i1 %"12_02", i1 %"12_13")
+  %"14_05" = load { i1, i1 } (i1, i1)*, { i1, i1 } (i1, i1)** %"14_0", align 8
+  %"12_06" = load i1, i1* %"12_0", align 1
+  %"12_17" = load i1, i1* %"12_1", align 1
+  %"14_08" = load { i1, i1 } (i1, i1)*, { i1, i1 } (i1, i1)** %"14_0", align 8
+  %"12_09" = load i1, i1* %"12_0", align 1
+  %"12_110" = load i1, i1* %"12_1", align 1
+  %2 = call { i1, i1 } %"14_08"(i1 %"12_09", i1 %"12_110")
   %3 = extractvalue { i1, i1 } %2, 0
   %4 = extractvalue { i1, i1 } %2, 1
   store i1 %3, i1* %"15_0", align 1
   store i1 %4, i1* %"15_1", align 1
-  %"15_04" = load i1, i1* %"15_0", align 1
-  %"15_15" = load i1, i1* %"15_1", align 1
-  store i1 %"15_04", i1* %"0", align 1
-  store i1 %"15_15", i1* %"1", align 1
-  %"06" = load i1, i1* %"0", align 1
-  %"17" = load i1, i1* %"1", align 1
-  %mrv = insertvalue { i1, i1 } undef, i1 %"06", 0
-  %mrv8 = insertvalue { i1, i1 } %mrv, i1 %"17", 1
-  ret { i1, i1 } %mrv8
+  %"15_011" = load i1, i1* %"15_0", align 1
+  %"15_112" = load i1, i1* %"15_1", align 1
+  store i1 %"15_011", i1* %"01", align 1
+  store i1 %"15_112", i1* %"12", align 1
+  %"013" = load i1, i1* %"01", align 1
+  %"114" = load i1, i1* %"12", align 1
+  %mrv = insertvalue { i1, i1 } undef, i1 %"013", 0
+  %mrv15 = insertvalue { i1, i1 } %mrv, i1 %"114", 1
+  ret { i1, i1 } %mrv15
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@llvm14.snap
index f12ea5a52..2cdd9b208 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@llvm14.snap
@@ -39,8 +39,8 @@ cond_4_case_2:                                    ; preds = %6
   br label %cond_exit_4
 
 cond_exit_4:                                      ; preds = %cond_4_case_2, %cond_4_case_1, %cond_4_case_0
-  %"03.0" = phi { i2, i2, i1 } [ { i2 -2, i2 poison, i1 poison }, %cond_4_case_0 ], [ %9, %cond_4_case_2 ], [ %8, %cond_4_case_1 ]
-  %mrv = insertvalue { { i2, i2, i1 }, {} } undef, { i2, i2, i1 } %"03.0", 0
-  %mrv32 = insertvalue { { i2, i2, i1 }, {} } %mrv, {} %1, 1
-  ret { { i2, i2, i1 }, {} } %mrv32
+  %"09.0" = phi { i2, i2, i1 } [ { i2 -2, i2 poison, i1 poison }, %cond_4_case_0 ], [ %9, %cond_4_case_2 ], [ %8, %cond_4_case_1 ]
+  %mrv = insertvalue { { i2, i2, i1 }, {} } undef, { i2, i2, i1 } %"09.0", 0
+  %mrv41 = insertvalue { { i2, i2, i1 }, {} } %mrv, {} %1, 1
+  ret { { i2, i2, i1 }, {} } %mrv41
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@pre-mem2reg@llvm14.snap
index c2d28d64b..c694a823f 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_conditional@pre-mem2reg@llvm14.snap
@@ -9,110 +9,121 @@ define { { i2, i2, i1 }, {} } @_hl.main.1({ i2, i2, i1 } %0, {} %1) {
 alloca_block:
   %"0" = alloca { i2, i2, i1 }, align 8
   %"1" = alloca {}, align 8
+  %"01" = alloca { i2, i2, i1 }, align 8
+  %"12" = alloca {}, align 8
   %"2_0" = alloca { i2, i2, i1 }, align 8
   %"2_1" = alloca {}, align 8
   %"4_0" = alloca { i2, i2, i1 }, align 8
   %"4_1" = alloca {}, align 8
-  %"03" = alloca { i2, i2, i1 }, align 8
-  %"14" = alloca {}, align 8
-  %"07" = alloca {}, align 8
-  %"18" = alloca {}, align 8
+  %"09" = alloca { i2, i2, i1 }, align 8
+  %"110" = alloca {}, align 8
+  %"013" = alloca {}, align 8
+  %"114" = alloca {}, align 8
   %"6_0" = alloca {}, align 8
   %"6_1" = alloca {}, align 8
   %"8_0" = alloca { i2, i2, i1 }, align 8
-  %"014" = alloca i1, align 1
-  %"115" = alloca {}, align 8
+  %"021" = alloca i1, align 1
+  %"122" = alloca {}, align 8
   %"10_0" = alloca i1, align 1
   %"10_1" = alloca {}, align 8
   %"12_0" = alloca { i2, i2, i1 }, align 8
-  %"021" = alloca i2, align 1
-  %"122" = alloca {}, align 8
+  %"029" = alloca i2, align 1
+  %"130" = alloca {}, align 8
   %"14_0" = alloca i2, align 1
   %"14_1" = alloca {}, align 8
   %"16_0" = alloca { i2, i2, i1 }, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store { i2, i2, i1 } %0, { i2, i2, i1 }* %"2_0", align 1
-  store {} %1, {}* %"2_1", align 1
-  %"2_01" = load { i2, i2, i1 }, { i2, i2, i1 }* %"2_0", align 1
-  %"2_12" = load {}, {}* %"2_1", align 1
-  %2 = extractvalue { i2, i2, i1 } %"2_01", 0
+  store { i2, i2, i1 } %0, { i2, i2, i1 }* %"0", align 1
+  store {} %1, {}* %"1", align 1
+  %"03" = load { i2, i2, i1 }, { i2, i2, i1 }* %"0", align 1
+  %"14" = load {}, {}* %"1", align 1
+  store { i2, i2, i1 } %"03", { i2, i2, i1 }* %"2_0", align 1
+  store {} %"14", {}* %"2_1", align 1
+  %"2_05" = load { i2, i2, i1 }, { i2, i2, i1 }* %"2_0", align 1
+  %"2_16" = load {}, {}* %"2_1", align 1
+  %"2_07" = load { i2, i2, i1 }, { i2, i2, i1 }* %"2_0", align 1
+  %"2_18" = load {}, {}* %"2_1", align 1
+  %2 = extractvalue { i2, i2, i1 } %"2_07", 0
   switch i2 %2, label %3 [
     i2 1, label %4
     i2 -2, label %6
   ]
 
 3:                                                ; preds = %entry_block
-  store {} undef, {}* %"07", align 1
-  store {} %"2_12", {}* %"18", align 1
+  store {} undef, {}* %"013", align 1
+  store {} %"2_18", {}* %"114", align 1
   br label %cond_4_case_0
 
 4:                                                ; preds = %entry_block
-  %5 = extractvalue { i2, i2, i1 } %"2_01", 2
-  store i1 %5, i1* %"014", align 1
-  store {} %"2_12", {}* %"115", align 1
+  %5 = extractvalue { i2, i2, i1 } %"2_07", 2
+  store i1 %5, i1* %"021", align 1
+  store {} %"2_18", {}* %"122", align 1
   br label %cond_4_case_1
 
 6:                                                ; preds = %entry_block
-  %7 = extractvalue { i2, i2, i1 } %"2_01", 1
-  store i2 %7, i2* %"021", align 1
-  store {} %"2_12", {}* %"122", align 1
+  %7 = extractvalue { i2, i2, i1 } %"2_07", 1
+  store i2 %7, i2* %"029", align 1
+  store {} %"2_18", {}* %"130", align 1
   br label %cond_4_case_2
 
 cond_4_case_0:                                    ; preds = %3
-  %"09" = load {}, {}* %"07", align 1
-  %"110" = load {}, {}* %"18", align 1
-  store {} %"09", {}* %"6_0", align 1
-  store {} %"110", {}* %"6_1", align 1
-  %"6_011" = load {}, {}* %"6_0", align 1
+  %"015" = load {}, {}* %"013", align 1
+  %"116" = load {}, {}* %"114", align 1
+  store {} %"015", {}* %"6_0", align 1
+  store {} %"116", {}* %"6_1", align 1
+  %"6_017" = load {}, {}* %"6_0", align 1
+  %"6_018" = load {}, {}* %"6_0", align 1
   store { i2, i2, i1 } { i2 -2, i2 poison, i1 poison }, { i2, i2, i1 }* %"8_0", align 1
-  %"8_012" = load { i2, i2, i1 }, { i2, i2, i1 }* %"8_0", align 1
-  %"6_113" = load {}, {}* %"6_1", align 1
-  store { i2, i2, i1 } %"8_012", { i2, i2, i1 }* %"03", align 1
-  store {} %"6_113", {}* %"14", align 1
+  %"8_019" = load { i2, i2, i1 }, { i2, i2, i1 }* %"8_0", align 1
+  %"6_120" = load {}, {}* %"6_1", align 1
+  store { i2, i2, i1 } %"8_019", { i2, i2, i1 }* %"09", align 1
+  store {} %"6_120", {}* %"110", align 1
   br label %cond_exit_4
 
 cond_4_case_1:                                    ; preds = %4
-  %"016" = load i1, i1* %"014", align 1
-  %"117" = load {}, {}* %"115", align 1
-  store i1 %"016", i1* %"10_0", align 1
-  store {} %"117", {}* %"10_1", align 1
-  %"10_018" = load i1, i1* %"10_0", align 1
-  %8 = insertvalue { i2, i2, i1 } { i2 1, i2 poison, i1 poison }, i1 %"10_018", 2
+  %"023" = load i1, i1* %"021", align 1
+  %"124" = load {}, {}* %"122", align 1
+  store i1 %"023", i1* %"10_0", align 1
+  store {} %"124", {}* %"10_1", align 1
+  %"10_025" = load i1, i1* %"10_0", align 1
+  %"10_026" = load i1, i1* %"10_0", align 1
+  %8 = insertvalue { i2, i2, i1 } { i2 1, i2 poison, i1 poison }, i1 %"10_026", 2
   store { i2, i2, i1 } %8, { i2, i2, i1 }* %"12_0", align 1
-  %"12_019" = load { i2, i2, i1 }, { i2, i2, i1 }* %"12_0", align 1
-  %"10_120" = load {}, {}* %"10_1", align 1
-  store { i2, i2, i1 } %"12_019", { i2, i2, i1 }* %"03", align 1
-  store {} %"10_120", {}* %"14", align 1
+  %"12_027" = load { i2, i2, i1 }, { i2, i2, i1 }* %"12_0", align 1
+  %"10_128" = load {}, {}* %"10_1", align 1
+  store { i2, i2, i1 } %"12_027", { i2, i2, i1 }* %"09", align 1
+  store {} %"10_128", {}* %"110", align 1
   br label %cond_exit_4
 
 cond_4_case_2:                                    ; preds = %6
-  %"023" = load i2, i2* %"021", align 1
-  %"124" = load {}, {}* %"122", align 1
-  store i2 %"023", i2* %"14_0", align 1
-  store {} %"124", {}* %"14_1", align 1
-  %"14_025" = load i2, i2* %"14_0", align 1
-  %9 = insertvalue { i2, i2, i1 } { i2 0, i2 poison, i1 poison }, i2 %"14_025", 1
+  %"031" = load i2, i2* %"029", align 1
+  %"132" = load {}, {}* %"130", align 1
+  store i2 %"031", i2* %"14_0", align 1
+  store {} %"132", {}* %"14_1", align 1
+  %"14_033" = load i2, i2* %"14_0", align 1
+  %"14_034" = load i2, i2* %"14_0", align 1
+  %9 = insertvalue { i2, i2, i1 } { i2 0, i2 poison, i1 poison }, i2 %"14_034", 1
   store { i2, i2, i1 } %9, { i2, i2, i1 }* %"16_0", align 1
-  %"16_026" = load { i2, i2, i1 }, { i2, i2, i1 }* %"16_0", align 1
-  %"14_127" = load {}, {}* %"14_1", align 1
-  store { i2, i2, i1 } %"16_026", { i2, i2, i1 }* %"03", align 1
-  store {} %"14_127", {}* %"14", align 1
+  %"16_035" = load { i2, i2, i1 }, { i2, i2, i1 }* %"16_0", align 1
+  %"14_136" = load {}, {}* %"14_1", align 1
+  store { i2, i2, i1 } %"16_035", { i2, i2, i1 }* %"09", align 1
+  store {} %"14_136", {}* %"110", align 1
   br label %cond_exit_4
 
 cond_exit_4:                                      ; preds = %cond_4_case_2, %cond_4_case_1, %cond_4_case_0
-  %"05" = load { i2, i2, i1 }, { i2, i2, i1 }* %"03", align 1
-  %"16" = load {}, {}* %"14", align 1
-  store { i2, i2, i1 } %"05", { i2, i2, i1 }* %"4_0", align 1
-  store {} %"16", {}* %"4_1", align 1
-  %"4_028" = load { i2, i2, i1 }, { i2, i2, i1 }* %"4_0", align 1
-  %"4_129" = load {}, {}* %"4_1", align 1
-  store { i2, i2, i1 } %"4_028", { i2, i2, i1 }* %"0", align 1
-  store {} %"4_129", {}* %"1", align 1
-  %"030" = load { i2, i2, i1 }, { i2, i2, i1 }* %"0", align 1
-  %"131" = load {}, {}* %"1", align 1
-  %mrv = insertvalue { { i2, i2, i1 }, {} } undef, { i2, i2, i1 } %"030", 0
-  %mrv32 = insertvalue { { i2, i2, i1 }, {} } %mrv, {} %"131", 1
-  ret { { i2, i2, i1 }, {} } %mrv32
+  %"011" = load { i2, i2, i1 }, { i2, i2, i1 }* %"09", align 1
+  %"112" = load {}, {}* %"110", align 1
+  store { i2, i2, i1 } %"011", { i2, i2, i1 }* %"4_0", align 1
+  store {} %"112", {}* %"4_1", align 1
+  %"4_037" = load { i2, i2, i1 }, { i2, i2, i1 }* %"4_0", align 1
+  %"4_138" = load {}, {}* %"4_1", align 1
+  store { i2, i2, i1 } %"4_037", { i2, i2, i1 }* %"01", align 1
+  store {} %"4_138", {}* %"12", align 1
+  %"039" = load { i2, i2, i1 }, { i2, i2, i1 }* %"01", align 1
+  %"140" = load {}, {}* %"12", align 1
+  %mrv = insertvalue { { i2, i2, i1 }, {} } undef, { i2, i2, i1 } %"039", 0
+  %mrv41 = insertvalue { { i2, i2, i1 }, {} } %mrv, {} %"140", 1
+  ret { { i2, i2, i1 }, {} } %mrv41
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_custom_op@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_custom_op@pre-mem2reg@llvm14.snap
index 3b91743b2..f6ad7d6d7 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_custom_op@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_custom_op@pre-mem2reg@llvm14.snap
@@ -1,6 +1,6 @@
 ---
-source: src/emit/test.rs
-expression: module.to_string()
+source: hugr-llvm/src/emit/test.rs
+expression: mod_str
 ---
 ; ModuleID = 'test_context'
 source_filename = "test_context"
@@ -18,10 +18,12 @@ entry_block:                                      ; preds = %alloca_block
   store i16 -24, i16* %"5_0", align 2
   %"5_01" = load i16, i16* %"5_0", align 2
   %"7_02" = load i16, i16* %"7_0", align 2
-  %0 = add i16 %"5_01", %"7_02"
+  %"5_03" = load i16, i16* %"5_0", align 2
+  %"7_04" = load i16, i16* %"7_0", align 2
+  %0 = add i16 %"5_03", %"7_04"
   store i16 %0, i16* %"8_0", align 2
-  %"8_03" = load i16, i16* %"8_0", align 2
-  store i16 %"8_03", i16* %"0", align 2
-  %"04" = load i16, i16* %"0", align 2
-  ret i16 %"04"
+  %"8_05" = load i16, i16* %"8_0", align 2
+  store i16 %"8_05", i16* %"0", align 2
+  %"06" = load i16, i16* %"0", align 2
+  ret i16 %"06"
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_dfg@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_dfg@pre-mem2reg@llvm14.snap
index 28ba006ac..7b0a8f3b9 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_dfg@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__emit_hugr_dfg@pre-mem2reg@llvm14.snap
@@ -8,19 +8,23 @@ source_filename = "test_context"
 define {} @_hl.main.1({} %0) {
 alloca_block:
   %"0" = alloca {}, align 8
+  %"01" = alloca {}, align 8
   %"2_0" = alloca {}, align 8
   %"4_0" = alloca {}, align 8
   %"5_0" = alloca {}, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store {} %0, {}* %"2_0", align 1
-  %"2_01" = load {}, {}* %"2_0", align 1
-  store {} %"2_01", {}* %"5_0", align 1
-  %"5_02" = load {}, {}* %"5_0", align 1
-  store {} %"5_02", {}* %"4_0", align 1
-  %"4_03" = load {}, {}* %"4_0", align 1
-  store {} %"4_03", {}* %"0", align 1
-  %"04" = load {}, {}* %"0", align 1
-  ret {} %"04"
+  store {} %0, {}* %"0", align 1
+  %"02" = load {}, {}* %"0", align 1
+  store {} %"02", {}* %"2_0", align 1
+  %"2_03" = load {}, {}* %"2_0", align 1
+  %"2_04" = load {}, {}* %"2_0", align 1
+  store {} %"2_04", {}* %"5_0", align 1
+  %"5_05" = load {}, {}* %"5_0", align 1
+  store {} %"5_05", {}* %"4_0", align 1
+  %"4_06" = load {}, {}* %"4_0", align 1
+  store {} %"4_06", {}* %"01", align 1
+  %"07" = load {}, {}* %"01", align 1
+  ret {} %"07"
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@llvm14.snap
index 7c88f9b48..7c073e997 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@llvm14.snap
@@ -40,14 +40,14 @@ cond_17_case_1:                                   ; preds = %4
   br label %cond_exit_17
 
 cond_exit_17:                                     ; preds = %cond_17_case_1, %cond_17_case_0
-  %"011.0" = phi { i1, i64 } [ %6, %cond_17_case_0 ], [ { i1 true, i64 poison }, %cond_17_case_1 ]
-  %7 = extractvalue { i1, i64 } %"011.0", 0
+  %"019.0" = phi { i1, i64 } [ %6, %cond_17_case_0 ], [ { i1 true, i64 poison }, %cond_17_case_1 ]
+  %7 = extractvalue { i1, i64 } %"019.0", 0
   switch i1 %7, label %8 [
     i1 true, label %10
   ]
 
 8:                                                ; preds = %cond_exit_17
-  %9 = extractvalue { i1, i64 } %"011.0", 1
+  %9 = extractvalue { i1, i64 } %"019.0", 1
   br label %loop_body
 
 10:                                               ; preds = %cond_exit_17
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@pre-mem2reg@llvm14.snap
index 2a6ef7a36..0a5b7fa53 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop@pre-mem2reg@llvm14.snap
@@ -18,13 +18,13 @@ alloca_block:
   %"15_0" = alloca i64, align 8
   %"12_0" = alloca i64, align 8
   %"13_0" = alloca i1, align 1
-  %"011" = alloca { i1, i64 }, align 8
-  %"013" = alloca i64, align 8
+  %"019" = alloca { i1, i64 }, align 8
+  %"021" = alloca i64, align 8
   %"23_0" = alloca i64, align 8
   %"20_0" = alloca i64, align 8
   %"24_0" = alloca i64, align 8
   %"25_0" = alloca { i1, i64 }, align 8
-  %"019" = alloca i64, align 8
+  %"030" = alloca i64, align 8
   %"29_0" = alloca { i1, i64 }, align 8
   %"27_0" = alloca i64, align 8
   br label %entry_block
@@ -34,90 +34,101 @@ entry_block:                                      ; preds = %alloca_block
   store i64 3, i64* %"5_0", align 4
   %"5_01" = load i64, i64* %"5_0", align 4
   %"7_02" = load i64, i64* %"7_0", align 4
-  store i64 %"5_01", i64* %"9_0", align 4
-  store i64 %"7_02", i64* %"9_1", align 4
+  %"5_03" = load i64, i64* %"5_0", align 4
+  %"7_04" = load i64, i64* %"7_0", align 4
+  store i64 %"5_03", i64* %"9_0", align 4
+  store i64 %"7_04", i64* %"9_1", align 4
   br label %loop_body
 
 loop_body:                                        ; preds = %8, %entry_block
-  %"9_03" = load i64, i64* %"9_0", align 4
-  %"9_14" = load i64, i64* %"9_1", align 4
+  %"9_05" = load i64, i64* %"9_0", align 4
+  %"9_16" = load i64, i64* %"9_1", align 4
   store i64 2, i64* %"15_0", align 4
   store i64 0, i64* %"12_0", align 4
-  store i64 %"9_03", i64* %"9_0", align 4
-  store i64 %"9_14", i64* %"9_1", align 4
-  %"9_15" = load i64, i64* %"9_1", align 4
-  %"15_06" = load i64, i64* %"15_0", align 4
-  %0 = mul i64 %"9_15", %"15_06"
+  store i64 %"9_05", i64* %"9_0", align 4
+  store i64 %"9_16", i64* %"9_1", align 4
+  %"9_17" = load i64, i64* %"9_1", align 4
+  %"15_08" = load i64, i64* %"15_0", align 4
+  %"9_19" = load i64, i64* %"9_1", align 4
+  %"15_010" = load i64, i64* %"15_0", align 4
+  %0 = mul i64 %"9_19", %"15_010"
   store i64 %0, i64* %"16_0", align 4
-  %"9_07" = load i64, i64* %"9_0", align 4
-  %"12_08" = load i64, i64* %"12_0", align 4
-  %1 = icmp eq i64 %"9_07", %"12_08"
+  %"9_011" = load i64, i64* %"9_0", align 4
+  %"12_012" = load i64, i64* %"12_0", align 4
+  %"9_013" = load i64, i64* %"9_0", align 4
+  %"12_014" = load i64, i64* %"12_0", align 4
+  %1 = icmp eq i64 %"9_013", %"12_014"
   %2 = select i1 %1, i1 true, i1 false
   store i1 %2, i1* %"13_0", align 1
-  %"13_09" = load i1, i1* %"13_0", align 1
-  %"9_010" = load i64, i64* %"9_0", align 4
-  switch i1 %"13_09", label %3 [
+  %"13_015" = load i1, i1* %"13_0", align 1
+  %"9_016" = load i64, i64* %"9_0", align 4
+  %"13_017" = load i1, i1* %"13_0", align 1
+  %"9_018" = load i64, i64* %"9_0", align 4
+  switch i1 %"13_017", label %3 [
     i1 true, label %4
   ]
 
 3:                                                ; preds = %loop_body
-  store i64 %"9_010", i64* %"013", align 4
+  store i64 %"9_018", i64* %"021", align 4
   br label %cond_17_case_0
 
 4:                                                ; preds = %loop_body
-  store i64 %"9_010", i64* %"019", align 4
+  store i64 %"9_018", i64* %"030", align 4
   br label %cond_17_case_1
 
 loop_out:                                         ; preds = %10
-  %"8_026" = load i64, i64* %"8_0", align 4
-  store i64 %"8_026", i64* %"0", align 4
-  %"027" = load i64, i64* %"0", align 4
-  ret i64 %"027"
+  %"8_037" = load i64, i64* %"8_0", align 4
+  store i64 %"8_037", i64* %"0", align 4
+  %"038" = load i64, i64* %"0", align 4
+  ret i64 %"038"
 
 cond_17_case_0:                                   ; preds = %3
-  %"014" = load i64, i64* %"013", align 4
+  %"022" = load i64, i64* %"021", align 4
   store i64 1, i64* %"23_0", align 4
-  store i64 %"014", i64* %"20_0", align 4
-  %"20_015" = load i64, i64* %"20_0", align 4
-  %"23_016" = load i64, i64* %"23_0", align 4
-  %5 = sub i64 %"20_015", %"23_016"
+  store i64 %"022", i64* %"20_0", align 4
+  %"20_023" = load i64, i64* %"20_0", align 4
+  %"23_024" = load i64, i64* %"23_0", align 4
+  %"20_025" = load i64, i64* %"20_0", align 4
+  %"23_026" = load i64, i64* %"23_0", align 4
+  %5 = sub i64 %"20_025", %"23_026"
   store i64 %5, i64* %"24_0", align 4
-  %"24_017" = load i64, i64* %"24_0", align 4
-  %6 = insertvalue { i1, i64 } { i1 false, i64 poison }, i64 %"24_017", 1
+  %"24_027" = load i64, i64* %"24_0", align 4
+  %"24_028" = load i64, i64* %"24_0", align 4
+  %6 = insertvalue { i1, i64 } { i1 false, i64 poison }, i64 %"24_028", 1
   store { i1, i64 } %6, { i1, i64 }* %"25_0", align 4
-  %"25_018" = load { i1, i64 }, { i1, i64 }* %"25_0", align 4
-  store { i1, i64 } %"25_018", { i1, i64 }* %"011", align 4
+  %"25_029" = load { i1, i64 }, { i1, i64 }* %"25_0", align 4
+  store { i1, i64 } %"25_029", { i1, i64 }* %"019", align 4
   br label %cond_exit_17
 
 cond_17_case_1:                                   ; preds = %4
-  %"020" = load i64, i64* %"019", align 4
+  %"031" = load i64, i64* %"030", align 4
   store { i1, i64 } { i1 true, i64 poison }, { i1, i64 }* %"29_0", align 4
-  %"29_021" = load { i1, i64 }, { i1, i64 }* %"29_0", align 4
-  store { i1, i64 } %"29_021", { i1, i64 }* %"011", align 4
-  store i64 %"020", i64* %"27_0", align 4
+  %"29_032" = load { i1, i64 }, { i1, i64 }* %"29_0", align 4
+  store { i1, i64 } %"29_032", { i1, i64 }* %"019", align 4
+  store i64 %"031", i64* %"27_0", align 4
   br label %cond_exit_17
 
 cond_exit_17:                                     ; preds = %cond_17_case_1, %cond_17_case_0
-  %"012" = load { i1, i64 }, { i1, i64 }* %"011", align 4
-  store { i1, i64 } %"012", { i1, i64 }* %"17_0", align 4
-  %"17_022" = load { i1, i64 }, { i1, i64 }* %"17_0", align 4
-  %"16_023" = load i64, i64* %"16_0", align 4
-  store { i1, i64 } %"17_022", { i1, i64 }* %"17_0", align 4
-  store i64 %"16_023", i64* %"16_0", align 4
-  %"17_024" = load { i1, i64 }, { i1, i64 }* %"17_0", align 4
-  %"16_025" = load i64, i64* %"16_0", align 4
-  %7 = extractvalue { i1, i64 } %"17_024", 0
+  %"020" = load { i1, i64 }, { i1, i64 }* %"019", align 4
+  store { i1, i64 } %"020", { i1, i64 }* %"17_0", align 4
+  %"17_033" = load { i1, i64 }, { i1, i64 }* %"17_0", align 4
+  %"16_034" = load i64, i64* %"16_0", align 4
+  store { i1, i64 } %"17_033", { i1, i64 }* %"17_0", align 4
+  store i64 %"16_034", i64* %"16_0", align 4
+  %"17_035" = load { i1, i64 }, { i1, i64 }* %"17_0", align 4
+  %"16_036" = load i64, i64* %"16_0", align 4
+  %7 = extractvalue { i1, i64 } %"17_035", 0
   switch i1 %7, label %8 [
     i1 true, label %10
   ]
 
 8:                                                ; preds = %cond_exit_17
-  %9 = extractvalue { i1, i64 } %"17_024", 1
+  %9 = extractvalue { i1, i64 } %"17_035", 1
   store i64 %9, i64* %"9_0", align 4
-  store i64 %"16_025", i64* %"9_1", align 4
+  store i64 %"16_036", i64* %"9_1", align 4
   br label %loop_body
 
 10:                                               ; preds = %cond_exit_17
-  store i64 %"16_025", i64* %"8_0", align 4
+  store i64 %"16_036", i64* %"8_0", align 4
   br label %loop_out
 }
diff --git a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop_simple@pre-mem2reg@llvm14.snap b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop_simple@pre-mem2reg@llvm14.snap
index 35ca1c42a..e444acd83 100644
--- a/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop_simple@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/emit/snapshots/hugr_llvm__emit__test__test_fns__tail_loop_simple@pre-mem2reg@llvm14.snap
@@ -7,7 +7,8 @@ source_filename = "test_context"
 
 define {} @_hl.main.1(i64 %0) {
 alloca_block:
-  %"0" = alloca {}, align 8
+  %"0" = alloca i64, align 8
+  %"01" = alloca {}, align 8
   %"2_0" = alloca i64, align 8
   %"4_0" = alloca {}, align 8
   %"5_0" = alloca i64, align 8
@@ -15,27 +16,31 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i64 %0, i64* %"2_0", align 4
-  %"2_01" = load i64, i64* %"2_0", align 4
-  store i64 %"2_01", i64* %"5_0", align 4
+  store i64 %0, i64* %"0", align 4
+  %"02" = load i64, i64* %"0", align 4
+  store i64 %"02", i64* %"2_0", align 4
+  %"2_03" = load i64, i64* %"2_0", align 4
+  %"2_04" = load i64, i64* %"2_0", align 4
+  store i64 %"2_04", i64* %"5_0", align 4
   br label %loop_body
 
 loop_body:                                        ; preds = %3, %entry_block
-  %"5_02" = load i64, i64* %"5_0", align 4
-  store i64 %"5_02", i64* %"5_0", align 4
-  %"5_03" = load i64, i64* %"5_0", align 4
-  %1 = insertvalue { i1, i64 } { i1 false, i64 poison }, i64 %"5_03", 1
+  %"5_05" = load i64, i64* %"5_0", align 4
+  store i64 %"5_05", i64* %"5_0", align 4
+  %"5_06" = load i64, i64* %"5_0", align 4
+  %"5_07" = load i64, i64* %"5_0", align 4
+  %1 = insertvalue { i1, i64 } { i1 false, i64 poison }, i64 %"5_07", 1
   store { i1, i64 } %1, { i1, i64 }* %"7_0", align 4
-  %"7_04" = load { i1, i64 }, { i1, i64 }* %"7_0", align 4
-  store { i1, i64 } %"7_04", { i1, i64 }* %"7_0", align 4
-  %"7_05" = load { i1, i64 }, { i1, i64 }* %"7_0", align 4
-  %2 = extractvalue { i1, i64 } %"7_05", 0
+  %"7_08" = load { i1, i64 }, { i1, i64 }* %"7_0", align 4
+  store { i1, i64 } %"7_08", { i1, i64 }* %"7_0", align 4
+  %"7_09" = load { i1, i64 }, { i1, i64 }* %"7_0", align 4
+  %2 = extractvalue { i1, i64 } %"7_09", 0
   switch i1 %2, label %3 [
     i1 true, label %5
   ]
 
 3:                                                ; preds = %loop_body
-  %4 = extractvalue { i1, i64 } %"7_05", 1
+  %4 = extractvalue { i1, i64 } %"7_09", 1
   store i64 %4, i64* %"5_0", align 4
   br label %loop_body
 
@@ -44,8 +49,8 @@ loop_body:                                        ; preds = %3, %entry_block
   br label %loop_out
 
 loop_out:                                         ; preds = %5
-  %"4_06" = load {}, {}* %"4_0", align 1
-  store {} %"4_06", {}* %"0", align 1
-  %"07" = load {}, {}* %"0", align 1
-  ret {} %"07"
+  %"4_010" = load {}, {}* %"4_0", align 1
+  store {} %"4_010", {}* %"01", align 1
+  %"011" = load {}, {}* %"01", align 1
+  ret {} %"011"
 }
diff --git a/hugr-llvm/src/extension/collections/array.rs b/hugr-llvm/src/extension/collections/array.rs
index 461e26c65..935439d00 100644
--- a/hugr-llvm/src/extension/collections/array.rs
+++ b/hugr-llvm/src/extension/collections/array.rs
@@ -4,13 +4,13 @@ use std::iter;
 use anyhow::{anyhow, Ok, Result};
 use hugr_core::extension::prelude::option_type;
 use hugr_core::extension::simple_op::{MakeExtensionOp, MakeRegisteredOp};
-use hugr_core::ops::DataflowOpTrait;
+use hugr_core::ops::{DataflowOpTrait, ExtensionOp};
 use hugr_core::std_extensions::collections::array::{
     self, array_type, ArrayOp, ArrayOpDef, ArrayRepeat, ArrayScan,
 };
 use hugr_core::types::{TypeArg, TypeEnum};
 use hugr_core::{HugrView, Node};
-use inkwell::builder::{Builder, BuilderError};
+use inkwell::builder::BuilderError;
 use inkwell::types::{BasicType, BasicTypeEnum};
 use inkwell::values::{
     ArrayValue, BasicValue as _, BasicValueEnum, CallableValue, IntValue, PointerValue,
@@ -18,7 +18,7 @@ use inkwell::values::{
 use inkwell::IntPredicate;
 use itertools::Itertools;
 
-use crate::emit::emit_value;
+use crate::emit::{emit_value, get_intrinsic, EmitOpArgs};
 use crate::{
     emit::{deaggregate_call_result, EmitFuncContext, RowPromise},
     types::{HugrType, TypingSession},
@@ -66,10 +66,9 @@ pub trait ArrayCodegen: Clone {
         &self,
         ctx: &mut EmitFuncContext<'c, '_, H>,
         op: ArrayOp,
-        inputs: Vec<BasicValueEnum<'c>>,
-        outputs: RowPromise<'c>,
+        args: EmitOpArgs<'c, '_, ExtensionOp, H>,
     ) -> Result<()> {
-        emit_array_op(self, ctx, op, inputs, outputs)
+        emit_array_op(self, ctx, op, args)
     }
 
     /// Emit a [hugr_core::std_extensions::collections::array::ArrayRepeat] op.
@@ -148,8 +147,7 @@ impl<CCG: ArrayCodegen> CodegenExtension for ArrayCodegenExtension<CCG> {
                     ccg.emit_array_op(
                         context,
                         ArrayOp::from_extension_op(args.node().as_ref())?,
-                        args.inputs,
-                        args.outputs,
+                        args
                     )
                 }
             })
@@ -178,42 +176,42 @@ impl<CCG: ArrayCodegen> CodegenExtension for ArrayCodegenExtension<CCG> {
     }
 }
 
-/// Helper function to allocate an array on the stack.
-///
-/// Returns two pointers: The first one is a pointer to the first element of the
-/// array (i.e. it is of type `array.get_element_type().ptr_type()`) whereas the
-/// second one points to the whole array value, i.e. it is of type `array.ptr_type()`.
-fn build_array_alloca<'c>(
-    builder: &Builder<'c>,
-    array: ArrayValue<'c>,
-) -> Result<(PointerValue<'c>, PointerValue<'c>), BuilderError> {
-    let array_ty = array.get_type();
-    let array_len: IntValue<'c> = {
-        let ctx = builder.get_insert_block().unwrap().get_context();
-        ctx.i32_type().const_int(array_ty.len() as u64, false)
-    };
-    let ptr = builder.build_array_alloca(array_ty.get_element_type(), array_len, "")?;
-    let array_ptr = builder
-        .build_bit_cast(ptr, array_ty.ptr_type(Default::default()), "")?
-        .into_pointer_value();
-    builder.build_store(array_ptr, array)?;
-    Result::Ok((ptr, array_ptr))
-}
-
-/// Helper function to allocate an array on the stack and pass a pointer to it
-/// to a closure.
-///
-/// The pointer forwarded to the closure is a pointer to the first element of
-/// the array. I.e. it is of type `array.get_element_type().ptr_type()` not
-/// `array.ptr_type()`
-fn with_array_alloca<'c, T, E: From<BuilderError>>(
-    builder: &Builder<'c>,
-    array: ArrayValue<'c>,
-    go: impl FnOnce(PointerValue<'c>) -> Result<T, E>,
-) -> Result<T, E> {
-    let (ptr, _) = build_array_alloca(builder, array)?;
-    go(ptr)
-}
+// /// Helper function to allocate an array on the stack.
+// ///
+// /// Returns two pointers: The first one is a pointer to the first element of the
+// /// array (i.e. it is of type `array.get_element_type().ptr_type()`) whereas the
+// /// second one points to the whole array value, i.e. it is of type `array.ptr_type()`.
+// fn build_array_alloca<'c>(
+//     builder: &Builder<'c>,
+//     array: ArrayValue<'c>,
+// ) -> Result<(PointerValue<'c>, PointerValue<'c>), BuilderError> {
+//     let array_ty = array.get_type();
+//     let array_len: IntValue<'c> = {
+//         let ctx = builder.get_insert_block().unwrap().get_context();
+//         ctx.i32_type().const_int(array_ty.len() as u64, false)
+//     };
+//     let ptr = builder.build_array_alloca(array_ty.get_element_type(), array_len, "")?;
+//     let array_ptr = builder
+//         .build_bit_cast(ptr, array_ty.ptr_type(Default::default()), "")?
+//         .into_pointer_value();
+//     builder.build_store(array_ptr, array)?;
+//     Result::Ok((ptr, array_ptr))
+// }
+
+// /// Helper function to allocate an array on the stack and pass a pointer to it
+// /// to a closure.
+// ///
+// /// The pointer forwarded to the closure is a pointer to the first element of
+// /// the array. I.e. it is of type `array.get_element_type().ptr_type()` not
+// /// `array.ptr_type()`
+// fn with_array_alloca<'c, T, E: From<BuilderError>>(
+//     builder: &Builder<'c>,
+//     array: ArrayValue<'c>,
+//     go: impl FnOnce(PointerValue<'c>) -> Result<T, E>,
+// ) -> Result<T, E> {
+//     let (ptr, _) = build_array_alloca(builder, array)?;
+//     go(ptr)
+// }
 
 /// Helper function to build a loop that repeats for a given number of iterations.
 ///
@@ -224,9 +222,9 @@ fn build_loop<'c, T, H: HugrView<Node = Node>>(
     iters: IntValue<'c>,
     go: impl FnOnce(&mut EmitFuncContext<'c, '_, H>, IntValue<'c>) -> Result<T>,
 ) -> Result<T> {
-    let builder = ctx.builder();
     let idx_ty = ctx.iw_context().i32_type();
-    let idx_ptr = builder.build_alloca(idx_ty, "")?;
+    let idx_ptr = ctx.build_prologue(|builder| builder.build_alloca(idx_ty, ""))?;
+    let builder = ctx.builder();
     builder.build_store(idx_ptr, idx_ty.const_zero())?;
 
     let exit_block = ctx.new_basic_block("", None);
@@ -286,11 +284,10 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
     ccg: &impl ArrayCodegen,
     ctx: &mut EmitFuncContext<'c, '_, H>,
     op: ArrayOp,
-    inputs: Vec<BasicValueEnum<'c>>,
-    outputs: RowPromise<'c>,
+    args: EmitOpArgs<'c, '_, ExtensionOp, H>,
 ) -> Result<()> {
-    let builder = ctx.builder();
     let ts = ctx.typing_session();
+    let [i1_ty, i32_ty, i64_ty] = [ctx.iw_context().bool_type(), ctx.iw_context().i32_type(), ctx.iw_context().i64_type()];
     let sig = op
         .clone()
         .to_extension_op()
@@ -306,22 +303,36 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
         .array_type(&ts, ts.llvm_type(elem_ty)?, size)
         .as_basic_type_enum()
         .into_array_type();
+    let llvm_elem_ty = llvm_array_ty.get_element_type();
+    let llvm_elem_ptr_ty = llvm_elem_ty.ptr_type(Default::default());
+    let llvm_len_value = i64_ty.const_int(size, false);
+
+    let memcpy = get_intrinsic(ctx.get_current_module(), "llvm.memcpy", [llvm_elem_ptr_ty.into(), llvm_elem_ptr_ty.into(), i64_ty.into(), i1_ty.into()])?;
     match def {
         ArrayOpDef::new_array => {
+            let builder = ctx.builder();
             let mut array_v = llvm_array_ty.get_undef();
-            for (i, v) in inputs.into_iter().enumerate() {
+            for (i, v) in args.inputs.into_iter().enumerate() {
                 array_v = builder
                     .build_insert_value(array_v, v, i as u32, "")?
                     .into_array_value();
             }
-            outputs.finish(builder, [array_v.as_basic_value_enum()])
+            args.outputs.finish(builder, [array_v.as_basic_value_enum()])
         }
         ArrayOpDef::get => {
-            let [array_v, index_v] = inputs
+            let elem_0_ptr = {
+                let mut ptr = args.input_alloca(0);
+                if ptr.get_type() != llvm_elem_ptr_ty {
+                    ptr = ctx.builder().build_pointer_cast(ptr, llvm_elem_ptr_ty, "")?;
+                }
+                ptr
+            };
+            let [_, index_v] = args.inputs
                 .try_into()
                 .map_err(|_| anyhow!("ArrayOpDef::get expects two arguments"))?;
-            let array_v = array_v.into_array_value();
             let index_v = index_v.into_int_value();
+
+
             let res_hugr_ty = sig
                 .output()
                 .get(0)
@@ -337,23 +348,21 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
             let exit_rmb = ctx.new_row_mail_box([res_hugr_ty], "")?;
 
             let exit_block = ctx.build_positioned_new_block("", None, |ctx, bb| {
-                outputs.finish(ctx.builder(), exit_rmb.read_vec(ctx.builder(), [])?)?;
+                args.outputs.finish(ctx.builder(), exit_rmb.read_vec(ctx.builder(), [])?)?;
                 Ok(bb)
             })?;
 
             let success_block =
                 ctx.build_positioned_new_block("", Some(exit_block), |ctx, bb| {
                     let builder = ctx.builder();
-                    let elem_v = with_array_alloca(builder, array_v, |ptr| {
-                        // inside `success_block` we know `index_v` to be in
-                        // bounds.
-                        let elem_addr =
-                            unsafe { builder.build_in_bounds_gep(ptr, &[index_v], "")? };
-                        builder.build_load(elem_addr, "")
-                    })?;
+                    let elem_v = {
+                        // SAFETY: within `success_block` we know `index_v` to be in bounds.
+                        let ptr = unsafe { builder.build_in_bounds_gep(elem_0_ptr, &[index_v], "")? };
+                        builder.build_load(ptr, "")?
+                    };
                     let success_v = res_sum_ty.build_tag(builder, 1, vec![elem_v])?;
                     exit_rmb.write(ctx.builder(), [success_v.into()])?;
-                    builder.build_unconditional_branch(exit_block)?;
+                    ctx.builder().build_unconditional_branch(exit_block)?;
                     Ok(bb)
                 })?;
 
@@ -379,10 +388,18 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
             Ok(())
         }
         ArrayOpDef::set => {
-            let [array_v0, index_v, value_v] = inputs
+            let elem_0_in_ptr = {
+                let mut ptr = args.input_alloca(0);
+                if ptr.get_type() != llvm_elem_ptr_ty {
+                    ptr = ctx.builder().build_pointer_cast(ptr, llvm_elem_ptr_ty, "")?;
+                }
+                ptr
+            };
+            let [array_v, index_v, value_v] = args.inputs
                 .try_into()
                 .map_err(|_| anyhow!("ArrayOpDef::set expects three arguments"))?;
-            let array_v = array_v0.into_array_value();
+            let outputs = args.outputs;
+
             let index_v = index_v.into_int_value();
 
             let res_hugr_ty = sig
@@ -404,31 +421,39 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
                 Ok(bb)
             })?;
 
-            let success_block =
-                ctx.build_positioned_new_block("", Some(exit_block), |ctx, bb| {
-                    let builder = ctx.builder();
-                    let (elem_v, array_v) = with_array_alloca(builder, array_v, |ptr| {
-                        // inside `success_block` we know `index_v` to be in
-                        // bounds.
-                        let elem_addr =
-                            unsafe { builder.build_in_bounds_gep(ptr, &[index_v], "")? };
-                        let elem_v = builder.build_load(elem_addr, "")?;
-                        builder.build_store(elem_addr, value_v)?;
-                        let ptr = builder
-                            .build_bit_cast(
-                                ptr,
-                                array_v.get_type().ptr_type(Default::default()),
-                                "",
-                            )?
-                            .into_pointer_value();
-                        let array_v = builder.build_load(ptr, "")?;
-                        Ok((elem_v, array_v))
-                    })?;
-                    let success_v = res_sum_ty.build_tag(builder, 1, vec![elem_v, array_v])?;
-                    exit_rmb.write(ctx.builder(), [success_v.into()])?;
-                    builder.build_unconditional_branch(exit_block)?;
-                    Ok(bb)
-                })?;
+            let success_block = ctx.build_positioned_new_block("", Some(exit_block), |ctx, bb| {
+                let builder = ctx.builder();
+
+                let success_v = res_sum_ty.build_tag(builder, 1, vec![array_v.get_type().into_array_type().get_poison().into()])?;
+                let output_alloca = exit_rmb[0].alloca();
+
+                exit_rmb.write(ctx.builder(), [success_v.into()])?;
+                let elem_0_out_ptr = {
+                    let mut gep_indices = vec![i32_ty.const_zero()];
+                    let (_, indices) = res_sum_ty.gep_indices(i32_ty, 1,1)?;
+                    gep_indices.extend(indices);
+                    let mut ptr = unsafe { builder.build_in_bounds_gep(output_alloca, &gep_indices, "")? };
+                    if ptr.get_type() != llvm_elem_ptr_ty {
+                        ptr = builder.build_pointer_cast(ptr, llvm_elem_ptr_ty, "")?
+                    }
+                    ptr
+                };
+                let _ = builder.build_call(memcpy, &[elem_0_out_ptr.into(), elem_0_in_ptr.into(), llvm_len_value.into(), i1_ty.const_int(0, false).into()], "")?;
+
+                let elem_res_ptr = {
+                    let mut elem_indices = vec![i32_ty.const_zero()];
+                    elem_indices.extend(res_sum_ty.gep_indices(i32_ty, 1, 0)?.1);
+                    unsafe { builder.build_in_bounds_gep(output_alloca, &elem_indices, "")? }
+                };
+
+                // SAFETY: within `success_block` we know `index_v` to be in bounds.
+                let ptr = unsafe { builder.build_in_bounds_gep(elem_0_out_ptr, &[index_v], "")? };
+                let elem_v = builder.build_load(ptr, "")?;
+                builder.build_store(ptr, value_v)?;
+                builder.build_store(elem_res_ptr, elem_v)?;
+                builder.build_unconditional_branch(exit_block)?;
+                Ok(bb)
+            })?;
 
             let failure_block =
                 ctx.build_positioned_new_block("", Some(success_block), |ctx, bb| {
@@ -452,9 +477,17 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
             Ok(())
         }
         ArrayOpDef::swap => {
-            let [array_v0, index1_v, index2_v] = inputs
+            let elem_0_in_ptr = {
+                let mut ptr = args.input_alloca(0);
+                if ptr.get_type() != llvm_elem_ptr_ty {
+                    ptr = ctx.builder().build_pointer_cast(ptr, llvm_elem_ptr_ty, "")?;
+                }
+                ptr
+            };
+            let [array_v0, index1_v, index2_v] = args.inputs
                 .try_into()
                 .map_err(|_| anyhow!("ArrayOpDef::swap expects three arguments"))?;
+            let outputs = args.outputs;
             let array_v = array_v0.into_array_value();
             let index1_v = index1_v.into_int_value();
             let index2_v = index2_v.into_int_value();
@@ -488,28 +521,32 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
                     // the cost of worse code in cases where it cannot.
                     // For now we choose the simpler option of omitting the check.
                     let builder = ctx.builder();
-                    let array_v = with_array_alloca(builder, array_v, |ptr| {
-                        // inside `success_block` we know `index1_v` and `index2_v`
-                        // to be in bounds.
-                        let elem1_addr =
-                            unsafe { builder.build_in_bounds_gep(ptr, &[index1_v], "")? };
-                        let elem1_v = builder.build_load(elem1_addr, "")?;
-                        let elem2_addr =
-                            unsafe { builder.build_in_bounds_gep(ptr, &[index2_v], "")? };
-                        let elem2_v = builder.build_load(elem2_addr, "")?;
-                        builder.build_store(elem1_addr, elem2_v)?;
-                        builder.build_store(elem2_addr, elem1_v)?;
-                        let ptr = builder
-                            .build_bit_cast(
-                                ptr,
-                                array_v.get_type().ptr_type(Default::default()),
-                                "",
-                            )?
-                            .into_pointer_value();
-                        builder.build_load(ptr, "")
-                    })?;
-                    let success_v = res_sum_ty.build_tag(builder, 1, vec![array_v])?;
+
+                    let success_v = res_sum_ty.build_tag(builder, 1, vec![array_v.get_type().get_poison().into()])?;
+                    let output_alloca = exit_rmb[0].alloca();
                     exit_rmb.write(ctx.builder(), [success_v.into()])?;
+
+                    let elem_0_out_ptr = {
+                        let mut gep_indices = vec![i32_ty.const_zero()];
+                        let (_, indices) = res_sum_ty.gep_indices(i32_ty, 1,1)?;
+                        gep_indices.extend(indices);
+                        let mut ptr = unsafe { builder.build_in_bounds_gep(output_alloca, &gep_indices, "")? };
+                        if ptr.get_type() != llvm_elem_ptr_ty {
+                            ptr = builder.build_pointer_cast(ptr, llvm_elem_ptr_ty, "")?
+                        }
+                        ptr
+                    };
+
+                    let _ = builder.build_call(memcpy, &[elem_0_out_ptr.into(), elem_0_in_ptr.into(), llvm_len_value.into(), i1_ty.const_int(0, false).into()], "")?;
+
+                    // inside `success_block` we know `index1_v` and `index2_v`
+                    // to be in bounds.
+                    let elem1_addr = unsafe { builder.build_in_bounds_gep(elem_0_out_ptr, &[index1_v], "")? };
+                    let elem1_v = builder.build_load(elem1_addr, "")?;
+                    let elem2_addr = unsafe { builder.build_in_bounds_gep(elem_0_out_ptr, &[index2_v], "")? };
+                    let elem2_v = builder.build_load(elem2_addr, "")?;
+                    builder.build_store(elem1_addr, elem2_v)?;
+                    builder.build_store(elem2_addr, elem1_v)?;
                     builder.build_unconditional_branch(exit_block)?;
                     Ok(bb)
                 })?;
@@ -544,32 +581,32 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
             Ok(())
         }
         ArrayOpDef::pop_left => {
-            let [array_v] = inputs
+            let [array_v] = args.inputs
                 .try_into()
                 .map_err(|_| anyhow!("ArrayOpDef::pop_left expects one argument"))?;
             let r = emit_pop_op(
-                builder,
+                ctx,
                 &ts,
                 elem_ty.clone(),
                 size,
                 array_v.into_array_value(),
                 true,
             )?;
-            outputs.finish(ctx.builder(), [r])
+            args.outputs.finish(ctx.builder(), [r])
         }
         ArrayOpDef::pop_right => {
-            let [array_v] = inputs
+            let [array_v] = args.inputs
                 .try_into()
                 .map_err(|_| anyhow!("ArrayOpDef::pop_right expects one argument"))?;
             let r = emit_pop_op(
-                builder,
+                ctx,
                 &ts,
                 elem_ty.clone(),
                 size,
                 array_v.into_array_value(),
                 false,
             )?;
-            outputs.finish(ctx.builder(), [r])
+            args.outputs.finish(ctx.builder(), [r])
         }
         ArrayOpDef::discard_empty => Ok(()),
         _ => todo!(),
@@ -577,8 +614,8 @@ pub fn emit_array_op<'c, H: HugrView<Node = Node>>(
 }
 
 /// Helper function to emit the pop operations.
-fn emit_pop_op<'c>(
-    builder: &Builder<'c>,
+fn emit_pop_op<'c, H: HugrView<Node = Node>>(
+    ctx: &mut EmitFuncContext<'c, '_, H>,
     ts: &TypingSession<'c, '_>,
     elem_ty: HugrType,
     size: u64,
@@ -590,34 +627,38 @@ fn emit_pop_op<'c>(
         array_type(size.saturating_add_signed(-1), elem_ty),
     ]))?;
     if size == 0 {
-        return Ok(ret_ty.build_tag(builder, 0, vec![])?.into());
+        return Ok(ret_ty.build_tag(ctx.builder(), 0, vec![])?.into());
     }
-    let ctx = builder.get_insert_block().unwrap().get_context();
-    let (elem_v, array_v) = with_array_alloca(builder, array_v, |ptr| {
-        let (elem_ptr, ptr) = {
-            if pop_left {
-                let rest_ptr =
-                    unsafe { builder.build_gep(ptr, &[ctx.i32_type().const_int(1, false)], "") }?;
-                (ptr, rest_ptr)
-            } else {
-                let elem_ptr = unsafe {
-                    builder.build_gep(ptr, &[ctx.i32_type().const_int(size - 1, false)], "")
-                }?;
-                (elem_ptr, ptr)
-            }
-        };
-        let elem_v = builder.build_load(elem_ptr, "")?;
-        let new_array_ty = array_v
-            .get_type()
-            .get_element_type()
-            .array_type(size as u32 - 1);
-        let ptr = builder
-            .build_bit_cast(ptr, new_array_ty.ptr_type(Default::default()), "")?
-            .into_pointer_value();
-        let array_v = builder.build_load(ptr, "")?;
-        Ok((elem_v, array_v))
-    })?;
-    Ok(ret_ty.build_tag(builder, 1, vec![elem_v, array_v])?.into())
+    let iw_ctx = ctx.iw_context();
+    let (ptr, _) = build_array_alloca(ctx, array_v)?;
+    let (elem_ptr, ptr) = {
+        if pop_left {
+            let rest_ptr = unsafe {
+                ctx.builder()
+                    .build_gep(ptr, &[iw_ctx.i32_type().const_int(1, false)], "")
+            }?;
+            (ptr, rest_ptr)
+        } else {
+            let elem_ptr = unsafe {
+                ctx.builder()
+                    .build_gep(ptr, &[iw_ctx.i32_type().const_int(size - 1, false)], "")
+            }?;
+            (elem_ptr, ptr)
+        }
+    };
+    let elem_v = ctx.builder().build_load(elem_ptr, "")?;
+    let new_array_ty = array_v
+        .get_type()
+        .get_element_type()
+        .array_type(size as u32 - 1);
+    let ptr = ctx
+        .builder()
+        .build_bit_cast(ptr, new_array_ty.ptr_type(Default::default()), "")?
+        .into_pointer_value();
+    let array_v = ctx.builder().build_load(ptr, "")?;
+    Ok(ret_ty
+        .build_tag(ctx.builder(), 1, vec![elem_v, array_v])?
+        .into())
 }
 
 /// Emits an [ArrayRepeat] op.
@@ -626,10 +667,9 @@ pub fn emit_repeat_op<'c, H: HugrView<Node = Node>>(
     op: ArrayRepeat,
     func: BasicValueEnum<'c>,
 ) -> Result<BasicValueEnum<'c>> {
-    let builder = ctx.builder();
     let array_len = ctx.iw_context().i32_type().const_int(op.size, false);
     let array_ty = ctx.llvm_type(&op.elem_ty)?.array_type(op.size as u32);
-    let (ptr, array_ptr) = build_array_alloca(builder, array_ty.get_undef())?;
+    let (ptr, array_ptr) = build_array_alloca(ctx, array_ty.get_undef())?;
     build_loop(ctx, array_len, |ctx, idx| {
         let builder = ctx.builder();
         let func_ptr = CallableValue::try_from(func.into_pointer_value())
@@ -659,18 +699,20 @@ pub fn emit_scan_op<'c, H: HugrView<Node = Node>>(
     func: BasicValueEnum<'c>,
     initial_accs: &[BasicValueEnum<'c>],
 ) -> Result<(BasicValueEnum<'c>, Vec<BasicValueEnum<'c>>)> {
-    let builder = ctx.builder();
     let ts = ctx.typing_session();
     let array_len = ctx.iw_context().i32_type().const_int(op.size, false);
     let tgt_array_ty = ts.llvm_type(&op.tgt_ty)?.array_type(op.size as u32);
-    let (src_ptr, _) = build_array_alloca(builder, src_array.into_array_value())?;
-    let (tgt_ptr, tgt_array_ptr) = build_array_alloca(builder, tgt_array_ty.get_undef())?;
+    let (src_ptr, _) = build_array_alloca(ctx, src_array.into_array_value())?;
+    let (tgt_ptr, tgt_array_ptr) = build_array_alloca(ctx, tgt_array_ty.get_undef())?;
 
     let acc_tys: Vec<_> = op.acc_tys.iter().map(|ty| ts.llvm_type(ty)).try_collect()?;
-    let acc_ptrs: Vec<_> = acc_tys
-        .iter()
-        .map(|ty| builder.build_alloca(*ty, ""))
-        .try_collect()?;
+    let acc_ptrs: Vec<_> = ctx.build_prologue(|builder| {
+        acc_tys
+            .iter()
+            .map(|ty| builder.build_alloca(*ty, ""))
+            .try_collect()
+    })?;
+    let builder = ctx.builder();
     for (ptr, initial_val) in acc_ptrs.iter().zip(initial_accs) {
         builder.build_store(*ptr, *initial_val)?;
     }
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@llvm14.snap
index bc9aa19c6..745c712d6 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@llvm14.snap
@@ -18,195 +18,195 @@ source_filename = "test_context"
 
 define void @_hl.main.1() {
 alloca_block:
+  %0 = alloca i64, i32 2, align 8
+  %1 = alloca i64, i32 2, align 8
+  %2 = alloca i64, i32 2, align 8
+  %3 = alloca i64, i32 2, align 8
+  %4 = alloca i64, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  %0 = insertvalue [2 x i64] undef, i64 1, 0
-  %1 = insertvalue [2 x i64] %0, i64 2, 1
-  %2 = icmp ult i64 0, 2
-  %3 = icmp ult i64 1, 2
-  %4 = and i1 %2, %3
-  br i1 %4, label %7, label %5
-
-5:                                                ; preds = %entry_block
-  %6 = insertvalue { i1, [2 x i64] } { i1 false, [2 x i64] poison }, [2 x i64] %1, 1
-  br label %17
-
-7:                                                ; preds = %entry_block
-  %8 = alloca i64, i32 2, align 8
-  %9 = bitcast i64* %8 to [2 x i64]*
-  store [2 x i64] %1, [2 x i64]* %9, align 4
-  %10 = getelementptr inbounds i64, i64* %8, i64 0
-  %11 = load i64, i64* %10, align 4
-  %12 = getelementptr inbounds i64, i64* %8, i64 1
-  %13 = load i64, i64* %12, align 4
-  store i64 %13, i64* %10, align 4
-  store i64 %11, i64* %12, align 4
-  %14 = bitcast i64* %8 to [2 x i64]*
-  %15 = load [2 x i64], [2 x i64]* %14, align 4
-  %16 = insertvalue { i1, [2 x i64] } { i1 true, [2 x i64] poison }, [2 x i64] %15, 1
-  br label %17
-
-17:                                               ; preds = %5, %7
-  %"0.0" = phi { i1, [2 x i64] } [ %16, %7 ], [ %6, %5 ]
-  %18 = extractvalue { i1, [2 x i64] } %"0.0", 0
-  switch i1 %18, label %19 [
-    i1 true, label %21
+  %5 = insertvalue [2 x i64] undef, i64 1, 0
+  %6 = insertvalue [2 x i64] %5, i64 2, 1
+  %7 = icmp ult i64 0, 2
+  %8 = icmp ult i64 1, 2
+  %9 = and i1 %7, %8
+  br i1 %9, label %12, label %10
+
+10:                                               ; preds = %entry_block
+  %11 = insertvalue { i1, [2 x i64] } { i1 false, [2 x i64] poison }, [2 x i64] %6, 1
+  br label %21
+
+12:                                               ; preds = %entry_block
+  %13 = bitcast i64* %0 to [2 x i64]*
+  store [2 x i64] %6, [2 x i64]* %13, align 4
+  %14 = getelementptr inbounds i64, i64* %0, i64 0
+  %15 = load i64, i64* %14, align 4
+  %16 = getelementptr inbounds i64, i64* %0, i64 1
+  %17 = load i64, i64* %16, align 4
+  store i64 %17, i64* %14, align 4
+  store i64 %15, i64* %16, align 4
+  %18 = bitcast i64* %0 to [2 x i64]*
+  %19 = load [2 x i64], [2 x i64]* %18, align 4
+  %20 = insertvalue { i1, [2 x i64] } { i1 true, [2 x i64] poison }, [2 x i64] %19, 1
+  br label %21
+
+21:                                               ; preds = %10, %12
+  %"0.0" = phi { i1, [2 x i64] } [ %20, %12 ], [ %11, %10 ]
+  %22 = extractvalue { i1, [2 x i64] } %"0.0", 0
+  switch i1 %22, label %23 [
+    i1 true, label %25
   ]
 
-19:                                               ; preds = %17
-  %20 = extractvalue { i1, [2 x i64] } %"0.0", 1
+23:                                               ; preds = %21
+  %24 = extractvalue { i1, [2 x i64] } %"0.0", 1
   br label %cond_16_case_0
 
-21:                                               ; preds = %17
-  %22 = extractvalue { i1, [2 x i64] } %"0.0", 1
+25:                                               ; preds = %21
+  %26 = extractvalue { i1, [2 x i64] } %"0.0", 1
   br label %cond_16_case_1
 
-cond_16_case_0:                                   ; preds = %19
-  %23 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @0, i32 0, i32 0) }, 0
-  %24 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @0, i32 0, i32 0) }, 1
-  %25 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template, i32 0, i32 0), i32 %23, i8* %24)
+cond_16_case_0:                                   ; preds = %23
+  %27 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @0, i32 0, i32 0) }, 0
+  %28 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @0, i32 0, i32 0) }, 1
+  %29 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template, i32 0, i32 0), i32 %27, i8* %28)
   call void @abort()
   br label %cond_exit_16
 
-cond_16_case_1:                                   ; preds = %21
+cond_16_case_1:                                   ; preds = %25
   br label %cond_exit_16
 
 cond_exit_16:                                     ; preds = %cond_16_case_1, %cond_16_case_0
-  %"08.0" = phi [2 x i64] [ zeroinitializer, %cond_16_case_0 ], [ %22, %cond_16_case_1 ]
-  %26 = icmp ult i64 0, 2
-  br i1 %26, label %28, label %27
-
-27:                                               ; preds = %cond_exit_16
-  br label %34
-
-28:                                               ; preds = %cond_exit_16
-  %29 = alloca i64, i32 2, align 8
-  %30 = bitcast i64* %29 to [2 x i64]*
-  store [2 x i64] %"08.0", [2 x i64]* %30, align 4
-  %31 = getelementptr inbounds i64, i64* %29, i64 0
-  %32 = load i64, i64* %31, align 4
-  %33 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %32, 1
-  br label %34
-
-34:                                               ; preds = %27, %28
-  %"020.0" = phi { i1, i64 } [ %33, %28 ], [ { i1 false, i64 poison }, %27 ]
-  %35 = extractvalue { i1, i64 } %"020.0", 0
-  switch i1 %35, label %36 [
-    i1 true, label %37
+  %"014.0" = phi [2 x i64] [ zeroinitializer, %cond_16_case_0 ], [ %26, %cond_16_case_1 ]
+  %30 = icmp ult i64 0, 2
+  br i1 %30, label %32, label %31
+
+31:                                               ; preds = %cond_exit_16
+  br label %37
+
+32:                                               ; preds = %cond_exit_16
+  %33 = bitcast i64* %1 to [2 x i64]*
+  store [2 x i64] %"014.0", [2 x i64]* %33, align 4
+  %34 = getelementptr inbounds i64, i64* %1, i64 0
+  %35 = load i64, i64* %34, align 4
+  %36 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %35, 1
+  br label %37
+
+37:                                               ; preds = %31, %32
+  %"030.0" = phi { i1, i64 } [ %36, %32 ], [ { i1 false, i64 poison }, %31 ]
+  %38 = extractvalue { i1, i64 } %"030.0", 0
+  switch i1 %38, label %39 [
+    i1 true, label %40
   ]
 
-36:                                               ; preds = %34
+39:                                               ; preds = %37
   br label %cond_28_case_0
 
-37:                                               ; preds = %34
-  %38 = extractvalue { i1, i64 } %"020.0", 1
+40:                                               ; preds = %37
+  %41 = extractvalue { i1, i64 } %"030.0", 1
   br label %cond_28_case_1
 
-cond_28_case_0:                                   ; preds = %36
-  %39 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @1, i32 0, i32 0) }, 0
-  %40 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @1, i32 0, i32 0) }, 1
-  %41 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.1, i32 0, i32 0), i32 %39, i8* %40)
+cond_28_case_0:                                   ; preds = %39
+  %42 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @1, i32 0, i32 0) }, 0
+  %43 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @1, i32 0, i32 0) }, 1
+  %44 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.1, i32 0, i32 0), i32 %42, i8* %43)
   call void @abort()
   br label %cond_exit_28
 
-cond_28_case_1:                                   ; preds = %37
+cond_28_case_1:                                   ; preds = %40
   br label %cond_exit_28
 
 cond_exit_28:                                     ; preds = %cond_28_case_1, %cond_28_case_0
-  %"023.0" = phi i64 [ 0, %cond_28_case_0 ], [ %38, %cond_28_case_1 ]
-  %42 = icmp ult i64 1, 2
-  br i1 %42, label %46, label %43
-
-43:                                               ; preds = %cond_exit_28
-  %44 = insertvalue { i1, i64, [2 x i64] } { i1 false, i64 poison, [2 x i64] poison }, i64 %"023.0", 1
-  %45 = insertvalue { i1, i64, [2 x i64] } %44, [2 x i64] %"08.0", 2
-  br label %55
+  %"034.0" = phi i64 [ 0, %cond_28_case_0 ], [ %41, %cond_28_case_1 ]
+  %45 = icmp ult i64 1, 2
+  br i1 %45, label %49, label %46
 
 46:                                               ; preds = %cond_exit_28
-  %47 = alloca i64, i32 2, align 8
-  %48 = bitcast i64* %47 to [2 x i64]*
-  store [2 x i64] %"08.0", [2 x i64]* %48, align 4
-  %49 = getelementptr inbounds i64, i64* %47, i64 1
-  %50 = load i64, i64* %49, align 4
-  store i64 %"023.0", i64* %49, align 4
-  %51 = bitcast i64* %47 to [2 x i64]*
-  %52 = load [2 x i64], [2 x i64]* %51, align 4
-  %53 = insertvalue { i1, i64, [2 x i64] } { i1 true, i64 poison, [2 x i64] poison }, i64 %50, 1
-  %54 = insertvalue { i1, i64, [2 x i64] } %53, [2 x i64] %52, 2
-  br label %55
-
-55:                                               ; preds = %43, %46
-  %"033.0" = phi { i1, i64, [2 x i64] } [ %54, %46 ], [ %45, %43 ]
-  %56 = extractvalue { i1, i64, [2 x i64] } %"033.0", 0
-  switch i1 %56, label %57 [
-    i1 true, label %60
+  %47 = insertvalue { i1, i64, [2 x i64] } { i1 false, i64 poison, [2 x i64] poison }, i64 %"034.0", 1
+  %48 = insertvalue { i1, i64, [2 x i64] } %47, [2 x i64] %"014.0", 2
+  br label %57
+
+49:                                               ; preds = %cond_exit_28
+  %50 = bitcast i64* %2 to [2 x i64]*
+  store [2 x i64] %"014.0", [2 x i64]* %50, align 4
+  %51 = getelementptr inbounds i64, i64* %2, i64 1
+  %52 = load i64, i64* %51, align 4
+  store i64 %"034.0", i64* %51, align 4
+  %53 = bitcast i64* %2 to [2 x i64]*
+  %54 = load [2 x i64], [2 x i64]* %53, align 4
+  %55 = insertvalue { i1, i64, [2 x i64] } { i1 true, i64 poison, [2 x i64] poison }, i64 %52, 1
+  %56 = insertvalue { i1, i64, [2 x i64] } %55, [2 x i64] %54, 2
+  br label %57
+
+57:                                               ; preds = %46, %49
+  %"048.0" = phi { i1, i64, [2 x i64] } [ %56, %49 ], [ %48, %46 ]
+  %58 = extractvalue { i1, i64, [2 x i64] } %"048.0", 0
+  switch i1 %58, label %59 [
+    i1 true, label %62
   ]
 
-57:                                               ; preds = %55
-  %58 = extractvalue { i1, i64, [2 x i64] } %"033.0", 1
-  %59 = extractvalue { i1, i64, [2 x i64] } %"033.0", 2
+59:                                               ; preds = %57
+  %60 = extractvalue { i1, i64, [2 x i64] } %"048.0", 1
+  %61 = extractvalue { i1, i64, [2 x i64] } %"048.0", 2
   br label %cond_40_case_0
 
-60:                                               ; preds = %55
-  %61 = extractvalue { i1, i64, [2 x i64] } %"033.0", 1
-  %62 = extractvalue { i1, i64, [2 x i64] } %"033.0", 2
+62:                                               ; preds = %57
+  %63 = extractvalue { i1, i64, [2 x i64] } %"048.0", 1
+  %64 = extractvalue { i1, i64, [2 x i64] } %"048.0", 2
   br label %cond_40_case_1
 
-cond_40_case_0:                                   ; preds = %57
-  %63 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @2, i32 0, i32 0) }, 0
-  %64 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @2, i32 0, i32 0) }, 1
-  %65 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.2, i32 0, i32 0), i32 %63, i8* %64)
+cond_40_case_0:                                   ; preds = %59
+  %65 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @2, i32 0, i32 0) }, 0
+  %66 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @2, i32 0, i32 0) }, 1
+  %67 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.2, i32 0, i32 0), i32 %65, i8* %66)
   call void @abort()
   br label %cond_exit_40
 
-cond_40_case_1:                                   ; preds = %60
+cond_40_case_1:                                   ; preds = %62
   br label %cond_exit_40
 
 cond_exit_40:                                     ; preds = %cond_40_case_1, %cond_40_case_0
-  %"036.0" = phi i64 [ 0, %cond_40_case_0 ], [ %61, %cond_40_case_1 ]
-  %"1.0" = phi [2 x i64] [ zeroinitializer, %cond_40_case_0 ], [ %62, %cond_40_case_1 ]
-  %66 = alloca i64, i32 2, align 8
-  %67 = bitcast i64* %66 to [2 x i64]*
-  store [2 x i64] %"1.0", [2 x i64]* %67, align 4
-  %68 = getelementptr i64, i64* %66, i32 1
-  %69 = load i64, i64* %66, align 4
-  %70 = bitcast i64* %68 to [1 x i64]*
-  %71 = load [1 x i64], [1 x i64]* %70, align 4
-  %72 = insertvalue { i1, i64, [1 x i64] } { i1 true, i64 poison, [1 x i64] poison }, i64 %69, 1
-  %73 = insertvalue { i1, i64, [1 x i64] } %72, [1 x i64] %71, 2
-  %74 = extractvalue { i1, i64, [1 x i64] } %73, 0
-  switch i1 %74, label %75 [
-    i1 true, label %76
+  %"052.0" = phi i64 [ 0, %cond_40_case_0 ], [ %63, %cond_40_case_1 ]
+  %"1.0" = phi [2 x i64] [ zeroinitializer, %cond_40_case_0 ], [ %64, %cond_40_case_1 ]
+  %68 = bitcast i64* %3 to [2 x i64]*
+  store [2 x i64] %"1.0", [2 x i64]* %68, align 4
+  %69 = getelementptr i64, i64* %3, i32 1
+  %70 = load i64, i64* %3, align 4
+  %71 = bitcast i64* %69 to [1 x i64]*
+  %72 = load [1 x i64], [1 x i64]* %71, align 4
+  %73 = insertvalue { i1, i64, [1 x i64] } { i1 true, i64 poison, [1 x i64] poison }, i64 %70, 1
+  %74 = insertvalue { i1, i64, [1 x i64] } %73, [1 x i64] %72, 2
+  %75 = extractvalue { i1, i64, [1 x i64] } %74, 0
+  switch i1 %75, label %76 [
+    i1 true, label %77
   ]
 
-75:                                               ; preds = %cond_exit_40
+76:                                               ; preds = %cond_exit_40
   br label %cond_51_case_0
 
-76:                                               ; preds = %cond_exit_40
-  %77 = extractvalue { i1, i64, [1 x i64] } %73, 1
-  %78 = extractvalue { i1, i64, [1 x i64] } %73, 2
+77:                                               ; preds = %cond_exit_40
+  %78 = extractvalue { i1, i64, [1 x i64] } %74, 1
+  %79 = extractvalue { i1, i64, [1 x i64] } %74, 2
   br label %cond_51_case_1
 
-cond_51_case_0:                                   ; preds = %75
-  %79 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @3, i32 0, i32 0) }, 0
-  %80 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @3, i32 0, i32 0) }, 1
-  %81 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.3, i32 0, i32 0), i32 %79, i8* %80)
+cond_51_case_0:                                   ; preds = %76
+  %80 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @3, i32 0, i32 0) }, 0
+  %81 = extractvalue { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @3, i32 0, i32 0) }, 1
+  %82 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.3, i32 0, i32 0), i32 %80, i8* %81)
   call void @abort()
   br label %cond_exit_51
 
-cond_51_case_1:                                   ; preds = %76
+cond_51_case_1:                                   ; preds = %77
   br label %cond_exit_51
 
 cond_exit_51:                                     ; preds = %cond_51_case_1, %cond_51_case_0
-  %"056.0" = phi i64 [ 0, %cond_51_case_0 ], [ %77, %cond_51_case_1 ]
-  %"157.0" = phi [1 x i64] [ zeroinitializer, %cond_51_case_0 ], [ %78, %cond_51_case_1 ]
-  %82 = alloca i64, align 8
-  %83 = bitcast i64* %82 to [1 x i64]*
-  store [1 x i64] %"157.0", [1 x i64]* %83, align 4
-  %84 = getelementptr i64, i64* %82, i32 0
+  %"077.0" = phi i64 [ 0, %cond_51_case_0 ], [ %78, %cond_51_case_1 ]
+  %"178.0" = phi [1 x i64] [ zeroinitializer, %cond_51_case_0 ], [ %79, %cond_51_case_1 ]
+  %83 = bitcast i64* %4 to [1 x i64]*
+  store [1 x i64] %"178.0", [1 x i64]* %83, align 4
+  %84 = getelementptr i64, i64* %4, i32 0
   %85 = load i64, i64* %84, align 4
-  %86 = bitcast i64* %82 to [0 x i64]*
+  %86 = bitcast i64* %4 to [0 x i64]*
   %87 = load [0 x i64], [0 x i64]* %86, align 4
   %88 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %85, 1
   %89 = extractvalue { i1, i64 } %88, 0
@@ -232,7 +232,7 @@ cond_62_case_1:                                   ; preds = %91
   br label %cond_exit_62
 
 cond_exit_62:                                     ; preds = %cond_62_case_1, %cond_62_case_0
-  %"071.0" = phi i64 [ 0, %cond_62_case_0 ], [ %92, %cond_62_case_1 ]
+  %"095.0" = phi i64 [ 0, %cond_62_case_0 ], [ %92, %cond_62_case_1 ]
   ret void
 }
 
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@pre-mem2reg@llvm14.snap
index 9b294486d..b5c9379a2 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_all_ops@pre-mem2reg@llvm14.snap
@@ -24,61 +24,66 @@ alloca_block:
   %"8_0" = alloca i64, align 8
   %"14_0" = alloca { i1, [2 x i64] }, align 8
   %"0" = alloca { i1, [2 x i64] }, align 8
+  %0 = alloca i64, i32 2, align 8
   %"16_0" = alloca [2 x i64], align 8
-  %"08" = alloca [2 x i64], align 8
-  %"010" = alloca [2 x i64], align 8
+  %"014" = alloca [2 x i64], align 8
+  %"016" = alloca [2 x i64], align 8
   %"21_0" = alloca { i32, i8* }, align 8
   %"18_0" = alloca [2 x i64], align 8
   %"22_0" = alloca [2 x i64], align 8
-  %"015" = alloca [2 x i64], align 8
+  %"023" = alloca [2 x i64], align 8
   %"24_0" = alloca [2 x i64], align 8
   %"26_0" = alloca { i1, i64 }, align 8
-  %"020" = alloca { i1, i64 }, align 8
+  %"030" = alloca { i1, i64 }, align 8
+  %1 = alloca i64, i32 2, align 8
   %"28_0" = alloca i64, align 8
-  %"023" = alloca i64, align 8
+  %"034" = alloca i64, align 8
   %"33_0" = alloca { i32, i8* }, align 8
   %"34_0" = alloca i64, align 8
-  %"027" = alloca i64, align 8
+  %"039" = alloca i64, align 8
   %"36_0" = alloca i64, align 8
   %"38_0" = alloca { i1, i64, [2 x i64] }, align 8
-  %"033" = alloca { i1, i64, [2 x i64] }, align 8
+  %"048" = alloca { i1, i64, [2 x i64] }, align 8
+  %2 = alloca i64, i32 2, align 8
   %"40_0" = alloca i64, align 8
   %"40_1" = alloca [2 x i64], align 8
-  %"036" = alloca i64, align 8
+  %"052" = alloca i64, align 8
   %"1" = alloca [2 x i64], align 8
-  %"039" = alloca i64, align 8
-  %"140" = alloca [2 x i64], align 8
+  %"055" = alloca i64, align 8
+  %"156" = alloca [2 x i64], align 8
   %"45_0" = alloca { i32, i8* }, align 8
   %"42_0" = alloca i64, align 8
   %"42_1" = alloca [2 x i64], align 8
   %"46_0" = alloca i64, align 8
   %"46_1" = alloca [2 x i64], align 8
-  %"048" = alloca i64, align 8
-  %"149" = alloca [2 x i64], align 8
+  %"067" = alloca i64, align 8
+  %"168" = alloca [2 x i64], align 8
   %"48_0" = alloca i64, align 8
   %"48_1" = alloca [2 x i64], align 8
   %"50_0" = alloca { i1, i64, [1 x i64] }, align 8
+  %3 = alloca i64, i32 2, align 8
   %"51_0" = alloca i64, align 8
   %"51_1" = alloca [1 x i64], align 8
-  %"056" = alloca i64, align 8
-  %"157" = alloca [1 x i64], align 8
+  %"077" = alloca i64, align 8
+  %"178" = alloca [1 x i64], align 8
   %"56_0" = alloca { i32, i8* }, align 8
   %"57_0" = alloca i64, align 8
   %"57_1" = alloca [1 x i64], align 8
-  %"063" = alloca i64, align 8
-  %"164" = alloca [1 x i64], align 8
+  %"085" = alloca i64, align 8
+  %"186" = alloca [1 x i64], align 8
   %"59_0" = alloca i64, align 8
   %"59_1" = alloca [1 x i64], align 8
   %"61_0" = alloca { i1, i64 }, align 8
+  %4 = alloca i64, align 8
   %"62_0" = alloca i64, align 8
   %"62_1" = alloca [0 x i64], align 8
-  %"071" = alloca i64, align 8
-  %"172" = alloca [0 x i64], align 8
+  %"095" = alloca i64, align 8
+  %"196" = alloca [0 x i64], align 8
   %"67_0" = alloca { i32, i8* }, align 8
   %"68_0" = alloca i64, align 8
   %"68_1" = alloca [0 x i64], align 8
-  %"078" = alloca i64, align 8
-  %"179" = alloca [0 x i64], align 8
+  %"0103" = alloca i64, align 8
+  %"1104" = alloca [0 x i64], align 8
   %"70_0" = alloca i64, align 8
   %"70_1" = alloca [0 x i64], align 8
   br label %entry_block
@@ -88,297 +93,316 @@ entry_block:                                      ; preds = %alloca_block
   store i64 1, i64* %"10_0", align 4
   %"10_01" = load i64, i64* %"10_0", align 4
   %"12_02" = load i64, i64* %"12_0", align 4
-  %0 = insertvalue [2 x i64] undef, i64 %"10_01", 0
-  %1 = insertvalue [2 x i64] %0, i64 %"12_02", 1
-  store [2 x i64] %1, [2 x i64]* %"13_0", align 4
+  %"10_03" = load i64, i64* %"10_0", align 4
+  %"12_04" = load i64, i64* %"12_0", align 4
+  %5 = insertvalue [2 x i64] undef, i64 %"10_03", 0
+  %6 = insertvalue [2 x i64] %5, i64 %"12_04", 1
+  store [2 x i64] %6, [2 x i64]* %"13_0", align 4
   store i64 0, i64* %"8_0", align 4
-  %"13_03" = load [2 x i64], [2 x i64]* %"13_0", align 4
-  %"8_04" = load i64, i64* %"8_0", align 4
-  %"10_05" = load i64, i64* %"10_0", align 4
-  %2 = icmp ult i64 %"8_04", 2
-  %3 = icmp ult i64 %"10_05", 2
-  %4 = and i1 %2, %3
-  br i1 %4, label %7, label %5
-
-5:                                                ; preds = %entry_block
-  %6 = insertvalue { i1, [2 x i64] } { i1 false, [2 x i64] poison }, [2 x i64] %"13_03", 1
-  store { i1, [2 x i64] } %6, { i1, [2 x i64] }* %"0", align 4
-  br label %17
-
-7:                                                ; preds = %entry_block
-  %8 = alloca i64, i32 2, align 8
-  %9 = bitcast i64* %8 to [2 x i64]*
-  store [2 x i64] %"13_03", [2 x i64]* %9, align 4
-  %10 = getelementptr inbounds i64, i64* %8, i64 %"8_04"
-  %11 = load i64, i64* %10, align 4
-  %12 = getelementptr inbounds i64, i64* %8, i64 %"10_05"
-  %13 = load i64, i64* %12, align 4
-  store i64 %13, i64* %10, align 4
-  store i64 %11, i64* %12, align 4
-  %14 = bitcast i64* %8 to [2 x i64]*
-  %15 = load [2 x i64], [2 x i64]* %14, align 4
-  %16 = insertvalue { i1, [2 x i64] } { i1 true, [2 x i64] poison }, [2 x i64] %15, 1
-  store { i1, [2 x i64] } %16, { i1, [2 x i64] }* %"0", align 4
-  br label %17
-
-17:                                               ; preds = %5, %7
-  %"06" = load { i1, [2 x i64] }, { i1, [2 x i64] }* %"0", align 4
-  store { i1, [2 x i64] } %"06", { i1, [2 x i64] }* %"14_0", align 4
-  %"14_07" = load { i1, [2 x i64] }, { i1, [2 x i64] }* %"14_0", align 4
-  %18 = extractvalue { i1, [2 x i64] } %"14_07", 0
-  switch i1 %18, label %19 [
-    i1 true, label %21
+  %"13_05" = load [2 x i64], [2 x i64]* %"13_0", align 4
+  %"8_06" = load i64, i64* %"8_0", align 4
+  %"10_07" = load i64, i64* %"10_0", align 4
+  %"13_08" = load [2 x i64], [2 x i64]* %"13_0", align 4
+  %"8_09" = load i64, i64* %"8_0", align 4
+  %"10_010" = load i64, i64* %"10_0", align 4
+  %7 = icmp ult i64 %"8_09", 2
+  %8 = icmp ult i64 %"10_010", 2
+  %9 = and i1 %7, %8
+  br i1 %9, label %12, label %10
+
+10:                                               ; preds = %entry_block
+  %11 = insertvalue { i1, [2 x i64] } { i1 false, [2 x i64] poison }, [2 x i64] %"13_08", 1
+  store { i1, [2 x i64] } %11, { i1, [2 x i64] }* %"0", align 4
+  br label %21
+
+12:                                               ; preds = %entry_block
+  %13 = bitcast i64* %0 to [2 x i64]*
+  store [2 x i64] %"13_08", [2 x i64]* %13, align 4
+  %14 = getelementptr inbounds i64, i64* %0, i64 %"8_09"
+  %15 = load i64, i64* %14, align 4
+  %16 = getelementptr inbounds i64, i64* %0, i64 %"10_010"
+  %17 = load i64, i64* %16, align 4
+  store i64 %17, i64* %14, align 4
+  store i64 %15, i64* %16, align 4
+  %18 = bitcast i64* %0 to [2 x i64]*
+  %19 = load [2 x i64], [2 x i64]* %18, align 4
+  %20 = insertvalue { i1, [2 x i64] } { i1 true, [2 x i64] poison }, [2 x i64] %19, 1
+  store { i1, [2 x i64] } %20, { i1, [2 x i64] }* %"0", align 4
+  br label %21
+
+21:                                               ; preds = %10, %12
+  %"011" = load { i1, [2 x i64] }, { i1, [2 x i64] }* %"0", align 4
+  store { i1, [2 x i64] } %"011", { i1, [2 x i64] }* %"14_0", align 4
+  %"14_012" = load { i1, [2 x i64] }, { i1, [2 x i64] }* %"14_0", align 4
+  %"14_013" = load { i1, [2 x i64] }, { i1, [2 x i64] }* %"14_0", align 4
+  %22 = extractvalue { i1, [2 x i64] } %"14_013", 0
+  switch i1 %22, label %23 [
+    i1 true, label %25
   ]
 
-19:                                               ; preds = %17
-  %20 = extractvalue { i1, [2 x i64] } %"14_07", 1
-  store [2 x i64] %20, [2 x i64]* %"010", align 4
+23:                                               ; preds = %21
+  %24 = extractvalue { i1, [2 x i64] } %"14_013", 1
+  store [2 x i64] %24, [2 x i64]* %"016", align 4
   br label %cond_16_case_0
 
-21:                                               ; preds = %17
-  %22 = extractvalue { i1, [2 x i64] } %"14_07", 1
-  store [2 x i64] %22, [2 x i64]* %"015", align 4
+25:                                               ; preds = %21
+  %26 = extractvalue { i1, [2 x i64] } %"14_013", 1
+  store [2 x i64] %26, [2 x i64]* %"023", align 4
   br label %cond_16_case_1
 
-cond_16_case_0:                                   ; preds = %19
-  %"011" = load [2 x i64], [2 x i64]* %"010", align 4
+cond_16_case_0:                                   ; preds = %23
+  %"017" = load [2 x i64], [2 x i64]* %"016", align 4
   store { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @0, i32 0, i32 0) }, { i32, i8* }* %"21_0", align 8
-  store [2 x i64] %"011", [2 x i64]* %"18_0", align 4
-  %"21_012" = load { i32, i8* }, { i32, i8* }* %"21_0", align 8
-  %"18_013" = load [2 x i64], [2 x i64]* %"18_0", align 4
-  %23 = extractvalue { i32, i8* } %"21_012", 0
-  %24 = extractvalue { i32, i8* } %"21_012", 1
-  %25 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template, i32 0, i32 0), i32 %23, i8* %24)
+  store [2 x i64] %"017", [2 x i64]* %"18_0", align 4
+  %"21_018" = load { i32, i8* }, { i32, i8* }* %"21_0", align 8
+  %"18_019" = load [2 x i64], [2 x i64]* %"18_0", align 4
+  %"21_020" = load { i32, i8* }, { i32, i8* }* %"21_0", align 8
+  %"18_021" = load [2 x i64], [2 x i64]* %"18_0", align 4
+  %27 = extractvalue { i32, i8* } %"21_020", 0
+  %28 = extractvalue { i32, i8* } %"21_020", 1
+  %29 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template, i32 0, i32 0), i32 %27, i8* %28)
   call void @abort()
   store [2 x i64] zeroinitializer, [2 x i64]* %"22_0", align 4
-  %"22_014" = load [2 x i64], [2 x i64]* %"22_0", align 4
-  store [2 x i64] %"22_014", [2 x i64]* %"08", align 4
+  %"22_022" = load [2 x i64], [2 x i64]* %"22_0", align 4
+  store [2 x i64] %"22_022", [2 x i64]* %"014", align 4
   br label %cond_exit_16
 
-cond_16_case_1:                                   ; preds = %21
-  %"016" = load [2 x i64], [2 x i64]* %"015", align 4
-  store [2 x i64] %"016", [2 x i64]* %"24_0", align 4
-  %"24_017" = load [2 x i64], [2 x i64]* %"24_0", align 4
-  store [2 x i64] %"24_017", [2 x i64]* %"08", align 4
+cond_16_case_1:                                   ; preds = %25
+  %"024" = load [2 x i64], [2 x i64]* %"023", align 4
+  store [2 x i64] %"024", [2 x i64]* %"24_0", align 4
+  %"24_025" = load [2 x i64], [2 x i64]* %"24_0", align 4
+  store [2 x i64] %"24_025", [2 x i64]* %"014", align 4
   br label %cond_exit_16
 
 cond_exit_16:                                     ; preds = %cond_16_case_1, %cond_16_case_0
-  %"09" = load [2 x i64], [2 x i64]* %"08", align 4
-  store [2 x i64] %"09", [2 x i64]* %"16_0", align 4
-  %"16_018" = load [2 x i64], [2 x i64]* %"16_0", align 4
-  %"8_019" = load i64, i64* %"8_0", align 4
-  %26 = icmp ult i64 %"8_019", 2
-  br i1 %26, label %28, label %27
-
-27:                                               ; preds = %cond_exit_16
-  store { i1, i64 } { i1 false, i64 poison }, { i1, i64 }* %"020", align 4
-  br label %34
-
-28:                                               ; preds = %cond_exit_16
-  %29 = alloca i64, i32 2, align 8
-  %30 = bitcast i64* %29 to [2 x i64]*
-  store [2 x i64] %"16_018", [2 x i64]* %30, align 4
-  %31 = getelementptr inbounds i64, i64* %29, i64 %"8_019"
-  %32 = load i64, i64* %31, align 4
-  %33 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %32, 1
-  store { i1, i64 } %33, { i1, i64 }* %"020", align 4
-  br label %34
-
-34:                                               ; preds = %27, %28
-  %"021" = load { i1, i64 }, { i1, i64 }* %"020", align 4
-  store { i1, i64 } %"021", { i1, i64 }* %"26_0", align 4
-  %"26_022" = load { i1, i64 }, { i1, i64 }* %"26_0", align 4
-  %35 = extractvalue { i1, i64 } %"26_022", 0
-  switch i1 %35, label %36 [
-    i1 true, label %37
+  %"015" = load [2 x i64], [2 x i64]* %"014", align 4
+  store [2 x i64] %"015", [2 x i64]* %"16_0", align 4
+  %"16_026" = load [2 x i64], [2 x i64]* %"16_0", align 4
+  %"8_027" = load i64, i64* %"8_0", align 4
+  %"16_028" = load [2 x i64], [2 x i64]* %"16_0", align 4
+  %"8_029" = load i64, i64* %"8_0", align 4
+  %30 = icmp ult i64 %"8_029", 2
+  br i1 %30, label %32, label %31
+
+31:                                               ; preds = %cond_exit_16
+  store { i1, i64 } { i1 false, i64 poison }, { i1, i64 }* %"030", align 4
+  br label %37
+
+32:                                               ; preds = %cond_exit_16
+  %33 = bitcast i64* %1 to [2 x i64]*
+  store [2 x i64] %"16_028", [2 x i64]* %33, align 4
+  %34 = getelementptr inbounds i64, i64* %1, i64 %"8_029"
+  %35 = load i64, i64* %34, align 4
+  %36 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %35, 1
+  store { i1, i64 } %36, { i1, i64 }* %"030", align 4
+  br label %37
+
+37:                                               ; preds = %31, %32
+  %"031" = load { i1, i64 }, { i1, i64 }* %"030", align 4
+  store { i1, i64 } %"031", { i1, i64 }* %"26_0", align 4
+  %"26_032" = load { i1, i64 }, { i1, i64 }* %"26_0", align 4
+  %"26_033" = load { i1, i64 }, { i1, i64 }* %"26_0", align 4
+  %38 = extractvalue { i1, i64 } %"26_033", 0
+  switch i1 %38, label %39 [
+    i1 true, label %40
   ]
 
-36:                                               ; preds = %34
+39:                                               ; preds = %37
   br label %cond_28_case_0
 
-37:                                               ; preds = %34
-  %38 = extractvalue { i1, i64 } %"26_022", 1
-  store i64 %38, i64* %"027", align 4
+40:                                               ; preds = %37
+  %41 = extractvalue { i1, i64 } %"26_033", 1
+  store i64 %41, i64* %"039", align 4
   br label %cond_28_case_1
 
-cond_28_case_0:                                   ; preds = %36
+cond_28_case_0:                                   ; preds = %39
   store { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @1, i32 0, i32 0) }, { i32, i8* }* %"33_0", align 8
-  %"33_025" = load { i32, i8* }, { i32, i8* }* %"33_0", align 8
-  %39 = extractvalue { i32, i8* } %"33_025", 0
-  %40 = extractvalue { i32, i8* } %"33_025", 1
-  %41 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.1, i32 0, i32 0), i32 %39, i8* %40)
+  %"33_036" = load { i32, i8* }, { i32, i8* }* %"33_0", align 8
+  %"33_037" = load { i32, i8* }, { i32, i8* }* %"33_0", align 8
+  %42 = extractvalue { i32, i8* } %"33_037", 0
+  %43 = extractvalue { i32, i8* } %"33_037", 1
+  %44 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.1, i32 0, i32 0), i32 %42, i8* %43)
   call void @abort()
   store i64 0, i64* %"34_0", align 4
-  %"34_026" = load i64, i64* %"34_0", align 4
-  store i64 %"34_026", i64* %"023", align 4
+  %"34_038" = load i64, i64* %"34_0", align 4
+  store i64 %"34_038", i64* %"034", align 4
   br label %cond_exit_28
 
-cond_28_case_1:                                   ; preds = %37
-  %"028" = load i64, i64* %"027", align 4
-  store i64 %"028", i64* %"36_0", align 4
-  %"36_029" = load i64, i64* %"36_0", align 4
-  store i64 %"36_029", i64* %"023", align 4
+cond_28_case_1:                                   ; preds = %40
+  %"040" = load i64, i64* %"039", align 4
+  store i64 %"040", i64* %"36_0", align 4
+  %"36_041" = load i64, i64* %"36_0", align 4
+  store i64 %"36_041", i64* %"034", align 4
   br label %cond_exit_28
 
 cond_exit_28:                                     ; preds = %cond_28_case_1, %cond_28_case_0
-  %"024" = load i64, i64* %"023", align 4
-  store i64 %"024", i64* %"28_0", align 4
-  %"16_030" = load [2 x i64], [2 x i64]* %"16_0", align 4
-  %"10_031" = load i64, i64* %"10_0", align 4
-  %"28_032" = load i64, i64* %"28_0", align 4
-  %42 = icmp ult i64 %"10_031", 2
-  br i1 %42, label %46, label %43
-
-43:                                               ; preds = %cond_exit_28
-  %44 = insertvalue { i1, i64, [2 x i64] } { i1 false, i64 poison, [2 x i64] poison }, i64 %"28_032", 1
-  %45 = insertvalue { i1, i64, [2 x i64] } %44, [2 x i64] %"16_030", 2
-  store { i1, i64, [2 x i64] } %45, { i1, i64, [2 x i64] }* %"033", align 4
-  br label %55
+  %"035" = load i64, i64* %"034", align 4
+  store i64 %"035", i64* %"28_0", align 4
+  %"16_042" = load [2 x i64], [2 x i64]* %"16_0", align 4
+  %"10_043" = load i64, i64* %"10_0", align 4
+  %"28_044" = load i64, i64* %"28_0", align 4
+  %"16_045" = load [2 x i64], [2 x i64]* %"16_0", align 4
+  %"10_046" = load i64, i64* %"10_0", align 4
+  %"28_047" = load i64, i64* %"28_0", align 4
+  %45 = icmp ult i64 %"10_046", 2
+  br i1 %45, label %49, label %46
 
 46:                                               ; preds = %cond_exit_28
-  %47 = alloca i64, i32 2, align 8
-  %48 = bitcast i64* %47 to [2 x i64]*
-  store [2 x i64] %"16_030", [2 x i64]* %48, align 4
-  %49 = getelementptr inbounds i64, i64* %47, i64 %"10_031"
-  %50 = load i64, i64* %49, align 4
-  store i64 %"28_032", i64* %49, align 4
-  %51 = bitcast i64* %47 to [2 x i64]*
-  %52 = load [2 x i64], [2 x i64]* %51, align 4
-  %53 = insertvalue { i1, i64, [2 x i64] } { i1 true, i64 poison, [2 x i64] poison }, i64 %50, 1
-  %54 = insertvalue { i1, i64, [2 x i64] } %53, [2 x i64] %52, 2
-  store { i1, i64, [2 x i64] } %54, { i1, i64, [2 x i64] }* %"033", align 4
-  br label %55
-
-55:                                               ; preds = %43, %46
-  %"034" = load { i1, i64, [2 x i64] }, { i1, i64, [2 x i64] }* %"033", align 4
-  store { i1, i64, [2 x i64] } %"034", { i1, i64, [2 x i64] }* %"38_0", align 4
-  %"38_035" = load { i1, i64, [2 x i64] }, { i1, i64, [2 x i64] }* %"38_0", align 4
-  %56 = extractvalue { i1, i64, [2 x i64] } %"38_035", 0
-  switch i1 %56, label %57 [
-    i1 true, label %60
+  %47 = insertvalue { i1, i64, [2 x i64] } { i1 false, i64 poison, [2 x i64] poison }, i64 %"28_047", 1
+  %48 = insertvalue { i1, i64, [2 x i64] } %47, [2 x i64] %"16_045", 2
+  store { i1, i64, [2 x i64] } %48, { i1, i64, [2 x i64] }* %"048", align 4
+  br label %57
+
+49:                                               ; preds = %cond_exit_28
+  %50 = bitcast i64* %2 to [2 x i64]*
+  store [2 x i64] %"16_045", [2 x i64]* %50, align 4
+  %51 = getelementptr inbounds i64, i64* %2, i64 %"10_046"
+  %52 = load i64, i64* %51, align 4
+  store i64 %"28_047", i64* %51, align 4
+  %53 = bitcast i64* %2 to [2 x i64]*
+  %54 = load [2 x i64], [2 x i64]* %53, align 4
+  %55 = insertvalue { i1, i64, [2 x i64] } { i1 true, i64 poison, [2 x i64] poison }, i64 %52, 1
+  %56 = insertvalue { i1, i64, [2 x i64] } %55, [2 x i64] %54, 2
+  store { i1, i64, [2 x i64] } %56, { i1, i64, [2 x i64] }* %"048", align 4
+  br label %57
+
+57:                                               ; preds = %46, %49
+  %"049" = load { i1, i64, [2 x i64] }, { i1, i64, [2 x i64] }* %"048", align 4
+  store { i1, i64, [2 x i64] } %"049", { i1, i64, [2 x i64] }* %"38_0", align 4
+  %"38_050" = load { i1, i64, [2 x i64] }, { i1, i64, [2 x i64] }* %"38_0", align 4
+  %"38_051" = load { i1, i64, [2 x i64] }, { i1, i64, [2 x i64] }* %"38_0", align 4
+  %58 = extractvalue { i1, i64, [2 x i64] } %"38_051", 0
+  switch i1 %58, label %59 [
+    i1 true, label %62
   ]
 
-57:                                               ; preds = %55
-  %58 = extractvalue { i1, i64, [2 x i64] } %"38_035", 1
-  %59 = extractvalue { i1, i64, [2 x i64] } %"38_035", 2
-  store i64 %58, i64* %"039", align 4
-  store [2 x i64] %59, [2 x i64]* %"140", align 4
+59:                                               ; preds = %57
+  %60 = extractvalue { i1, i64, [2 x i64] } %"38_051", 1
+  %61 = extractvalue { i1, i64, [2 x i64] } %"38_051", 2
+  store i64 %60, i64* %"055", align 4
+  store [2 x i64] %61, [2 x i64]* %"156", align 4
   br label %cond_40_case_0
 
-60:                                               ; preds = %55
-  %61 = extractvalue { i1, i64, [2 x i64] } %"38_035", 1
-  %62 = extractvalue { i1, i64, [2 x i64] } %"38_035", 2
-  store i64 %61, i64* %"048", align 4
-  store [2 x i64] %62, [2 x i64]* %"149", align 4
+62:                                               ; preds = %57
+  %63 = extractvalue { i1, i64, [2 x i64] } %"38_051", 1
+  %64 = extractvalue { i1, i64, [2 x i64] } %"38_051", 2
+  store i64 %63, i64* %"067", align 4
+  store [2 x i64] %64, [2 x i64]* %"168", align 4
   br label %cond_40_case_1
 
-cond_40_case_0:                                   ; preds = %57
-  %"041" = load i64, i64* %"039", align 4
-  %"142" = load [2 x i64], [2 x i64]* %"140", align 4
+cond_40_case_0:                                   ; preds = %59
+  %"057" = load i64, i64* %"055", align 4
+  %"158" = load [2 x i64], [2 x i64]* %"156", align 4
   store { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @2, i32 0, i32 0) }, { i32, i8* }* %"45_0", align 8
-  store i64 %"041", i64* %"42_0", align 4
-  store [2 x i64] %"142", [2 x i64]* %"42_1", align 4
-  %"45_043" = load { i32, i8* }, { i32, i8* }* %"45_0", align 8
-  %"42_044" = load i64, i64* %"42_0", align 4
-  %"42_145" = load [2 x i64], [2 x i64]* %"42_1", align 4
-  %63 = extractvalue { i32, i8* } %"45_043", 0
-  %64 = extractvalue { i32, i8* } %"45_043", 1
-  %65 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.2, i32 0, i32 0), i32 %63, i8* %64)
+  store i64 %"057", i64* %"42_0", align 4
+  store [2 x i64] %"158", [2 x i64]* %"42_1", align 4
+  %"45_059" = load { i32, i8* }, { i32, i8* }* %"45_0", align 8
+  %"42_060" = load i64, i64* %"42_0", align 4
+  %"42_161" = load [2 x i64], [2 x i64]* %"42_1", align 4
+  %"45_062" = load { i32, i8* }, { i32, i8* }* %"45_0", align 8
+  %"42_063" = load i64, i64* %"42_0", align 4
+  %"42_164" = load [2 x i64], [2 x i64]* %"42_1", align 4
+  %65 = extractvalue { i32, i8* } %"45_062", 0
+  %66 = extractvalue { i32, i8* } %"45_062", 1
+  %67 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.2, i32 0, i32 0), i32 %65, i8* %66)
   call void @abort()
   store i64 0, i64* %"46_0", align 4
   store [2 x i64] zeroinitializer, [2 x i64]* %"46_1", align 4
-  %"46_046" = load i64, i64* %"46_0", align 4
-  %"46_147" = load [2 x i64], [2 x i64]* %"46_1", align 4
-  store i64 %"46_046", i64* %"036", align 4
-  store [2 x i64] %"46_147", [2 x i64]* %"1", align 4
+  %"46_065" = load i64, i64* %"46_0", align 4
+  %"46_166" = load [2 x i64], [2 x i64]* %"46_1", align 4
+  store i64 %"46_065", i64* %"052", align 4
+  store [2 x i64] %"46_166", [2 x i64]* %"1", align 4
   br label %cond_exit_40
 
-cond_40_case_1:                                   ; preds = %60
-  %"050" = load i64, i64* %"048", align 4
-  %"151" = load [2 x i64], [2 x i64]* %"149", align 4
-  store i64 %"050", i64* %"48_0", align 4
-  store [2 x i64] %"151", [2 x i64]* %"48_1", align 4
-  %"48_052" = load i64, i64* %"48_0", align 4
-  %"48_153" = load [2 x i64], [2 x i64]* %"48_1", align 4
-  store i64 %"48_052", i64* %"036", align 4
-  store [2 x i64] %"48_153", [2 x i64]* %"1", align 4
+cond_40_case_1:                                   ; preds = %62
+  %"069" = load i64, i64* %"067", align 4
+  %"170" = load [2 x i64], [2 x i64]* %"168", align 4
+  store i64 %"069", i64* %"48_0", align 4
+  store [2 x i64] %"170", [2 x i64]* %"48_1", align 4
+  %"48_071" = load i64, i64* %"48_0", align 4
+  %"48_172" = load [2 x i64], [2 x i64]* %"48_1", align 4
+  store i64 %"48_071", i64* %"052", align 4
+  store [2 x i64] %"48_172", [2 x i64]* %"1", align 4
   br label %cond_exit_40
 
 cond_exit_40:                                     ; preds = %cond_40_case_1, %cond_40_case_0
-  %"037" = load i64, i64* %"036", align 4
-  %"138" = load [2 x i64], [2 x i64]* %"1", align 4
-  store i64 %"037", i64* %"40_0", align 4
-  store [2 x i64] %"138", [2 x i64]* %"40_1", align 4
-  %"40_154" = load [2 x i64], [2 x i64]* %"40_1", align 4
-  %66 = alloca i64, i32 2, align 8
-  %67 = bitcast i64* %66 to [2 x i64]*
-  store [2 x i64] %"40_154", [2 x i64]* %67, align 4
-  %68 = getelementptr i64, i64* %66, i32 1
-  %69 = load i64, i64* %66, align 4
-  %70 = bitcast i64* %68 to [1 x i64]*
-  %71 = load [1 x i64], [1 x i64]* %70, align 4
-  %72 = insertvalue { i1, i64, [1 x i64] } { i1 true, i64 poison, [1 x i64] poison }, i64 %69, 1
-  %73 = insertvalue { i1, i64, [1 x i64] } %72, [1 x i64] %71, 2
-  store { i1, i64, [1 x i64] } %73, { i1, i64, [1 x i64] }* %"50_0", align 4
-  %"50_055" = load { i1, i64, [1 x i64] }, { i1, i64, [1 x i64] }* %"50_0", align 4
-  %74 = extractvalue { i1, i64, [1 x i64] } %"50_055", 0
-  switch i1 %74, label %75 [
-    i1 true, label %76
+  %"053" = load i64, i64* %"052", align 4
+  %"154" = load [2 x i64], [2 x i64]* %"1", align 4
+  store i64 %"053", i64* %"40_0", align 4
+  store [2 x i64] %"154", [2 x i64]* %"40_1", align 4
+  %"40_173" = load [2 x i64], [2 x i64]* %"40_1", align 4
+  %"40_174" = load [2 x i64], [2 x i64]* %"40_1", align 4
+  %68 = bitcast i64* %3 to [2 x i64]*
+  store [2 x i64] %"40_174", [2 x i64]* %68, align 4
+  %69 = getelementptr i64, i64* %3, i32 1
+  %70 = load i64, i64* %3, align 4
+  %71 = bitcast i64* %69 to [1 x i64]*
+  %72 = load [1 x i64], [1 x i64]* %71, align 4
+  %73 = insertvalue { i1, i64, [1 x i64] } { i1 true, i64 poison, [1 x i64] poison }, i64 %70, 1
+  %74 = insertvalue { i1, i64, [1 x i64] } %73, [1 x i64] %72, 2
+  store { i1, i64, [1 x i64] } %74, { i1, i64, [1 x i64] }* %"50_0", align 4
+  %"50_075" = load { i1, i64, [1 x i64] }, { i1, i64, [1 x i64] }* %"50_0", align 4
+  %"50_076" = load { i1, i64, [1 x i64] }, { i1, i64, [1 x i64] }* %"50_0", align 4
+  %75 = extractvalue { i1, i64, [1 x i64] } %"50_076", 0
+  switch i1 %75, label %76 [
+    i1 true, label %77
   ]
 
-75:                                               ; preds = %cond_exit_40
+76:                                               ; preds = %cond_exit_40
   br label %cond_51_case_0
 
-76:                                               ; preds = %cond_exit_40
-  %77 = extractvalue { i1, i64, [1 x i64] } %"50_055", 1
-  %78 = extractvalue { i1, i64, [1 x i64] } %"50_055", 2
-  store i64 %77, i64* %"063", align 4
-  store [1 x i64] %78, [1 x i64]* %"164", align 4
+77:                                               ; preds = %cond_exit_40
+  %78 = extractvalue { i1, i64, [1 x i64] } %"50_076", 1
+  %79 = extractvalue { i1, i64, [1 x i64] } %"50_076", 2
+  store i64 %78, i64* %"085", align 4
+  store [1 x i64] %79, [1 x i64]* %"186", align 4
   br label %cond_51_case_1
 
-cond_51_case_0:                                   ; preds = %75
+cond_51_case_0:                                   ; preds = %76
   store { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @3, i32 0, i32 0) }, { i32, i8* }* %"56_0", align 8
-  %"56_060" = load { i32, i8* }, { i32, i8* }* %"56_0", align 8
-  %79 = extractvalue { i32, i8* } %"56_060", 0
-  %80 = extractvalue { i32, i8* } %"56_060", 1
-  %81 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.3, i32 0, i32 0), i32 %79, i8* %80)
+  %"56_081" = load { i32, i8* }, { i32, i8* }* %"56_0", align 8
+  %"56_082" = load { i32, i8* }, { i32, i8* }* %"56_0", align 8
+  %80 = extractvalue { i32, i8* } %"56_082", 0
+  %81 = extractvalue { i32, i8* } %"56_082", 1
+  %82 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.3, i32 0, i32 0), i32 %80, i8* %81)
   call void @abort()
   store i64 0, i64* %"57_0", align 4
   store [1 x i64] zeroinitializer, [1 x i64]* %"57_1", align 4
-  %"57_061" = load i64, i64* %"57_0", align 4
-  %"57_162" = load [1 x i64], [1 x i64]* %"57_1", align 4
-  store i64 %"57_061", i64* %"056", align 4
-  store [1 x i64] %"57_162", [1 x i64]* %"157", align 4
+  %"57_083" = load i64, i64* %"57_0", align 4
+  %"57_184" = load [1 x i64], [1 x i64]* %"57_1", align 4
+  store i64 %"57_083", i64* %"077", align 4
+  store [1 x i64] %"57_184", [1 x i64]* %"178", align 4
   br label %cond_exit_51
 
-cond_51_case_1:                                   ; preds = %76
-  %"065" = load i64, i64* %"063", align 4
-  %"166" = load [1 x i64], [1 x i64]* %"164", align 4
-  store i64 %"065", i64* %"59_0", align 4
-  store [1 x i64] %"166", [1 x i64]* %"59_1", align 4
-  %"59_067" = load i64, i64* %"59_0", align 4
-  %"59_168" = load [1 x i64], [1 x i64]* %"59_1", align 4
-  store i64 %"59_067", i64* %"056", align 4
-  store [1 x i64] %"59_168", [1 x i64]* %"157", align 4
+cond_51_case_1:                                   ; preds = %77
+  %"087" = load i64, i64* %"085", align 4
+  %"188" = load [1 x i64], [1 x i64]* %"186", align 4
+  store i64 %"087", i64* %"59_0", align 4
+  store [1 x i64] %"188", [1 x i64]* %"59_1", align 4
+  %"59_089" = load i64, i64* %"59_0", align 4
+  %"59_190" = load [1 x i64], [1 x i64]* %"59_1", align 4
+  store i64 %"59_089", i64* %"077", align 4
+  store [1 x i64] %"59_190", [1 x i64]* %"178", align 4
   br label %cond_exit_51
 
 cond_exit_51:                                     ; preds = %cond_51_case_1, %cond_51_case_0
-  %"058" = load i64, i64* %"056", align 4
-  %"159" = load [1 x i64], [1 x i64]* %"157", align 4
-  store i64 %"058", i64* %"51_0", align 4
-  store [1 x i64] %"159", [1 x i64]* %"51_1", align 4
-  %"51_169" = load [1 x i64], [1 x i64]* %"51_1", align 4
-  %82 = alloca i64, align 8
-  %83 = bitcast i64* %82 to [1 x i64]*
-  store [1 x i64] %"51_169", [1 x i64]* %83, align 4
-  %84 = getelementptr i64, i64* %82, i32 0
+  %"079" = load i64, i64* %"077", align 4
+  %"180" = load [1 x i64], [1 x i64]* %"178", align 4
+  store i64 %"079", i64* %"51_0", align 4
+  store [1 x i64] %"180", [1 x i64]* %"51_1", align 4
+  %"51_191" = load [1 x i64], [1 x i64]* %"51_1", align 4
+  %"51_192" = load [1 x i64], [1 x i64]* %"51_1", align 4
+  %83 = bitcast i64* %4 to [1 x i64]*
+  store [1 x i64] %"51_192", [1 x i64]* %83, align 4
+  %84 = getelementptr i64, i64* %4, i32 0
   %85 = load i64, i64* %84, align 4
-  %86 = bitcast i64* %82 to [0 x i64]*
+  %86 = bitcast i64* %4 to [0 x i64]*
   %87 = load [0 x i64], [0 x i64]* %86, align 4
   %88 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %85, 1
   store { i1, i64 } %88, { i1, i64 }* %"61_0", align 4
-  %"61_070" = load { i1, i64 }, { i1, i64 }* %"61_0", align 4
-  %89 = extractvalue { i1, i64 } %"61_070", 0
+  %"61_093" = load { i1, i64 }, { i1, i64 }* %"61_0", align 4
+  %"61_094" = load { i1, i64 }, { i1, i64 }* %"61_0", align 4
+  %89 = extractvalue { i1, i64 } %"61_094", 0
   switch i1 %89, label %90 [
     i1 true, label %91
   ]
@@ -387,43 +411,45 @@ cond_exit_51:                                     ; preds = %cond_51_case_1, %co
   br label %cond_62_case_0
 
 91:                                               ; preds = %cond_exit_51
-  %92 = extractvalue { i1, i64 } %"61_070", 1
-  store i64 %92, i64* %"078", align 4
-  store [0 x i64] undef, [0 x i64]* %"179", align 4
+  %92 = extractvalue { i1, i64 } %"61_094", 1
+  store i64 %92, i64* %"0103", align 4
+  store [0 x i64] undef, [0 x i64]* %"1104", align 4
   br label %cond_62_case_1
 
 cond_62_case_0:                                   ; preds = %90
   store { i32, i8* } { i32 1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @4, i32 0, i32 0) }, { i32, i8* }* %"67_0", align 8
-  %"67_075" = load { i32, i8* }, { i32, i8* }* %"67_0", align 8
-  %93 = extractvalue { i32, i8* } %"67_075", 0
-  %94 = extractvalue { i32, i8* } %"67_075", 1
+  %"67_099" = load { i32, i8* }, { i32, i8* }* %"67_0", align 8
+  %"67_0100" = load { i32, i8* }, { i32, i8* }* %"67_0", align 8
+  %93 = extractvalue { i32, i8* } %"67_0100", 0
+  %94 = extractvalue { i32, i8* } %"67_0100", 1
   %95 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template.4, i32 0, i32 0), i32 %93, i8* %94)
   call void @abort()
   store i64 0, i64* %"68_0", align 4
   store [0 x i64] zeroinitializer, [0 x i64]* %"68_1", align 4
-  %"68_076" = load i64, i64* %"68_0", align 4
-  %"68_177" = load [0 x i64], [0 x i64]* %"68_1", align 4
-  store i64 %"68_076", i64* %"071", align 4
-  store [0 x i64] %"68_177", [0 x i64]* %"172", align 4
+  %"68_0101" = load i64, i64* %"68_0", align 4
+  %"68_1102" = load [0 x i64], [0 x i64]* %"68_1", align 4
+  store i64 %"68_0101", i64* %"095", align 4
+  store [0 x i64] %"68_1102", [0 x i64]* %"196", align 4
   br label %cond_exit_62
 
 cond_62_case_1:                                   ; preds = %91
-  %"080" = load i64, i64* %"078", align 4
-  %"181" = load [0 x i64], [0 x i64]* %"179", align 4
-  store i64 %"080", i64* %"70_0", align 4
-  store [0 x i64] %"181", [0 x i64]* %"70_1", align 4
-  %"70_082" = load i64, i64* %"70_0", align 4
-  %"70_183" = load [0 x i64], [0 x i64]* %"70_1", align 4
-  store i64 %"70_082", i64* %"071", align 4
-  store [0 x i64] %"70_183", [0 x i64]* %"172", align 4
+  %"0105" = load i64, i64* %"0103", align 4
+  %"1106" = load [0 x i64], [0 x i64]* %"1104", align 4
+  store i64 %"0105", i64* %"70_0", align 4
+  store [0 x i64] %"1106", [0 x i64]* %"70_1", align 4
+  %"70_0107" = load i64, i64* %"70_0", align 4
+  %"70_1108" = load [0 x i64], [0 x i64]* %"70_1", align 4
+  store i64 %"70_0107", i64* %"095", align 4
+  store [0 x i64] %"70_1108", [0 x i64]* %"196", align 4
   br label %cond_exit_62
 
 cond_exit_62:                                     ; preds = %cond_62_case_1, %cond_62_case_0
-  %"073" = load i64, i64* %"071", align 4
-  %"174" = load [0 x i64], [0 x i64]* %"172", align 4
-  store i64 %"073", i64* %"62_0", align 4
-  store [0 x i64] %"174", [0 x i64]* %"62_1", align 4
-  %"62_184" = load [0 x i64], [0 x i64]* %"62_1", align 4
+  %"097" = load i64, i64* %"095", align 4
+  %"198" = load [0 x i64], [0 x i64]* %"196", align 4
+  store i64 %"097", i64* %"62_0", align 4
+  store [0 x i64] %"198", [0 x i64]* %"62_1", align 4
+  %"62_1109" = load [0 x i64], [0 x i64]* %"62_1", align 4
+  %"62_1110" = load [0 x i64], [0 x i64]* %"62_1", align 4
   ret void
 }
 
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@llvm14.snap
index 1c638784d..fe909aa8e 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@llvm14.snap
@@ -7,27 +7,27 @@ source_filename = "test_context"
 
 define void @_hl.main.1() {
 alloca_block:
+  %0 = alloca i64, i32 2, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  %0 = insertvalue [2 x i64] undef, i64 1, 0
-  %1 = insertvalue [2 x i64] %0, i64 2, 1
-  %2 = icmp ult i64 1, 2
-  br i1 %2, label %4, label %3
+  %1 = insertvalue [2 x i64] undef, i64 1, 0
+  %2 = insertvalue [2 x i64] %1, i64 2, 1
+  %3 = icmp ult i64 1, 2
+  br i1 %3, label %5, label %4
 
-3:                                                ; preds = %entry_block
+4:                                                ; preds = %entry_block
   br label %10
 
-4:                                                ; preds = %entry_block
-  %5 = alloca i64, i32 2, align 8
-  %6 = bitcast i64* %5 to [2 x i64]*
-  store [2 x i64] %1, [2 x i64]* %6, align 4
-  %7 = getelementptr inbounds i64, i64* %5, i64 1
+5:                                                ; preds = %entry_block
+  %6 = bitcast i64* %0 to [2 x i64]*
+  store [2 x i64] %2, [2 x i64]* %6, align 4
+  %7 = getelementptr inbounds i64, i64* %0, i64 1
   %8 = load i64, i64* %7, align 4
   %9 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %8, 1
   br label %10
 
-10:                                               ; preds = %3, %4
-  %"0.0" = phi { i1, i64 } [ %9, %4 ], [ { i1 false, i64 poison }, %3 ]
+10:                                               ; preds = %4, %5
+  %"0.0" = phi { i1, i64 } [ %9, %5 ], [ { i1 false, i64 poison }, %4 ]
   ret void
 }
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@pre-mem2reg@llvm14.snap
index 15902b579..de5fd4c86 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__array__test__emit_get@pre-mem2reg@llvm14.snap
@@ -12,6 +12,7 @@ alloca_block:
   %"8_0" = alloca [2 x i64], align 8
   %"9_0" = alloca { i1, i64 }, align 8
   %"0" = alloca { i1, i64 }, align 8
+  %0 = alloca i64, i32 2, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
@@ -19,30 +20,33 @@ entry_block:                                      ; preds = %alloca_block
   store i64 1, i64* %"5_0", align 4
   %"5_01" = load i64, i64* %"5_0", align 4
   %"7_02" = load i64, i64* %"7_0", align 4
-  %0 = insertvalue [2 x i64] undef, i64 %"5_01", 0
-  %1 = insertvalue [2 x i64] %0, i64 %"7_02", 1
-  store [2 x i64] %1, [2 x i64]* %"8_0", align 4
-  %"8_03" = load [2 x i64], [2 x i64]* %"8_0", align 4
-  %"5_04" = load i64, i64* %"5_0", align 4
-  %2 = icmp ult i64 %"5_04", 2
-  br i1 %2, label %4, label %3
+  %"5_03" = load i64, i64* %"5_0", align 4
+  %"7_04" = load i64, i64* %"7_0", align 4
+  %1 = insertvalue [2 x i64] undef, i64 %"5_03", 0
+  %2 = insertvalue [2 x i64] %1, i64 %"7_04", 1
+  store [2 x i64] %2, [2 x i64]* %"8_0", align 4
+  %"8_05" = load [2 x i64], [2 x i64]* %"8_0", align 4
+  %"5_06" = load i64, i64* %"5_0", align 4
+  %"8_07" = load [2 x i64], [2 x i64]* %"8_0", align 4
+  %"5_08" = load i64, i64* %"5_0", align 4
+  %3 = icmp ult i64 %"5_08", 2
+  br i1 %3, label %5, label %4
 
-3:                                                ; preds = %entry_block
+4:                                                ; preds = %entry_block
   store { i1, i64 } { i1 false, i64 poison }, { i1, i64 }* %"0", align 4
   br label %10
 
-4:                                                ; preds = %entry_block
-  %5 = alloca i64, i32 2, align 8
-  %6 = bitcast i64* %5 to [2 x i64]*
-  store [2 x i64] %"8_03", [2 x i64]* %6, align 4
-  %7 = getelementptr inbounds i64, i64* %5, i64 %"5_04"
+5:                                                ; preds = %entry_block
+  %6 = bitcast i64* %0 to [2 x i64]*
+  store [2 x i64] %"8_07", [2 x i64]* %6, align 4
+  %7 = getelementptr inbounds i64, i64* %0, i64 %"5_08"
   %8 = load i64, i64* %7, align 4
   %9 = insertvalue { i1, i64 } { i1 true, i64 poison }, i64 %8, 1
   store { i1, i64 } %9, { i1, i64 }* %"0", align 4
   br label %10
 
-10:                                               ; preds = %3, %4
-  %"05" = load { i1, i64 }, { i1, i64 }* %"0", align 4
-  store { i1, i64 } %"05", { i1, i64 }* %"9_0", align 4
+10:                                               ; preds = %4, %5
+  %"09" = load { i1, i64 }, { i1, i64 }* %"0", align 4
+  store { i1, i64 } %"09", { i1, i64 }* %"9_0", align 4
   ret void
 }
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__get@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__get@pre-mem2reg@llvm14.snap
index de1117ffd..2c7230220 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__get@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__get@pre-mem2reg@llvm14.snap
@@ -7,29 +7,37 @@ source_filename = "test_context"
 
 define { i1, i16 } @_hl.main.1(i8* %0, i64 %1) {
 alloca_block:
-  %"0" = alloca { i1, i16 }, align 8
+  %"0" = alloca i8*, align 8
+  %"1" = alloca i64, align 8
+  %"01" = alloca { i1, i16 }, align 8
   %"2_0" = alloca i8*, align 8
   %"2_1" = alloca i64, align 8
   %"4_0" = alloca { i1, i16 }, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8* %0, i8** %"2_0", align 8
-  store i64 %1, i64* %"2_1", align 4
-  %"2_01" = load i8*, i8** %"2_0", align 8
-  %"2_12" = load i64, i64* %"2_1", align 4
+  store i8* %0, i8** %"0", align 8
+  store i64 %1, i64* %"1", align 4
+  %"02" = load i8*, i8** %"0", align 8
+  %"13" = load i64, i64* %"1", align 4
+  store i8* %"02", i8** %"2_0", align 8
+  store i64 %"13", i64* %"2_1", align 4
+  %"2_04" = load i8*, i8** %"2_0", align 8
+  %"2_15" = load i64, i64* %"2_1", align 4
+  %"2_06" = load i8*, i8** %"2_0", align 8
+  %"2_17" = load i64, i64* %"2_1", align 4
   %2 = alloca i16, align 2
   %3 = bitcast i16* %2 to i8*
-  %4 = call i1 @__rt__list__get(i8* %"2_01", i64 %"2_12", i8* %3)
+  %4 = call i1 @__rt__list__get(i8* %"2_06", i64 %"2_17", i8* %3)
   %5 = bitcast i8* %3 to i16*
   %6 = load i16, i16* %5, align 2
   %7 = insertvalue { i1, i16 } { i1 true, i16 poison }, i16 %6, 1
   %8 = select i1 %4, { i1, i16 } %7, { i1, i16 } { i1 false, i16 poison }
   store { i1, i16 } %8, { i1, i16 }* %"4_0", align 2
-  %"4_03" = load { i1, i16 }, { i1, i16 }* %"4_0", align 2
-  store { i1, i16 } %"4_03", { i1, i16 }* %"0", align 2
-  %"04" = load { i1, i16 }, { i1, i16 }* %"0", align 2
-  ret { i1, i16 } %"04"
+  %"4_08" = load { i1, i16 }, { i1, i16 }* %"4_0", align 2
+  store { i1, i16 } %"4_08", { i1, i16 }* %"01", align 2
+  %"09" = load { i1, i16 }, { i1, i16 }* %"01", align 2
+  ret { i1, i16 } %"09"
 }
 
 declare i1 @__rt__list__get(i8*, i64, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@llvm14.snap
index 2ebc2fe20..e7775833c 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@llvm14.snap
@@ -17,8 +17,8 @@ entry_block:                                      ; preds = %alloca_block
   %6 = insertvalue { i1, i16 } { i1 false, i16 poison }, i16 %2, 1
   %7 = select i1 %5, { i1, i16 } { i1 true, i16 poison }, { i1, i16 } %6
   %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %0, 0
-  %mrv8 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %7, 1
-  ret { i8*, { i1, i16 } } %mrv8
+  %mrv16 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %7, 1
+  ret { i8*, { i1, i16 } } %mrv16
 }
 
 declare i1 @__rt__list__insert(i8*, i64, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@pre-mem2reg@llvm14.snap
index 3332a4f86..00a843813 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__insert@pre-mem2reg@llvm14.snap
@@ -8,7 +8,10 @@ source_filename = "test_context"
 define { i8*, { i1, i16 } } @_hl.main.1(i8* %0, i64 %1, i16 %2) {
 alloca_block:
   %"0" = alloca i8*, align 8
-  %"1" = alloca { i1, i16 }, align 8
+  %"1" = alloca i64, align 8
+  %"2" = alloca i16, align 2
+  %"01" = alloca i8*, align 8
+  %"12" = alloca { i1, i16 }, align 8
   %"2_0" = alloca i8*, align 8
   %"2_1" = alloca i64, align 8
   %"2_2" = alloca i16, align 2
@@ -17,29 +20,38 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8* %0, i8** %"2_0", align 8
-  store i64 %1, i64* %"2_1", align 4
-  store i16 %2, i16* %"2_2", align 2
-  %"2_01" = load i8*, i8** %"2_0", align 8
-  %"2_12" = load i64, i64* %"2_1", align 4
-  %"2_23" = load i16, i16* %"2_2", align 2
+  store i8* %0, i8** %"0", align 8
+  store i64 %1, i64* %"1", align 4
+  store i16 %2, i16* %"2", align 2
+  %"03" = load i8*, i8** %"0", align 8
+  %"14" = load i64, i64* %"1", align 4
+  %"25" = load i16, i16* %"2", align 2
+  store i8* %"03", i8** %"2_0", align 8
+  store i64 %"14", i64* %"2_1", align 4
+  store i16 %"25", i16* %"2_2", align 2
+  %"2_06" = load i8*, i8** %"2_0", align 8
+  %"2_17" = load i64, i64* %"2_1", align 4
+  %"2_28" = load i16, i16* %"2_2", align 2
+  %"2_09" = load i8*, i8** %"2_0", align 8
+  %"2_110" = load i64, i64* %"2_1", align 4
+  %"2_211" = load i16, i16* %"2_2", align 2
   %3 = alloca i16, align 2
-  store i16 %"2_23", i16* %3, align 2
+  store i16 %"2_211", i16* %3, align 2
   %4 = bitcast i16* %3 to i8*
-  %5 = call i1 @__rt__list__insert(i8* %"2_01", i64 %"2_12", i8* %4)
-  %6 = insertvalue { i1, i16 } { i1 false, i16 poison }, i16 %"2_23", 1
+  %5 = call i1 @__rt__list__insert(i8* %"2_09", i64 %"2_110", i8* %4)
+  %6 = insertvalue { i1, i16 } { i1 false, i16 poison }, i16 %"2_211", 1
   %7 = select i1 %5, { i1, i16 } { i1 true, i16 poison }, { i1, i16 } %6
-  store i8* %"2_01", i8** %"4_0", align 8
+  store i8* %"2_09", i8** %"4_0", align 8
   store { i1, i16 } %7, { i1, i16 }* %"4_1", align 2
-  %"4_04" = load i8*, i8** %"4_0", align 8
-  %"4_15" = load { i1, i16 }, { i1, i16 }* %"4_1", align 2
-  store i8* %"4_04", i8** %"0", align 8
-  store { i1, i16 } %"4_15", { i1, i16 }* %"1", align 2
-  %"06" = load i8*, i8** %"0", align 8
-  %"17" = load { i1, i16 }, { i1, i16 }* %"1", align 2
-  %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %"06", 0
-  %mrv8 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %"17", 1
-  ret { i8*, { i1, i16 } } %mrv8
+  %"4_012" = load i8*, i8** %"4_0", align 8
+  %"4_113" = load { i1, i16 }, { i1, i16 }* %"4_1", align 2
+  store i8* %"4_012", i8** %"01", align 8
+  store { i1, i16 } %"4_113", { i1, i16 }* %"12", align 2
+  %"014" = load i8*, i8** %"01", align 8
+  %"115" = load { i1, i16 }, { i1, i16 }* %"12", align 2
+  %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %"014", 0
+  %mrv16 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %"115", 1
+  ret { i8*, { i1, i16 } } %mrv16
 }
 
 declare i1 @__rt__list__insert(i8*, i64, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@llvm14.snap
index de2fab69e..400236641 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@llvm14.snap
@@ -12,8 +12,8 @@ alloca_block:
 entry_block:                                      ; preds = %alloca_block
   %1 = call i64 @__rt__list__length(i8* %0)
   %mrv = insertvalue { i8*, i64 } undef, i8* %0, 0
-  %mrv6 = insertvalue { i8*, i64 } %mrv, i64 %1, 1
-  ret { i8*, i64 } %mrv6
+  %mrv9 = insertvalue { i8*, i64 } %mrv, i64 %1, 1
+  ret { i8*, i64 } %mrv9
 }
 
 declare i64 @__rt__list__length(i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@pre-mem2reg@llvm14.snap
index b0ced0b59..587606ac3 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__length@pre-mem2reg@llvm14.snap
@@ -8,6 +8,7 @@ source_filename = "test_context"
 define { i8*, i64 } @_hl.main.1(i8* %0) {
 alloca_block:
   %"0" = alloca i8*, align 8
+  %"01" = alloca i8*, align 8
   %"1" = alloca i64, align 8
   %"2_0" = alloca i8*, align 8
   %"4_0" = alloca i8*, align 8
@@ -15,20 +16,23 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8* %0, i8** %"2_0", align 8
-  %"2_01" = load i8*, i8** %"2_0", align 8
-  %1 = call i64 @__rt__list__length(i8* %"2_01")
-  store i8* %"2_01", i8** %"4_0", align 8
+  store i8* %0, i8** %"0", align 8
+  %"02" = load i8*, i8** %"0", align 8
+  store i8* %"02", i8** %"2_0", align 8
+  %"2_03" = load i8*, i8** %"2_0", align 8
+  %"2_04" = load i8*, i8** %"2_0", align 8
+  %1 = call i64 @__rt__list__length(i8* %"2_04")
+  store i8* %"2_04", i8** %"4_0", align 8
   store i64 %1, i64* %"4_1", align 4
-  %"4_02" = load i8*, i8** %"4_0", align 8
-  %"4_13" = load i64, i64* %"4_1", align 4
-  store i8* %"4_02", i8** %"0", align 8
-  store i64 %"4_13", i64* %"1", align 4
-  %"04" = load i8*, i8** %"0", align 8
-  %"15" = load i64, i64* %"1", align 4
-  %mrv = insertvalue { i8*, i64 } undef, i8* %"04", 0
-  %mrv6 = insertvalue { i8*, i64 } %mrv, i64 %"15", 1
-  ret { i8*, i64 } %mrv6
+  %"4_05" = load i8*, i8** %"4_0", align 8
+  %"4_16" = load i64, i64* %"4_1", align 4
+  store i8* %"4_05", i8** %"01", align 8
+  store i64 %"4_16", i64* %"1", align 4
+  %"07" = load i8*, i8** %"01", align 8
+  %"18" = load i64, i64* %"1", align 4
+  %mrv = insertvalue { i8*, i64 } undef, i8* %"07", 0
+  %mrv9 = insertvalue { i8*, i64 } %mrv, i64 %"18", 1
+  ret { i8*, i64 } %mrv9
 }
 
 declare i64 @__rt__list__length(i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@llvm14.snap
index 8529684b5..01858d67e 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@llvm14.snap
@@ -18,8 +18,8 @@ entry_block:                                      ; preds = %alloca_block
   %6 = insertvalue { i1, i16 } { i1 true, i16 poison }, i16 %5, 1
   %7 = select i1 %3, { i1, i16 } %6, { i1, i16 } { i1 false, i16 poison }
   %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %0, 0
-  %mrv6 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %7, 1
-  ret { i8*, { i1, i16 } } %mrv6
+  %mrv9 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %7, 1
+  ret { i8*, { i1, i16 } } %mrv9
 }
 
 declare i1 @__rt__list__pop(i8*, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@pre-mem2reg@llvm14.snap
index 30238aff3..138c427fa 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__pop@pre-mem2reg@llvm14.snap
@@ -8,6 +8,7 @@ source_filename = "test_context"
 define { i8*, { i1, i16 } } @_hl.main.1(i8* %0) {
 alloca_block:
   %"0" = alloca i8*, align 8
+  %"01" = alloca i8*, align 8
   %"1" = alloca { i1, i16 }, align 8
   %"2_0" = alloca i8*, align 8
   %"4_0" = alloca i8*, align 8
@@ -15,26 +16,29 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8* %0, i8** %"2_0", align 8
-  %"2_01" = load i8*, i8** %"2_0", align 8
+  store i8* %0, i8** %"0", align 8
+  %"02" = load i8*, i8** %"0", align 8
+  store i8* %"02", i8** %"2_0", align 8
+  %"2_03" = load i8*, i8** %"2_0", align 8
+  %"2_04" = load i8*, i8** %"2_0", align 8
   %1 = alloca i16, align 2
   %2 = bitcast i16* %1 to i8*
-  %3 = call i1 @__rt__list__pop(i8* %"2_01", i8* %2)
+  %3 = call i1 @__rt__list__pop(i8* %"2_04", i8* %2)
   %4 = bitcast i8* %2 to i16*
   %5 = load i16, i16* %4, align 2
   %6 = insertvalue { i1, i16 } { i1 true, i16 poison }, i16 %5, 1
   %7 = select i1 %3, { i1, i16 } %6, { i1, i16 } { i1 false, i16 poison }
-  store i8* %"2_01", i8** %"4_0", align 8
+  store i8* %"2_04", i8** %"4_0", align 8
   store { i1, i16 } %7, { i1, i16 }* %"4_1", align 2
-  %"4_02" = load i8*, i8** %"4_0", align 8
-  %"4_13" = load { i1, i16 }, { i1, i16 }* %"4_1", align 2
-  store i8* %"4_02", i8** %"0", align 8
-  store { i1, i16 } %"4_13", { i1, i16 }* %"1", align 2
-  %"04" = load i8*, i8** %"0", align 8
-  %"15" = load { i1, i16 }, { i1, i16 }* %"1", align 2
-  %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %"04", 0
-  %mrv6 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %"15", 1
-  ret { i8*, { i1, i16 } } %mrv6
+  %"4_05" = load i8*, i8** %"4_0", align 8
+  %"4_16" = load { i1, i16 }, { i1, i16 }* %"4_1", align 2
+  store i8* %"4_05", i8** %"01", align 8
+  store { i1, i16 } %"4_16", { i1, i16 }* %"1", align 2
+  %"07" = load i8*, i8** %"01", align 8
+  %"18" = load { i1, i16 }, { i1, i16 }* %"1", align 2
+  %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %"07", 0
+  %mrv9 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %"18", 1
+  ret { i8*, { i1, i16 } } %mrv9
 }
 
 declare i1 @__rt__list__pop(i8*, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__push@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__push@pre-mem2reg@llvm14.snap
index 6d410c012..356c7a151 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__push@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__push@pre-mem2reg@llvm14.snap
@@ -8,25 +8,33 @@ source_filename = "test_context"
 define i8* @_hl.main.1(i8* %0, i16 %1) {
 alloca_block:
   %"0" = alloca i8*, align 8
+  %"1" = alloca i16, align 2
+  %"01" = alloca i8*, align 8
   %"2_0" = alloca i8*, align 8
   %"2_1" = alloca i16, align 2
   %"4_0" = alloca i8*, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8* %0, i8** %"2_0", align 8
-  store i16 %1, i16* %"2_1", align 2
-  %"2_01" = load i8*, i8** %"2_0", align 8
-  %"2_12" = load i16, i16* %"2_1", align 2
+  store i8* %0, i8** %"0", align 8
+  store i16 %1, i16* %"1", align 2
+  %"02" = load i8*, i8** %"0", align 8
+  %"13" = load i16, i16* %"1", align 2
+  store i8* %"02", i8** %"2_0", align 8
+  store i16 %"13", i16* %"2_1", align 2
+  %"2_04" = load i8*, i8** %"2_0", align 8
+  %"2_15" = load i16, i16* %"2_1", align 2
+  %"2_06" = load i8*, i8** %"2_0", align 8
+  %"2_17" = load i16, i16* %"2_1", align 2
   %2 = alloca i16, align 2
-  store i16 %"2_12", i16* %2, align 2
+  store i16 %"2_17", i16* %2, align 2
   %3 = bitcast i16* %2 to i8*
-  call void @__rt__list__push(i8* %"2_01", i8* %3)
-  store i8* %"2_01", i8** %"4_0", align 8
-  %"4_03" = load i8*, i8** %"4_0", align 8
-  store i8* %"4_03", i8** %"0", align 8
-  %"04" = load i8*, i8** %"0", align 8
-  ret i8* %"04"
+  call void @__rt__list__push(i8* %"2_06", i8* %3)
+  store i8* %"2_06", i8** %"4_0", align 8
+  %"4_08" = load i8*, i8** %"4_0", align 8
+  store i8* %"4_08", i8** %"01", align 8
+  %"09" = load i8*, i8** %"01", align 8
+  ret i8* %"09"
 }
 
 declare void @__rt__list__push(i8*, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@llvm14.snap
index a5ec03c5e..12f4ce9c4 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@llvm14.snap
@@ -20,8 +20,8 @@ entry_block:                                      ; preds = %alloca_block
   %9 = insertvalue { i1, i16 } { i1 true, i16 poison }, i16 %2, 1
   %10 = select i1 %5, { i1, i16 } %9, { i1, i16 } %8
   %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %0, 0
-  %mrv8 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %10, 1
-  ret { i8*, { i1, i16 } } %mrv8
+  %mrv16 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %10, 1
+  ret { i8*, { i1, i16 } } %mrv16
 }
 
 declare i1 @__rt__list__set(i8*, i64, i8*)
diff --git a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@pre-mem2reg@llvm14.snap
index 2189b5603..77c446d2b 100644
--- a/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/collections/snapshots/hugr_llvm__extension__collections__list__test__set@pre-mem2reg@llvm14.snap
@@ -8,7 +8,10 @@ source_filename = "test_context"
 define { i8*, { i1, i16 } } @_hl.main.1(i8* %0, i64 %1, i16 %2) {
 alloca_block:
   %"0" = alloca i8*, align 8
-  %"1" = alloca { i1, i16 }, align 8
+  %"1" = alloca i64, align 8
+  %"2" = alloca i16, align 2
+  %"01" = alloca i8*, align 8
+  %"12" = alloca { i1, i16 }, align 8
   %"2_0" = alloca i8*, align 8
   %"2_1" = alloca i64, align 8
   %"2_2" = alloca i16, align 2
@@ -17,32 +20,41 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8* %0, i8** %"2_0", align 8
-  store i64 %1, i64* %"2_1", align 4
-  store i16 %2, i16* %"2_2", align 2
-  %"2_01" = load i8*, i8** %"2_0", align 8
-  %"2_12" = load i64, i64* %"2_1", align 4
-  %"2_23" = load i16, i16* %"2_2", align 2
+  store i8* %0, i8** %"0", align 8
+  store i64 %1, i64* %"1", align 4
+  store i16 %2, i16* %"2", align 2
+  %"03" = load i8*, i8** %"0", align 8
+  %"14" = load i64, i64* %"1", align 4
+  %"25" = load i16, i16* %"2", align 2
+  store i8* %"03", i8** %"2_0", align 8
+  store i64 %"14", i64* %"2_1", align 4
+  store i16 %"25", i16* %"2_2", align 2
+  %"2_06" = load i8*, i8** %"2_0", align 8
+  %"2_17" = load i64, i64* %"2_1", align 4
+  %"2_28" = load i16, i16* %"2_2", align 2
+  %"2_09" = load i8*, i8** %"2_0", align 8
+  %"2_110" = load i64, i64* %"2_1", align 4
+  %"2_211" = load i16, i16* %"2_2", align 2
   %3 = alloca i16, align 2
-  store i16 %"2_23", i16* %3, align 2
+  store i16 %"2_211", i16* %3, align 2
   %4 = bitcast i16* %3 to i8*
-  %5 = call i1 @__rt__list__set(i8* %"2_01", i64 %"2_12", i8* %4)
+  %5 = call i1 @__rt__list__set(i8* %"2_09", i64 %"2_110", i8* %4)
   %6 = bitcast i8* %4 to i16*
   %7 = load i16, i16* %6, align 2
   %8 = insertvalue { i1, i16 } { i1 false, i16 poison }, i16 %7, 1
-  %9 = insertvalue { i1, i16 } { i1 true, i16 poison }, i16 %"2_23", 1
+  %9 = insertvalue { i1, i16 } { i1 true, i16 poison }, i16 %"2_211", 1
   %10 = select i1 %5, { i1, i16 } %9, { i1, i16 } %8
-  store i8* %"2_01", i8** %"4_0", align 8
+  store i8* %"2_09", i8** %"4_0", align 8
   store { i1, i16 } %10, { i1, i16 }* %"4_1", align 2
-  %"4_04" = load i8*, i8** %"4_0", align 8
-  %"4_15" = load { i1, i16 }, { i1, i16 }* %"4_1", align 2
-  store i8* %"4_04", i8** %"0", align 8
-  store { i1, i16 } %"4_15", { i1, i16 }* %"1", align 2
-  %"06" = load i8*, i8** %"0", align 8
-  %"17" = load { i1, i16 }, { i1, i16 }* %"1", align 2
-  %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %"06", 0
-  %mrv8 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %"17", 1
-  ret { i8*, { i1, i16 } } %mrv8
+  %"4_012" = load i8*, i8** %"4_0", align 8
+  %"4_113" = load { i1, i16 }, { i1, i16 }* %"4_1", align 2
+  store i8* %"4_012", i8** %"01", align 8
+  store { i1, i16 } %"4_113", { i1, i16 }* %"12", align 2
+  %"014" = load i8*, i8** %"01", align 8
+  %"115" = load { i1, i16 }, { i1, i16 }* %"12", align 2
+  %mrv = insertvalue { i8*, { i1, i16 } } undef, i8* %"014", 0
+  %mrv16 = insertvalue { i8*, { i1, i16 } } %mrv, { i1, i16 } %"115", 1
+  ret { i8*, { i1, i16 } } %mrv16
 }
 
 declare i1 @__rt__list__set(i8*, i64, i8*)
diff --git a/hugr-llvm/src/extension/int.rs b/hugr-llvm/src/extension/int.rs
index aaf063ed9..7c35f9fc5 100644
--- a/hugr-llvm/src/extension/int.rs
+++ b/hugr-llvm/src/extension/int.rs
@@ -60,6 +60,7 @@ fn emit_ipow<'c, H: HugrView<Node = Node>>(
         let return_one_bb = ctx.new_basic_block("power_of_zero", Some(pow_body_bb));
         let pow_bb = ctx.new_basic_block("pow", Some(return_one_bb));
 
+        // TODO: don't just build allocas, put them in prologue
         let acc_p = ctx.builder().build_alloca(lhs.get_type(), "acc_ptr")?;
         let exp_p = ctx.builder().build_alloca(rhs.get_type(), "exp_ptr")?;
         ctx.builder().build_store(acc_p, lhs)?;
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_s@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_s@pre-mem2reg@llvm14.snap
index 559d4a6b7..e144f5c4e 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_s@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_s@pre-mem2reg@llvm14.snap
@@ -7,18 +7,22 @@ source_filename = "test_context"
 
 define double @_hl.main.1(i32 %0) {
 alloca_block:
-  %"0" = alloca double, align 8
+  %"0" = alloca i32, align 4
+  %"01" = alloca double, align 8
   %"2_0" = alloca i32, align 4
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i32 %0, i32* %"2_0", align 4
-  %"2_01" = load i32, i32* %"2_0", align 4
-  %1 = sitofp i32 %"2_01" to double
+  store i32 %0, i32* %"0", align 4
+  %"02" = load i32, i32* %"0", align 4
+  store i32 %"02", i32* %"2_0", align 4
+  %"2_03" = load i32, i32* %"2_0", align 4
+  %"2_04" = load i32, i32* %"2_0", align 4
+  %1 = sitofp i32 %"2_04" to double
   store double %1, double* %"4_0", align 8
-  %"4_02" = load double, double* %"4_0", align 8
-  store double %"4_02", double* %"0", align 8
-  %"03" = load double, double* %"0", align 8
-  ret double %"03"
+  %"4_05" = load double, double* %"4_0", align 8
+  store double %"4_05", double* %"01", align 8
+  %"06" = load double, double* %"01", align 8
+  ret double %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_u@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_u@pre-mem2reg@llvm14.snap
index 02dac5239..e0ed975c1 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_u@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__convert_u@pre-mem2reg@llvm14.snap
@@ -7,18 +7,22 @@ source_filename = "test_context"
 
 define double @_hl.main.1(i16 %0) {
 alloca_block:
-  %"0" = alloca double, align 8
+  %"0" = alloca i16, align 2
+  %"01" = alloca double, align 8
   %"2_0" = alloca i16, align 2
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i16 %0, i16* %"2_0", align 2
-  %"2_01" = load i16, i16* %"2_0", align 2
-  %1 = uitofp i16 %"2_01" to double
+  store i16 %0, i16* %"0", align 2
+  %"02" = load i16, i16* %"0", align 2
+  store i16 %"02", i16* %"2_0", align 2
+  %"2_03" = load i16, i16* %"2_0", align 2
+  %"2_04" = load i16, i16* %"2_0", align 2
+  %1 = uitofp i16 %"2_04" to double
   store double %1, double* %"4_0", align 8
-  %"4_02" = load double, double* %"4_0", align 8
-  store double %"4_02", double* %"0", align 8
-  %"03" = load double, double* %"0", align 8
-  ret double %"03"
+  %"4_05" = load double, double* %"4_0", align 8
+  store double %"4_05", double* %"01", align 8
+  %"06" = load double, double* %"01", align 8
+  ret double %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__ifrombool@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__ifrombool@pre-mem2reg@llvm14.snap
index 376cf693a..1c26a41e4 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__ifrombool@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__ifrombool@pre-mem2reg@llvm14.snap
@@ -7,19 +7,23 @@ source_filename = "test_context"
 
 define i8 @_hl.main.1(i1 %0) {
 alloca_block:
-  %"0" = alloca i8, align 1
+  %"0" = alloca i1, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i1, align 1
   %"4_0" = alloca i8, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %1 = icmp eq i1 %"2_01", true
+  store i1 %0, i1* %"0", align 1
+  %"02" = load i1, i1* %"0", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  %"2_03" = load i1, i1* %"2_0", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %1 = icmp eq i1 %"2_04", true
   %2 = select i1 %1, i8 1, i8 0
   store i8 %2, i8* %"4_0", align 1
-  %"4_02" = load i8, i8* %"4_0", align 1
-  store i8 %"4_02", i8* %"0", align 1
-  %"03" = load i8, i8* %"0", align 1
-  ret i8 %"03"
+  %"4_05" = load i8, i8* %"4_0", align 1
+  store i8 %"4_05", i8* %"01", align 1
+  %"06" = load i8, i8* %"01", align 1
+  ret i8 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__itobool@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__itobool@pre-mem2reg@llvm14.snap
index 567d9fa3a..88ad67b89 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__itobool@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__itobool@pre-mem2reg@llvm14.snap
@@ -7,19 +7,23 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(i8 %0) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca i8, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i8, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %eq1 = icmp eq i8 %"2_01", 1
+  store i8 %0, i8* %"0", align 1
+  %"02" = load i8, i8* %"0", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  %"2_03" = load i8, i8* %"2_0", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %eq1 = icmp eq i8 %"2_04", 1
   %1 = select i1 %eq1, i1 true, i1 false
   store i1 %1, i1* %"4_0", align 1
-  %"4_02" = load i1, i1* %"4_0", align 1
-  store i1 %"4_02", i1* %"0", align 1
-  %"03" = load i1, i1* %"0", align 1
-  ret i1 %"03"
+  %"4_05" = load i1, i1* %"4_0", align 1
+  store i1 %"4_05", i1* %"01", align 1
+  %"06" = load i1, i1* %"01", align 1
+  ret i1 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_s@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_s@pre-mem2reg@llvm14.snap
index 9d984c0b2..fadf90e88 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_s@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_s@pre-mem2reg@llvm14.snap
@@ -9,23 +9,27 @@ source_filename = "test_context"
 
 define { i1, { i32, i8* }, i32 } @_hl.main.1(double %0) {
 alloca_block:
-  %"0" = alloca { i1, { i32, i8* }, i32 }, align 8
+  %"0" = alloca double, align 8
+  %"01" = alloca { i1, { i32, i8* }, i32 }, align 8
   %"2_0" = alloca double, align 8
   %"4_0" = alloca { i1, { i32, i8* }, i32 }, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %within_upper_bound = fcmp olt double %"2_01", 0x41DFFFFFFFC00000
-  %within_lower_bound = fcmp ole double 0xC1E0000000000000, %"2_01"
+  store double %0, double* %"0", align 8
+  %"02" = load double, double* %"0", align 8
+  store double %"02", double* %"2_0", align 8
+  %"2_03" = load double, double* %"2_0", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %within_upper_bound = fcmp olt double %"2_04", 0x41DFFFFFFFC00000
+  %within_lower_bound = fcmp ole double 0xC1E0000000000000, %"2_04"
   %success = and i1 %within_upper_bound, %within_lower_bound
-  %trunc_result = fptosi double %"2_01" to i32
+  %trunc_result = fptosi double %"2_04" to i32
   %1 = insertvalue { i1, { i32, i8* }, i32 } { i1 true, { i32, i8* } poison, i32 poison }, i32 %trunc_result, 2
   %2 = select i1 %success, { i1, { i32, i8* }, i32 } %1, { i1, { i32, i8* }, i32 } { i1 false, { i32, i8* } { i32 2, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @0, i32 0, i32 0) }, i32 poison }
   store { i1, { i32, i8* }, i32 } %2, { i1, { i32, i8* }, i32 }* %"4_0", align 8
-  %"4_02" = load { i1, { i32, i8* }, i32 }, { i1, { i32, i8* }, i32 }* %"4_0", align 8
-  store { i1, { i32, i8* }, i32 } %"4_02", { i1, { i32, i8* }, i32 }* %"0", align 8
-  %"03" = load { i1, { i32, i8* }, i32 }, { i1, { i32, i8* }, i32 }* %"0", align 8
-  ret { i1, { i32, i8* }, i32 } %"03"
+  %"4_05" = load { i1, { i32, i8* }, i32 }, { i1, { i32, i8* }, i32 }* %"4_0", align 8
+  store { i1, { i32, i8* }, i32 } %"4_05", { i1, { i32, i8* }, i32 }* %"01", align 8
+  %"06" = load { i1, { i32, i8* }, i32 }, { i1, { i32, i8* }, i32 }* %"01", align 8
+  ret { i1, { i32, i8* }, i32 } %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_u@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_u@pre-mem2reg@llvm14.snap
index 07db760ae..a31282b18 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_u@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__conversions__test__trunc_u@pre-mem2reg@llvm14.snap
@@ -9,23 +9,27 @@ source_filename = "test_context"
 
 define { i1, { i32, i8* }, i64 } @_hl.main.1(double %0) {
 alloca_block:
-  %"0" = alloca { i1, { i32, i8* }, i64 }, align 8
+  %"0" = alloca double, align 8
+  %"01" = alloca { i1, { i32, i8* }, i64 }, align 8
   %"2_0" = alloca double, align 8
   %"4_0" = alloca { i1, { i32, i8* }, i64 }, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %within_upper_bound = fcmp olt double %"2_01", 0x43F0000000000000
-  %within_lower_bound = fcmp ole double 0.000000e+00, %"2_01"
+  store double %0, double* %"0", align 8
+  %"02" = load double, double* %"0", align 8
+  store double %"02", double* %"2_0", align 8
+  %"2_03" = load double, double* %"2_0", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %within_upper_bound = fcmp olt double %"2_04", 0x43F0000000000000
+  %within_lower_bound = fcmp ole double 0.000000e+00, %"2_04"
   %success = and i1 %within_upper_bound, %within_lower_bound
-  %trunc_result = fptoui double %"2_01" to i64
+  %trunc_result = fptoui double %"2_04" to i64
   %1 = insertvalue { i1, { i32, i8* }, i64 } { i1 true, { i32, i8* } poison, i64 poison }, i64 %trunc_result, 2
   %2 = select i1 %success, { i1, { i32, i8* }, i64 } %1, { i1, { i32, i8* }, i64 } { i1 false, { i32, i8* } { i32 2, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @0, i32 0, i32 0) }, i64 poison }
   store { i1, { i32, i8* }, i64 } %2, { i1, { i32, i8* }, i64 }* %"4_0", align 8
-  %"4_02" = load { i1, { i32, i8* }, i64 }, { i1, { i32, i8* }, i64 }* %"4_0", align 8
-  store { i1, { i32, i8* }, i64 } %"4_02", { i1, { i32, i8* }, i64 }* %"0", align 8
-  %"03" = load { i1, { i32, i8* }, i64 }, { i1, { i32, i8* }, i64 }* %"0", align 8
-  ret { i1, { i32, i8* }, i64 } %"03"
+  %"4_05" = load { i1, { i32, i8* }, i64 }, { i1, { i32, i8* }, i64 }* %"4_0", align 8
+  store { i1, { i32, i8* }, i64 } %"4_05", { i1, { i32, i8* }, i64 }* %"01", align 8
+  %"06" = load { i1, { i32, i8* }, i64 }, { i1, { i32, i8* }, i64 }* %"01", align 8
+  ret { i1, { i32, i8* }, i64 } %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fadd@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fadd@pre-mem2reg@llvm14.snap
index eb363c9a6..bc5be17a9 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fadd@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fadd@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/float.rs
+source: hugr-llvm/src/extension/float.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define double @_hl.main.1(double %0, double %1) {
 alloca_block:
   %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca double, align 8
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fadd double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fadd double %"2_06", %"2_17"
   store double %2, double* %"4_0", align 8
-  %"4_03" = load double, double* %"4_0", align 8
-  store double %"4_03", double* %"0", align 8
-  %"04" = load double, double* %"0", align 8
-  ret double %"04"
+  %"4_08" = load double, double* %"4_0", align 8
+  store double %"4_08", double* %"01", align 8
+  %"09" = load double, double* %"01", align 8
+  ret double %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fdiv@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fdiv@pre-mem2reg@llvm14.snap
index feeeb103f..7512a9c64 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fdiv@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fdiv@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/float.rs
+source: hugr-llvm/src/extension/float.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define double @_hl.main.1(double %0, double %1) {
 alloca_block:
   %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca double, align 8
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fdiv double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fdiv double %"2_06", %"2_17"
   store double %2, double* %"4_0", align 8
-  %"4_03" = load double, double* %"4_0", align 8
-  store double %"4_03", double* %"0", align 8
-  %"04" = load double, double* %"0", align 8
-  ret double %"04"
+  %"4_08" = load double, double* %"4_0", align 8
+  store double %"4_08", double* %"01", align 8
+  %"09" = load double, double* %"01", align 8
+  ret double %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__feq@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__feq@pre-mem2reg@llvm14.snap
index 20cfb6c04..107e73820 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__feq@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__feq@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(double %0, double %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca i1, align 1
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fcmp oeq double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fcmp oeq double %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fge@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fge@pre-mem2reg@llvm14.snap
index 5a2bf43d1..eb11af0da 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fge@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fge@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(double %0, double %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca i1, align 1
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fcmp oge double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fcmp oge double %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fgt@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fgt@pre-mem2reg@llvm14.snap
index 7ed459dac..fb537b21e 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fgt@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fgt@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(double %0, double %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca i1, align 1
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fcmp ogt double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fcmp ogt double %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fle@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fle@pre-mem2reg@llvm14.snap
index 454c69dcf..880084d21 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fle@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fle@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(double %0, double %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca i1, align 1
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fcmp ole double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fcmp ole double %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__flt@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__flt@pre-mem2reg@llvm14.snap
index 785cb59da..3b3663009 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__flt@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__flt@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(double %0, double %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca i1, align 1
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fcmp olt double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fcmp olt double %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fmul@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fmul@pre-mem2reg@llvm14.snap
index 0c39e565c..531443678 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fmul@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fmul@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/float.rs
+source: hugr-llvm/src/extension/float.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define double @_hl.main.1(double %0, double %1) {
 alloca_block:
   %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca double, align 8
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fmul double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fmul double %"2_06", %"2_17"
   store double %2, double* %"4_0", align 8
-  %"4_03" = load double, double* %"4_0", align 8
-  store double %"4_03", double* %"0", align 8
-  %"04" = load double, double* %"0", align 8
-  ret double %"04"
+  %"4_08" = load double, double* %"4_0", align 8
+  store double %"4_08", double* %"01", align 8
+  %"09" = load double, double* %"01", align 8
+  ret double %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fne@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fne@pre-mem2reg@llvm14.snap
index 0dc0e8c8c..bccfbaa5a 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fne@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fne@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(double %0, double %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca i1, align 1
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fcmp one double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fcmp one double %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fneg@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fneg@pre-mem2reg@llvm14.snap
index e1375e4c2..5c90372d5 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fneg@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fneg@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/float.rs
+source: hugr-llvm/src/extension/float.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,17 +8,21 @@ source_filename = "test_context"
 define double @_hl.main.1(double %0) {
 alloca_block:
   %"0" = alloca double, align 8
+  %"01" = alloca double, align 8
   %"2_0" = alloca double, align 8
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %1 = fneg double %"2_01"
+  store double %0, double* %"0", align 8
+  %"02" = load double, double* %"0", align 8
+  store double %"02", double* %"2_0", align 8
+  %"2_03" = load double, double* %"2_0", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %1 = fneg double %"2_04"
   store double %1, double* %"4_0", align 8
-  %"4_02" = load double, double* %"4_0", align 8
-  store double %"4_02", double* %"0", align 8
-  %"03" = load double, double* %"0", align 8
-  ret double %"03"
+  %"4_05" = load double, double* %"4_0", align 8
+  store double %"4_05", double* %"01", align 8
+  %"06" = load double, double* %"01", align 8
+  ret double %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fsub@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fsub@pre-mem2reg@llvm14.snap
index 2bc679775..09de93107 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fsub@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__float__test__fsub@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/float.rs
+source: hugr-llvm/src/extension/float.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define double @_hl.main.1(double %0, double %1) {
 alloca_block:
   %"0" = alloca double, align 8
+  %"1" = alloca double, align 8
+  %"01" = alloca double, align 8
   %"2_0" = alloca double, align 8
   %"2_1" = alloca double, align 8
   %"4_0" = alloca double, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store double %0, double* %"2_0", align 8
-  store double %1, double* %"2_1", align 8
-  %"2_01" = load double, double* %"2_0", align 8
-  %"2_12" = load double, double* %"2_1", align 8
-  %2 = fsub double %"2_01", %"2_12"
+  store double %0, double* %"0", align 8
+  store double %1, double* %"1", align 8
+  %"02" = load double, double* %"0", align 8
+  %"13" = load double, double* %"1", align 8
+  store double %"02", double* %"2_0", align 8
+  store double %"13", double* %"2_1", align 8
+  %"2_04" = load double, double* %"2_0", align 8
+  %"2_15" = load double, double* %"2_1", align 8
+  %"2_06" = load double, double* %"2_0", align 8
+  %"2_17" = load double, double* %"2_1", align 8
+  %2 = fsub double %"2_06", %"2_17"
   store double %2, double* %"4_0", align 8
-  %"4_03" = load double, double* %"4_0", align 8
-  store double %"4_03", double* %"0", align 8
-  %"04" = load double, double* %"0", align 8
-  ret double %"04"
+  %"4_08" = load double, double* %"4_0", align 8
+  store double %"4_08", double* %"01", align 8
+  %"09" = load double, double* %"01", align 8
+  ret double %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iadd@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iadd@pre-mem2reg@llvm14.snap
index cb24d6af8..017f7f390 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iadd@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iadd@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/int.rs
+source: hugr-llvm/src/extension/int.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define i8 @_hl.main.1(i8 %0, i8 %1) {
 alloca_block:
   %"0" = alloca i8, align 1
+  %"1" = alloca i8, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i8, align 1
   %"2_1" = alloca i8, align 1
   %"4_0" = alloca i8, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  store i8 %1, i8* %"2_1", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %"2_12" = load i8, i8* %"2_1", align 1
-  %2 = add i8 %"2_01", %"2_12"
+  store i8 %0, i8* %"0", align 1
+  store i8 %1, i8* %"1", align 1
+  %"02" = load i8, i8* %"0", align 1
+  %"13" = load i8, i8* %"1", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  store i8 %"13", i8* %"2_1", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %"2_15" = load i8, i8* %"2_1", align 1
+  %"2_06" = load i8, i8* %"2_0", align 1
+  %"2_17" = load i8, i8* %"2_1", align 1
+  %2 = add i8 %"2_06", %"2_17"
   store i8 %2, i8* %"4_0", align 1
-  %"4_03" = load i8, i8* %"4_0", align 1
-  store i8 %"4_03", i8* %"0", align 1
-  %"04" = load i8, i8* %"0", align 1
-  ret i8 %"04"
+  %"4_08" = load i8, i8* %"4_0", align 1
+  store i8 %"4_08", i8* %"01", align 1
+  %"09" = load i8, i8* %"01", align 1
+  ret i8 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ieq@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ieq@pre-mem2reg@llvm14.snap
index 0ca058a26..9a0e5743c 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ieq@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ieq@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(i8 %0, i8 %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca i8, align 1
+  %"1" = alloca i8, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i8, align 1
   %"2_1" = alloca i8, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  store i8 %1, i8* %"2_1", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %"2_12" = load i8, i8* %"2_1", align 1
-  %2 = icmp eq i8 %"2_01", %"2_12"
+  store i8 %0, i8* %"0", align 1
+  store i8 %1, i8* %"1", align 1
+  %"02" = load i8, i8* %"0", align 1
+  %"13" = load i8, i8* %"1", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  store i8 %"13", i8* %"2_1", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %"2_15" = load i8, i8* %"2_1", align 1
+  %"2_06" = load i8, i8* %"2_0", align 1
+  %"2_17" = load i8, i8* %"2_1", align 1
+  %2 = icmp eq i8 %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ilt_s@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ilt_s@pre-mem2reg@llvm14.snap
index 9487469db..aa7895022 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ilt_s@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ilt_s@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define i1 @_hl.main.1(i8 %0, i8 %1) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca i8, align 1
+  %"1" = alloca i8, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i8, align 1
   %"2_1" = alloca i8, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  store i8 %1, i8* %"2_1", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %"2_12" = load i8, i8* %"2_1", align 1
-  %2 = icmp slt i8 %"2_01", %"2_12"
+  store i8 %0, i8* %"0", align 1
+  store i8 %1, i8* %"1", align 1
+  %"02" = load i8, i8* %"0", align 1
+  %"13" = load i8, i8* %"1", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  store i8 %"13", i8* %"2_1", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %"2_15" = load i8, i8* %"2_1", align 1
+  %"2_06" = load i8, i8* %"2_0", align 1
+  %"2_17" = load i8, i8* %"2_1", align 1
+  %2 = icmp slt i8 %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ineg@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ineg@pre-mem2reg@llvm14.snap
index d203a8a1b..c2308f0bf 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ineg@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ineg@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/int.rs
+source: hugr-llvm/src/extension/int.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,17 +8,21 @@ source_filename = "test_context"
 define i8 @_hl.main.1(i8 %0) {
 alloca_block:
   %"0" = alloca i8, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i8, align 1
   %"4_0" = alloca i8, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %1 = sub i8 0, %"2_01"
+  store i8 %0, i8* %"0", align 1
+  %"02" = load i8, i8* %"0", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  %"2_03" = load i8, i8* %"2_0", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %1 = sub i8 0, %"2_04"
   store i8 %1, i8* %"4_0", align 1
-  %"4_02" = load i8, i8* %"4_0", align 1
-  store i8 %"4_02", i8* %"0", align 1
-  %"03" = load i8, i8* %"0", align 1
-  ret i8 %"03"
+  %"4_05" = load i8, i8* %"4_0", align 1
+  store i8 %"4_05", i8* %"01", align 1
+  %"06" = load i8, i8* %"01", align 1
+  ret i8 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ipow@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ipow@pre-mem2reg@llvm14.snap
index 5f2b7e68e..8d6c3b8f8 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ipow@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__ipow@pre-mem2reg@llvm14.snap
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define i8 @_hl.main.1(i8 %0, i8 %1) {
 alloca_block:
   %"0" = alloca i8, align 1
+  %"1" = alloca i8, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i8, align 1
   %"2_1" = alloca i8, align 1
   %"4_0" = alloca i8, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  store i8 %1, i8* %"2_1", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %"2_12" = load i8, i8* %"2_1", align 1
+  store i8 %0, i8* %"0", align 1
+  store i8 %1, i8* %"1", align 1
+  %"02" = load i8, i8* %"0", align 1
+  %"13" = load i8, i8* %"1", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  store i8 %"13", i8* %"2_1", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %"2_15" = load i8, i8* %"2_1", align 1
+  %"2_06" = load i8, i8* %"2_0", align 1
+  %"2_17" = load i8, i8* %"2_1", align 1
   %acc_ptr = alloca i8, align 1
   %exp_ptr = alloca i8, align 1
-  store i8 %"2_01", i8* %acc_ptr, align 1
-  store i8 %"2_12", i8* %exp_ptr, align 1
+  store i8 %"2_06", i8* %acc_ptr, align 1
+  store i8 %"2_17", i8* %exp_ptr, align 1
   br label %pow
 
 pow:                                              ; preds = %pow_body, %entry_block
@@ -37,7 +45,7 @@ power_of_zero:                                    ; preds = %pow
   br label %done
 
 pow_body:                                         ; preds = %pow
-  %new_acc = mul i8 %acc, %"2_01"
+  %new_acc = mul i8 %acc, %"2_06"
   %new_exp = sub i8 %exp, 1
   store i8 %new_acc, i8* %acc_ptr, align 1
   store i8 %new_exp, i8* %exp_ptr, align 1
@@ -46,8 +54,8 @@ pow_body:                                         ; preds = %pow
 done:                                             ; preds = %pow, %power_of_zero
   %result = load i8, i8* %acc_ptr, align 1
   store i8 %result, i8* %"4_0", align 1
-  %"4_03" = load i8, i8* %"4_0", align 1
-  store i8 %"4_03", i8* %"0", align 1
-  %"04" = load i8, i8* %"0", align 1
-  ret i8 %"04"
+  %"4_08" = load i8, i8* %"4_0", align 1
+  store i8 %"4_08", i8* %"01", align 1
+  %"09" = load i8, i8* %"01", align 1
+  ret i8 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__isub@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__isub@pre-mem2reg@llvm14.snap
index a21b58900..82cfac970 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__isub@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__isub@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/int.rs
+source: hugr-llvm/src/extension/int.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -8,20 +8,28 @@ source_filename = "test_context"
 define i64 @_hl.main.1(i64 %0, i64 %1) {
 alloca_block:
   %"0" = alloca i64, align 8
+  %"1" = alloca i64, align 8
+  %"01" = alloca i64, align 8
   %"2_0" = alloca i64, align 8
   %"2_1" = alloca i64, align 8
   %"4_0" = alloca i64, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i64 %0, i64* %"2_0", align 4
-  store i64 %1, i64* %"2_1", align 4
-  %"2_01" = load i64, i64* %"2_0", align 4
-  %"2_12" = load i64, i64* %"2_1", align 4
-  %2 = sub i64 %"2_01", %"2_12"
+  store i64 %0, i64* %"0", align 4
+  store i64 %1, i64* %"1", align 4
+  %"02" = load i64, i64* %"0", align 4
+  %"13" = load i64, i64* %"1", align 4
+  store i64 %"02", i64* %"2_0", align 4
+  store i64 %"13", i64* %"2_1", align 4
+  %"2_04" = load i64, i64* %"2_0", align 4
+  %"2_15" = load i64, i64* %"2_1", align 4
+  %"2_06" = load i64, i64* %"2_0", align 4
+  %"2_17" = load i64, i64* %"2_1", align 4
+  %2 = sub i64 %"2_06", %"2_17"
   store i64 %2, i64* %"4_0", align 4
-  %"4_03" = load i64, i64* %"4_0", align 4
-  store i64 %"4_03", i64* %"0", align 4
-  %"04" = load i64, i64* %"0", align 4
-  ret i64 %"04"
+  %"4_08" = load i64, i64* %"4_0", align 4
+  store i64 %"4_08", i64* %"01", align 4
+  %"09" = load i64, i64* %"01", align 4
+  ret i64 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_1_6@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_1_6@pre-mem2reg@llvm14.snap
index fcb34323d..86ea833a9 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_1_6@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_1_6@pre-mem2reg@llvm14.snap
@@ -7,18 +7,22 @@ source_filename = "test_context"
 
 define i64 @_hl.main.1(i8 %0) {
 alloca_block:
-  %"0" = alloca i64, align 8
+  %"0" = alloca i8, align 1
+  %"01" = alloca i64, align 8
   %"2_0" = alloca i8, align 1
   %"4_0" = alloca i64, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %1 = sext i8 %"2_01" to i64
+  store i8 %0, i8* %"0", align 1
+  %"02" = load i8, i8* %"0", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  %"2_03" = load i8, i8* %"2_0", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %1 = sext i8 %"2_04" to i64
   store i64 %1, i64* %"4_0", align 4
-  %"4_02" = load i64, i64* %"4_0", align 4
-  store i64 %"4_02", i64* %"0", align 4
-  %"03" = load i64, i64* %"0", align 4
-  ret i64 %"03"
+  %"4_05" = load i64, i64* %"4_0", align 4
+  store i64 %"4_05", i64* %"01", align 4
+  %"06" = load i64, i64* %"01", align 4
+  ret i64 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_2_3@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_2_3@pre-mem2reg@llvm14.snap
index 0b60c0fe3..a3e6e71bf 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_2_3@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_s_2_3@pre-mem2reg@llvm14.snap
@@ -8,16 +8,20 @@ source_filename = "test_context"
 define i8 @_hl.main.1(i8 %0) {
 alloca_block:
   %"0" = alloca i8, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i8, align 1
   %"4_0" = alloca i8, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  store i8 %"2_01", i8* %"4_0", align 1
-  %"4_02" = load i8, i8* %"4_0", align 1
-  store i8 %"4_02", i8* %"0", align 1
-  %"03" = load i8, i8* %"0", align 1
-  ret i8 %"03"
+  store i8 %0, i8* %"0", align 1
+  %"02" = load i8, i8* %"0", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  %"2_03" = load i8, i8* %"2_0", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  store i8 %"2_04", i8* %"4_0", align 1
+  %"4_05" = load i8, i8* %"4_0", align 1
+  store i8 %"4_05", i8* %"01", align 1
+  %"06" = load i8, i8* %"01", align 1
+  ret i8 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_1_6@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_1_6@pre-mem2reg@llvm14.snap
index aacf2b349..e733d1969 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_1_6@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_1_6@pre-mem2reg@llvm14.snap
@@ -7,18 +7,22 @@ source_filename = "test_context"
 
 define i64 @_hl.main.1(i8 %0) {
 alloca_block:
-  %"0" = alloca i64, align 8
+  %"0" = alloca i8, align 1
+  %"01" = alloca i64, align 8
   %"2_0" = alloca i8, align 1
   %"4_0" = alloca i64, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  %1 = zext i8 %"2_01" to i64
+  store i8 %0, i8* %"0", align 1
+  %"02" = load i8, i8* %"0", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  %"2_03" = load i8, i8* %"2_0", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  %1 = zext i8 %"2_04" to i64
   store i64 %1, i64* %"4_0", align 4
-  %"4_02" = load i64, i64* %"4_0", align 4
-  store i64 %"4_02", i64* %"0", align 4
-  %"03" = load i64, i64* %"0", align 4
-  ret i64 %"03"
+  %"4_05" = load i64, i64* %"4_0", align 4
+  store i64 %"4_05", i64* %"01", align 4
+  %"06" = load i64, i64* %"01", align 4
+  ret i64 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_2_3@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_2_3@pre-mem2reg@llvm14.snap
index 0b60c0fe3..a3e6e71bf 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_2_3@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__int__test__iwiden_u_2_3@pre-mem2reg@llvm14.snap
@@ -8,16 +8,20 @@ source_filename = "test_context"
 define i8 @_hl.main.1(i8 %0) {
 alloca_block:
   %"0" = alloca i8, align 1
+  %"01" = alloca i8, align 1
   %"2_0" = alloca i8, align 1
   %"4_0" = alloca i8, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i8 %0, i8* %"2_0", align 1
-  %"2_01" = load i8, i8* %"2_0", align 1
-  store i8 %"2_01", i8* %"4_0", align 1
-  %"4_02" = load i8, i8* %"4_0", align 1
-  store i8 %"4_02", i8* %"0", align 1
-  %"03" = load i8, i8* %"0", align 1
-  ret i8 %"03"
+  store i8 %0, i8* %"0", align 1
+  %"02" = load i8, i8* %"0", align 1
+  store i8 %"02", i8* %"2_0", align 1
+  %"2_03" = load i8, i8* %"2_0", align 1
+  %"2_04" = load i8, i8* %"2_0", align 1
+  store i8 %"2_04", i8* %"4_0", align 1
+  %"4_05" = load i8, i8* %"4_0", align 1
+  store i8 %"4_05", i8* %"01", align 1
+  %"06" = load i8, i8* %"01", align 1
+  ret i8 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__and@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__and@pre-mem2reg@llvm14.snap
index d91355597..3ed7ef3c2 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__and@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__and@pre-mem2reg@llvm14.snap
@@ -8,21 +8,29 @@ source_filename = "test_context"
 define i1 @_hl.main.1(i1 %0, i1 %1) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i1, align 1
   %"2_1" = alloca i1, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  store i1 %1, i1* %"2_1", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %"2_12" = load i1, i1* %"2_1", align 1
-  %2 = and i1 %"2_01", %"2_12"
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"02" = load i1, i1* %"0", align 1
+  %"13" = load i1, i1* %"1", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  store i1 %"13", i1* %"2_1", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %"2_15" = load i1, i1* %"2_1", align 1
+  %"2_06" = load i1, i1* %"2_0", align 1
+  %"2_17" = load i1, i1* %"2_1", align 1
+  %2 = and i1 %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__eq@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__eq@pre-mem2reg@llvm14.snap
index 1ae725134..50cb596e7 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__eq@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__eq@pre-mem2reg@llvm14.snap
@@ -8,21 +8,29 @@ source_filename = "test_context"
 define i1 @_hl.main.1(i1 %0, i1 %1) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i1, align 1
   %"2_1" = alloca i1, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  store i1 %1, i1* %"2_1", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %"2_12" = load i1, i1* %"2_1", align 1
-  %2 = icmp eq i1 %"2_01", %"2_12"
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"02" = load i1, i1* %"0", align 1
+  %"13" = load i1, i1* %"1", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  store i1 %"13", i1* %"2_1", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %"2_15" = load i1, i1* %"2_1", align 1
+  %"2_06" = load i1, i1* %"2_0", align 1
+  %"2_17" = load i1, i1* %"2_1", align 1
+  %2 = icmp eq i1 %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__not@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__not@pre-mem2reg@llvm14.snap
index ea0c1e98a..7a70fc3ff 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__not@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__not@pre-mem2reg@llvm14.snap
@@ -8,18 +8,22 @@ source_filename = "test_context"
 define i1 @_hl.main.1(i1 %0) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i1, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %1 = xor i1 %"2_01", true
+  store i1 %0, i1* %"0", align 1
+  %"02" = load i1, i1* %"0", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  %"2_03" = load i1, i1* %"2_0", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %1 = xor i1 %"2_04", true
   %2 = select i1 %1, i1 true, i1 false
   store i1 %2, i1* %"4_0", align 1
-  %"4_02" = load i1, i1* %"4_0", align 1
-  store i1 %"4_02", i1* %"0", align 1
-  %"03" = load i1, i1* %"0", align 1
-  ret i1 %"03"
+  %"4_05" = load i1, i1* %"4_0", align 1
+  store i1 %"4_05", i1* %"01", align 1
+  %"06" = load i1, i1* %"01", align 1
+  ret i1 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__or@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__or@pre-mem2reg@llvm14.snap
index 03d0fccaf..78df3410e 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__or@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__or@pre-mem2reg@llvm14.snap
@@ -8,21 +8,29 @@ source_filename = "test_context"
 define i1 @_hl.main.1(i1 %0, i1 %1) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i1, align 1
   %"2_1" = alloca i1, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  store i1 %1, i1* %"2_1", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %"2_12" = load i1, i1* %"2_1", align 1
-  %2 = or i1 %"2_01", %"2_12"
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"02" = load i1, i1* %"0", align 1
+  %"13" = load i1, i1* %"1", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  store i1 %"13", i1* %"2_1", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %"2_15" = load i1, i1* %"2_1", align 1
+  %"2_06" = load i1, i1* %"2_0", align 1
+  %"2_17" = load i1, i1* %"2_1", align 1
+  %2 = or i1 %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__xor@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__xor@pre-mem2reg@llvm14.snap
index a5dcf022d..dc2e1c671 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__xor@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__logic__test__xor@pre-mem2reg@llvm14.snap
@@ -8,21 +8,29 @@ source_filename = "test_context"
 define i1 @_hl.main.1(i1 %0, i1 %1) {
 alloca_block:
   %"0" = alloca i1, align 1
+  %"1" = alloca i1, align 1
+  %"01" = alloca i1, align 1
   %"2_0" = alloca i1, align 1
   %"2_1" = alloca i1, align 1
   %"4_0" = alloca i1, align 1
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  store i1 %1, i1* %"2_1", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %"2_12" = load i1, i1* %"2_1", align 1
-  %2 = xor i1 %"2_01", %"2_12"
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"02" = load i1, i1* %"0", align 1
+  %"13" = load i1, i1* %"1", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  store i1 %"13", i1* %"2_1", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %"2_15" = load i1, i1* %"2_1", align 1
+  %"2_06" = load i1, i1* %"2_0", align 1
+  %"2_17" = load i1, i1* %"2_1", align 1
+  %2 = xor i1 %"2_06", %"2_17"
   %3 = select i1 %2, i1 true, i1 false
   store i1 %3, i1* %"4_0", align 1
-  %"4_03" = load i1, i1* %"4_0", align 1
-  store i1 %"4_03", i1* %"0", align 1
-  %"04" = load i1, i1* %"0", align 1
-  ret i1 %"04"
+  %"4_08" = load i1, i1* %"4_0", align 1
+  store i1 %"4_08", i1* %"01", align 1
+  %"09" = load i1, i1* %"01", align 1
+  ret i1 %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_barrier@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_barrier@pre-mem2reg@llvm14.snap
index e91f72e93..67d42a632 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_barrier@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_barrier@pre-mem2reg@llvm14.snap
@@ -17,10 +17,12 @@ entry_block:                                      ; preds = %alloca_block
   store i64 42, i64* %"5_0", align 4
   %"5_01" = load i64, i64* %"5_0", align 4
   %"5_02" = load i64, i64* %"5_0", align 4
-  store i64 %"5_01", i64* %"6_0", align 4
-  store i64 %"5_02", i64* %"6_1", align 4
-  %"6_03" = load i64, i64* %"6_0", align 4
-  store i64 %"6_03", i64* %"0", align 4
-  %"04" = load i64, i64* %"0", align 4
-  ret i64 %"04"
+  %"5_03" = load i64, i64* %"5_0", align 4
+  %"5_04" = load i64, i64* %"5_0", align 4
+  store i64 %"5_03", i64* %"6_0", align 4
+  store i64 %"5_04", i64* %"6_1", align 4
+  %"6_05" = load i64, i64* %"6_0", align 4
+  store i64 %"6_05", i64* %"0", align 4
+  %"06" = load i64, i64* %"0", align 4
+  ret i64 %"06"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_make_tuple@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_make_tuple@pre-mem2reg@llvm14.snap
index 541d6f999..dfb266584 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_make_tuple@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_make_tuple@pre-mem2reg@llvm14.snap
@@ -7,22 +7,30 @@ source_filename = "test_context"
 
 define { i1, i1 } @_hl.main.1(i1 %0, i1 %1) {
 alloca_block:
-  %"0" = alloca { i1, i1 }, align 8
+  %"0" = alloca i1, align 1
+  %"1" = alloca i1, align 1
+  %"01" = alloca { i1, i1 }, align 8
   %"2_0" = alloca i1, align 1
   %"2_1" = alloca i1, align 1
   %"4_0" = alloca { i1, i1 }, align 8
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store i1 %0, i1* %"2_0", align 1
-  store i1 %1, i1* %"2_1", align 1
-  %"2_01" = load i1, i1* %"2_0", align 1
-  %"2_12" = load i1, i1* %"2_1", align 1
-  %2 = insertvalue { i1, i1 } poison, i1 %"2_01", 0
-  %3 = insertvalue { i1, i1 } %2, i1 %"2_12", 1
+  store i1 %0, i1* %"0", align 1
+  store i1 %1, i1* %"1", align 1
+  %"02" = load i1, i1* %"0", align 1
+  %"13" = load i1, i1* %"1", align 1
+  store i1 %"02", i1* %"2_0", align 1
+  store i1 %"13", i1* %"2_1", align 1
+  %"2_04" = load i1, i1* %"2_0", align 1
+  %"2_15" = load i1, i1* %"2_1", align 1
+  %"2_06" = load i1, i1* %"2_0", align 1
+  %"2_17" = load i1, i1* %"2_1", align 1
+  %2 = insertvalue { i1, i1 } poison, i1 %"2_06", 0
+  %3 = insertvalue { i1, i1 } %2, i1 %"2_17", 1
   store { i1, i1 } %3, { i1, i1 }* %"4_0", align 1
-  %"4_03" = load { i1, i1 }, { i1, i1 }* %"4_0", align 1
-  store { i1, i1 } %"4_03", { i1, i1 }* %"0", align 1
-  %"04" = load { i1, i1 }, { i1, i1 }* %"0", align 1
-  ret { i1, i1 } %"04"
+  %"4_08" = load { i1, i1 }, { i1, i1 }* %"4_0", align 1
+  store { i1, i1 } %"4_08", { i1, i1 }* %"01", align 1
+  %"09" = load { i1, i1 }, { i1, i1 }* %"01", align 1
+  ret { i1, i1 } %"09"
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@llvm14.snap
index 9f1a4deb5..9a14fed5d 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/prelude.rs
+source: hugr-llvm/src/extension/prelude.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -18,8 +18,8 @@ entry_block:                                      ; preds = %alloca_block
   %4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template, i32 0, i32 0), i32 %2, i8* %3)
   call void @abort()
   %mrv = insertvalue { i16, i16 } undef, i16 0, 0
-  %mrv8 = insertvalue { i16, i16 } %mrv, i16 0, 1
-  ret { i16, i16 } %mrv8
+  %mrv15 = insertvalue { i16, i16 } %mrv, i16 0, 1
+  ret { i16, i16 } %mrv15
 }
 
 declare i32 @printf(i8*, ...)
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@pre-mem2reg@llvm14.snap
index bb538ee4d..b7ca41412 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_panic@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/prelude.rs
+source: hugr-llvm/src/extension/prelude.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -12,6 +12,8 @@ define { i16, i16 } @_hl.main.1(i16 %0, i16 %1) {
 alloca_block:
   %"0" = alloca i16, align 2
   %"1" = alloca i16, align 2
+  %"01" = alloca i16, align 2
+  %"12" = alloca i16, align 2
   %"5_0" = alloca { i32, i8* }, align 8
   %"2_0" = alloca i16, align 2
   %"2_1" = alloca i16, align 2
@@ -20,27 +22,34 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
+  store i16 %0, i16* %"0", align 2
+  store i16 %1, i16* %"1", align 2
+  %"03" = load i16, i16* %"0", align 2
+  %"14" = load i16, i16* %"1", align 2
   store { i32, i8* } { i32 42, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @0, i32 0, i32 0) }, { i32, i8* }* %"5_0", align 8
-  store i16 %0, i16* %"2_0", align 2
-  store i16 %1, i16* %"2_1", align 2
-  %"5_01" = load { i32, i8* }, { i32, i8* }* %"5_0", align 8
-  %"2_02" = load i16, i16* %"2_0", align 2
-  %"2_13" = load i16, i16* %"2_1", align 2
-  %2 = extractvalue { i32, i8* } %"5_01", 0
-  %3 = extractvalue { i32, i8* } %"5_01", 1
+  store i16 %"03", i16* %"2_0", align 2
+  store i16 %"14", i16* %"2_1", align 2
+  %"5_05" = load { i32, i8* }, { i32, i8* }* %"5_0", align 8
+  %"2_06" = load i16, i16* %"2_0", align 2
+  %"2_17" = load i16, i16* %"2_1", align 2
+  %"5_08" = load { i32, i8* }, { i32, i8* }* %"5_0", align 8
+  %"2_09" = load i16, i16* %"2_0", align 2
+  %"2_110" = load i16, i16* %"2_1", align 2
+  %2 = extractvalue { i32, i8* } %"5_08", 0
+  %3 = extractvalue { i32, i8* } %"5_08", 1
   %4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @prelude.panic_template, i32 0, i32 0), i32 %2, i8* %3)
   call void @abort()
   store i16 0, i16* %"6_0", align 2
   store i16 0, i16* %"6_1", align 2
-  %"6_04" = load i16, i16* %"6_0", align 2
-  %"6_15" = load i16, i16* %"6_1", align 2
-  store i16 %"6_04", i16* %"0", align 2
-  store i16 %"6_15", i16* %"1", align 2
-  %"06" = load i16, i16* %"0", align 2
-  %"17" = load i16, i16* %"1", align 2
-  %mrv = insertvalue { i16, i16 } undef, i16 %"06", 0
-  %mrv8 = insertvalue { i16, i16 } %mrv, i16 %"17", 1
-  ret { i16, i16 } %mrv8
+  %"6_011" = load i16, i16* %"6_0", align 2
+  %"6_112" = load i16, i16* %"6_1", align 2
+  store i16 %"6_011", i16* %"01", align 2
+  store i16 %"6_112", i16* %"12", align 2
+  %"013" = load i16, i16* %"01", align 2
+  %"114" = load i16, i16* %"12", align 2
+  %mrv = insertvalue { i16, i16 } undef, i16 %"013", 0
+  %mrv15 = insertvalue { i16, i16 } %mrv, i16 %"114", 1
+  ret { i16, i16 } %mrv15
 }
 
 declare i32 @printf(i8*, ...)
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_print@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_print@pre-mem2reg@llvm14.snap
index 714e1faf1..3319a2846 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_print@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_print@pre-mem2reg@llvm14.snap
@@ -1,5 +1,5 @@
 ---
-source: src/extension/prelude.rs
+source: hugr-llvm/src/extension/prelude.rs
 expression: mod_str
 ---
 ; ModuleID = 'test_context'
@@ -16,7 +16,8 @@ alloca_block:
 entry_block:                                      ; preds = %alloca_block
   store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @0, i32 0, i32 0), i8** %"5_0", align 8
   %"5_01" = load i8*, i8** %"5_0", align 8
-  %0 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @prelude.print_template, i32 0, i32 0), i8* %"5_01")
+  %"5_02" = load i8*, i8** %"5_0", align 8
+  %0 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @prelude.print_template, i32 0, i32 0), i8* %"5_02")
   ret void
 }
 
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@llvm14.snap
index 6ff5fe365..8a0818a92 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@llvm14.snap
@@ -13,6 +13,6 @@ entry_block:                                      ; preds = %alloca_block
   %1 = extractvalue { i1, i1 } %0, 0
   %2 = extractvalue { i1, i1 } %0, 1
   %mrv = insertvalue { i1, i1 } undef, i1 %1, 0
-  %mrv6 = insertvalue { i1, i1 } %mrv, i1 %2, 1
-  ret { i1, i1 } %mrv6
+  %mrv9 = insertvalue { i1, i1 } %mrv, i1 %2, 1
+  ret { i1, i1 } %mrv9
 }
diff --git a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@pre-mem2reg@llvm14.snap b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@pre-mem2reg@llvm14.snap
index bad354037..e615d1b22 100644
--- a/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@pre-mem2reg@llvm14.snap
+++ b/hugr-llvm/src/extension/snapshots/hugr_llvm__extension__prelude__test__prelude_unpack_tuple@pre-mem2reg@llvm14.snap
@@ -7,7 +7,8 @@ source_filename = "test_context"
 
 define { i1, i1 } @_hl.main.1({ i1, i1 } %0) {
 alloca_block:
-  %"0" = alloca i1, align 1
+  %"0" = alloca { i1, i1 }, align 8
+  %"01" = alloca i1, align 1
   %"1" = alloca i1, align 1
   %"2_0" = alloca { i1, i1 }, align 8
   %"4_0" = alloca i1, align 1
@@ -15,19 +16,22 @@ alloca_block:
   br label %entry_block
 
 entry_block:                                      ; preds = %alloca_block
-  store { i1, i1 } %0, { i1, i1 }* %"2_0", align 1
-  %"2_01" = load { i1, i1 }, { i1, i1 }* %"2_0", align 1
-  %1 = extractvalue { i1, i1 } %"2_01", 0
-  %2 = extractvalue { i1, i1 } %"2_01", 1
+  store { i1, i1 } %0, { i1, i1 }* %"0", align 1
+  %"02" = load { i1, i1 }, { i1, i1 }* %"0", align 1
+  store { i1, i1 } %"02", { i1, i1 }* %"2_0", align 1
+  %"2_03" = load { i1, i1 }, { i1, i1 }* %"2_0", align 1
+  %"2_04" = load { i1, i1 }, { i1, i1 }* %"2_0", align 1
+  %1 = extractvalue { i1, i1 } %"2_04", 0
+  %2 = extractvalue { i1, i1 } %"2_04", 1
   store i1 %1, i1* %"4_0", align 1
   store i1 %2, i1* %"4_1", align 1
-  %"4_02" = load i1, i1* %"4_0", align 1
-  %"4_13" = load i1, i1* %"4_1", align 1
-  store i1 %"4_02", i1* %"0", align 1
-  store i1 %"4_13", i1* %"1", align 1
-  %"04" = load i1, i1* %"0", align 1
-  %"15" = load i1, i1* %"1", align 1
-  %mrv = insertvalue { i1, i1 } undef, i1 %"04", 0
-  %mrv6 = insertvalue { i1, i1 } %mrv, i1 %"15", 1
-  ret { i1, i1 } %mrv6
+  %"4_05" = load i1, i1* %"4_0", align 1
+  %"4_16" = load i1, i1* %"4_1", align 1
+  store i1 %"4_05", i1* %"01", align 1
+  store i1 %"4_16", i1* %"1", align 1
+  %"07" = load i1, i1* %"01", align 1
+  %"18" = load i1, i1* %"1", align 1
+  %mrv = insertvalue { i1, i1 } undef, i1 %"07", 0
+  %mrv9 = insertvalue { i1, i1 } %mrv, i1 %"18", 1
+  ret { i1, i1 } %mrv9
 }
diff --git a/hugr-llvm/src/sum.rs b/hugr-llvm/src/sum.rs
index c2b9a0475..b43727471 100644
--- a/hugr-llvm/src/sum.rs
+++ b/hugr-llvm/src/sum.rs
@@ -104,6 +104,9 @@ impl<'c> LLVMSumType<'c> {
             /// The LLVM types representing the fields in the `tag` variant of the represented [HugrSumType].
             /// Panics if `tag` is out of bounds.
             pub fn fields_for_variant(&self, tag: usize) -> &[BasicTypeEnum<'c>];
+
+            /// TODO docs
+            pub fn gep_indices(&self, index_ty: IntType<'c>, tag: usize, field: usize) -> Result<(BasicTypeEnum<'c>, Vec<IntValue<'c>>)>;
         }
     }
 
@@ -402,6 +405,21 @@ impl<'c> LLVMSumTypeEnum<'c> {
         Ok(value)
     }
 
+    pub fn gep_indices(&self, index_ty: IntType<'c>, tag: usize, field: usize) -> Result<(BasicTypeEnum<'c>, Vec<IntValue<'c>>)> {
+        ensure!(tag < self.num_variants());
+        ensure!(field == self.num_fields_for_variant(tag));
+        if let Self::SingleVariantSingleField { field_types, field_index, .. } = self {
+            // This is a valid question to ask, but the representation is not a
+            // struct, so no indices.
+            return Ok((field_types[*field_index], vec![]))
+        }
+        let Some(field_index) = self.field_index(tag, field) else {
+            bail!("Bad field index {field} in {tag} of {self}")
+        };
+        let field_type = self.value_type().into_struct_type().get_field_type_at_index(field_index as u32).unwrap();
+        Ok((field_type, vec![index_ty.const_int(field_index as u64, false)]))
+    }
+
     /// Get the type of the value that would be returned by `build_get_tag`.
     pub fn tag_type(&self) -> IntType<'c> {
         match self {
@@ -466,6 +484,17 @@ impl<'c> LLVMSumTypeEnum<'c> {
             }
         }
     }
+
+    fn field_index(&self, tag: usize, field: usize) -> Option<usize> {
+        assert!(tag < self.num_variants());
+        assert!(field < self.num_fields_for_variant(tag));
+        match self {
+            Self::Void { .. } | Self::Unit { .. } | LLVMSumTypeEnum::NoFields {..} => unreachable!("Variant has no fields"),
+            LLVMSumTypeEnum::SingleVariantSingleField { .. } => None, // not a struct so no field
+            LLVMSumTypeEnum::SingleVariantMultiField { field_indices, .. } => field_indices[field],
+            LLVMSumTypeEnum::MultiVariant { field_indices, ..} => field_indices[tag][field],
+        }
+    }
 }
 
 impl<'c> From<LLVMSumTypeEnum<'c>> for BasicTypeEnum<'c> {