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Fixed flash CRC check
1 parent b2816ef commit 023d786

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7 files changed

+74
-69
lines changed

7 files changed

+74
-69
lines changed

CHANGELOG

+1
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
* Virtual motor support.
55
* Disable chuk cruise control on dropouts.
66
* Fix multiple VESCs over CAN duty cycle mode.
7+
* Added boot and runtime flash memory CRC integrity check.
78

89
=== FW 3.54 ===
910
* Added mcpwm_foc_set_openloop_duty and mcpwm_foc_set_openloop_duty_phase.

Makefile

+1-1
Original file line numberDiff line numberDiff line change
@@ -276,7 +276,7 @@ ifeq ($(USE_FWLIB),yes)
276276
endif
277277

278278
build/$(PROJECT).bin: build/$(PROJECT).elf
279-
$(BIN) build/$(PROJECT).elf build/$(PROJECT).bin
279+
$(BIN) build/$(PROJECT).elf build/$(PROJECT).bin --gap-fill 0xFF
280280

281281
# Program
282282
upload: build/$(PROJECT).bin

blackmagic/bm_if.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -194,7 +194,7 @@ static void terminal_flash_erase(int argc, const char **argv) {
194194
sscanf(argv[1], "%x", &addr);
195195
sscanf(argv[2], "%d", &len);
196196

197-
if (addr >= 0 && len >= 0) {
197+
if (len >= 0) {
198198
if (cur_target) {
199199
bm_set_enabled(true);
200200
target_print_en = true;

crc.c

+8-7
Original file line numberDiff line numberDiff line change
@@ -68,12 +68,13 @@ unsigned short crc16(unsigned char *buf, unsigned int len) {
6868
* @retval 32-bit CRC
6969
*/
7070
uint32_t crc32(uint32_t *pBuffer, uint32_t BufferLength) {
71-
uint32_t index = 0;
71+
uint32_t index = 0;
7272

73-
for(index = 0; index < BufferLength; index++) {
74-
CRC->DR = pBuffer[index];
75-
}
76-
return (CRC->DR);
73+
for(index = 0; index < BufferLength; index++) {
74+
CRC->DR = pBuffer[index];
75+
}
76+
77+
return (CRC->DR);
7778
}
7879

7980
/**
@@ -82,6 +83,6 @@ uint32_t crc32(uint32_t *pBuffer, uint32_t BufferLength) {
8283
* @retval None
8384
*/
8485
void crc32_reset(void) {
85-
/* Reset CRC generator */
86-
CRC->CR = CRC_CR_RESET;
86+
/* Reset CRC generator */
87+
CRC->CR |= CRC_CR_RESET;
8788
}

flash_helper.c

+57-54
Original file line numberDiff line numberDiff line change
@@ -31,36 +31,37 @@
3131
/*
3232
* Defines
3333
*/
34-
#define FLASH_SECTORS 12
35-
#define BOOTLOADER_BASE 11
36-
#define APP_BASE 0
37-
#define NEW_APP_BASE 8
38-
#define NEW_APP_SECTORS 3
39-
#define APP_MAX_SIZE (3 * (1 << 17))
40-
#define EEPROM_EMULATION_SIZE 0x8000
34+
#define FLASH_SECTORS 12
35+
#define BOOTLOADER_BASE 11
36+
#define APP_BASE 0
37+
#define NEW_APP_BASE 8
38+
#define NEW_APP_SECTORS 3
39+
#define APP_MAX_SIZE (393216 - 8) // Note that the bootloader needs 8 extra bytes
4140

4241
// Base address of the Flash sectors
43-
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) // Base @ of Sector 0, 16 Kbytes
44-
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) // Base @ of Sector 1, 16 Kbytes
45-
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) // Base @ of Sector 2, 16 Kbytes
46-
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) // Base @ of Sector 3, 16 Kbytes
47-
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) // Base @ of Sector 4, 64 Kbytes
48-
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) // Base @ of Sector 5, 128 Kbytes
49-
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) // Base @ of Sector 6, 128 Kbytes
50-
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) // Base @ of Sector 7, 128 Kbytes
51-
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) // Base @ of Sector 8, 128 Kbytes
52-
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) // Base @ of Sector 9, 128 Kbytes
53-
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) // Base @ of Sector 10, 128 Kbytes
54-
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) // Base @ of Sector 11, 128 Kbytes
55-
56-
#define APP_CRC_WAS_CALCULATED_FLAG ((uint32_t)0xAAAAAAAA)
57-
#define APP_CRC_WAS_CALCULATED_FLAG_ADDRESS (uint32_t*)(APP_MAX_SIZE - 8)
58-
59-
#define VECTOR_TABLE_ADDRESS ((uint32_t *)ADDR_FLASH_SECTOR_0)
60-
#define VECTOR_TABLE_SIZE ((uint32_t)(ADDR_FLASH_SECTOR_1 - ADDR_FLASH_SECTOR_0))
61-
62-
#define APP_START_ADDRESS ((uint32_t *)(ADDR_FLASH_SECTOR_1 + EEPROM_EMULATION_SIZE))
63-
#define APP_SIZE ((uint32_t)(APP_MAX_SIZE - VECTOR_TABLE_SIZE - EEPROM_EMULATION_SIZE))
42+
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) // Base @ of Sector 0, 16 Kbytes
43+
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) // Base @ of Sector 1, 16 Kbytes
44+
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) // Base @ of Sector 2, 16 Kbytes
45+
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) // Base @ of Sector 3, 16 Kbytes
46+
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) // Base @ of Sector 4, 64 Kbytes
47+
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) // Base @ of Sector 5, 128 Kbytes
48+
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) // Base @ of Sector 6, 128 Kbytes
49+
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) // Base @ of Sector 7, 128 Kbytes
50+
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) // Base @ of Sector 8, 128 Kbytes
51+
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) // Base @ of Sector 9, 128 Kbytes
52+
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) // Base @ of Sector 10, 128 Kbytes
53+
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) // Base @ of Sector 11, 128 Kbytes
54+
55+
#define VECTOR_TABLE_ADDRESS ((uint32_t*)ADDR_FLASH_SECTOR_0)
56+
#define VECTOR_TABLE_SIZE ((uint32_t)(ADDR_FLASH_SECTOR_1 - ADDR_FLASH_SECTOR_0))
57+
#define EEPROM_EMULATION_SIZE ((uint32_t)(ADDR_FLASH_SECTOR_4 - ADDR_FLASH_SECTOR_2))
58+
59+
#define APP_START_ADDRESS ((uint32_t*)(ADDR_FLASH_SECTOR_3))
60+
#define APP_SIZE ((uint32_t)(APP_MAX_SIZE - VECTOR_TABLE_SIZE - EEPROM_EMULATION_SIZE))
61+
62+
#define APP_CRC_WAS_CALCULATED_FLAG ((uint32_t)0x00000000)
63+
#define APP_CRC_WAS_CALCULATED_FLAG_ADDRESS ((uint32_t*)(ADDR_FLASH_SECTOR_0 + APP_MAX_SIZE - 8))
64+
#define APP_CRC_ADDRESS ((uint32_t*)(ADDR_FLASH_SECTOR_0 + APP_MAX_SIZE - 4))
6465

6566
typedef struct {
6667
uint32_t crc_flag;
@@ -225,55 +226,53 @@ uint32_t flash_helper_verify_flash_memory(void) {
225226
uint32_t crc;
226227
// Look for a flag indicating that the CRC was previously computed.
227228
// If it is blank (0xFFFFFFFF), calculate and store the CRC.
228-
if( (APP_CRC_WAS_CALCULATED_FLAG_ADDRESS)[0] == APP_CRC_WAS_CALCULATED_FLAG )
229-
{
229+
if(APP_CRC_WAS_CALCULATED_FLAG_ADDRESS[0] == APP_CRC_WAS_CALCULATED_FLAG) {
230230
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
231231
crc32_reset();
232232

233233
// compute vector table (sector 0)
234-
crc32((VECTOR_TABLE_ADDRESS), (VECTOR_TABLE_SIZE)/4);
234+
crc32(VECTOR_TABLE_ADDRESS, (VECTOR_TABLE_SIZE) / 4);
235235

236236
// skip emulated EEPROM (sector 1 and 2)
237237

238238
// compute application code
239-
crc = crc32(APP_START_ADDRESS, (APP_SIZE)/4);
239+
crc = crc32(APP_START_ADDRESS, (APP_SIZE) / 4);
240240

241241
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, DISABLE);
242242

243243
// A CRC over the full image should return zero.
244-
return (crc == 0)? FAULT_CODE_NONE : FAULT_CODE_FLASH_CORRUPTION;
245-
}
246-
else {
244+
return (crc == 0) ? FAULT_CODE_NONE : FAULT_CODE_FLASH_CORRUPTION;
245+
} else {
247246
FLASH_Unlock();
248247
FLASH_ClearFlag(FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR |
249-
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
248+
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
250249

251-
//Write the flag to indicate CRC has been computed.
252-
uint16_t res = FLASH_ProgramWord((uint32_t)APP_CRC_WAS_CALCULATED_FLAG_ADDRESS, APP_CRC_WAS_CALCULATED_FLAG);
253-
if (res != FLASH_COMPLETE) {
254-
FLASH_Lock();
255-
return FAULT_CODE_FLASH_CORRUPTION;
256-
}
250+
// Write the flag to indicate CRC has been computed.
251+
uint16_t res = FLASH_ProgramWord((uint32_t)APP_CRC_WAS_CALCULATED_FLAG_ADDRESS, APP_CRC_WAS_CALCULATED_FLAG);
252+
if (res != FLASH_COMPLETE) {
253+
FLASH_Lock();
254+
return FAULT_CODE_FLASH_CORRUPTION;
255+
}
257256

258-
// Compute flash crc including the new flag
257+
// Compute flash crc including the new flag
259258
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
260259
crc32_reset();
261260

262261
// compute vector table (sector 0)
263-
crc32(VECTOR_TABLE_ADDRESS, (VECTOR_TABLE_SIZE)/4);
262+
crc32(VECTOR_TABLE_ADDRESS, (VECTOR_TABLE_SIZE) / 4);
264263

265264
// skip emulated EEPROM (sector 1 and 2)
266265

267266
// compute application code
268-
crc = crc32(APP_START_ADDRESS, (APP_SIZE - 4)/4);
267+
crc = crc32(APP_START_ADDRESS, (APP_SIZE - 4) / 4);
269268

270269
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, DISABLE);
271270

272271
//Store CRC
273-
res = FLASH_ProgramWord(APP_MAX_SIZE - 4, crc);
272+
res = FLASH_ProgramWord((uint32_t)APP_CRC_ADDRESS, crc);
274273
if (res != FLASH_COMPLETE) {
275274
FLASH_Lock();
276-
return FAULT_CODE_FLASH_CORRUPTION;
275+
return FAULT_CODE_FLASH_CORRUPTION;
277276
}
278277
FLASH_Lock();
279278

@@ -285,29 +284,33 @@ uint32_t flash_helper_verify_flash_memory(void) {
285284

286285
uint32_t flash_helper_verify_flash_memory_chunk(void) {
287286
static uint32_t index = 0;
288-
const uint32_t chunk_size = 8192;
287+
uint32_t chunk_size = 1024;
289288
uint32_t res = FAULT_CODE_NONE;
290289
uint32_t crc = 0;
290+
uint32_t tot_bytes = VECTOR_TABLE_SIZE + APP_SIZE;
291291

292292
// Make sure RCC_AHB1Periph_CRC is enabled
293293
if (index == 0) {
294294
crc32_reset();
295295
}
296296

297-
if (index < VECTOR_TABLE_SIZE) {
298-
crc32((VECTOR_TABLE_ADDRESS + index), chunk_size/4);
297+
if ((index + chunk_size) >= tot_bytes) {
298+
chunk_size = tot_bytes - index;
299299
}
300-
else {
301-
crc = crc32((uint32_t*)((uint32_t)APP_START_ADDRESS + index - VECTOR_TABLE_SIZE), chunk_size/4);
300+
301+
if (index < VECTOR_TABLE_SIZE) {
302+
crc32(VECTOR_TABLE_ADDRESS + index / 4, chunk_size / 4);
303+
} else {
304+
crc = crc32(APP_START_ADDRESS + (index - VECTOR_TABLE_SIZE) / 4, chunk_size / 4);
302305
}
303306

304307
index += chunk_size;
305-
if (index >= (VECTOR_TABLE_SIZE + APP_SIZE)) {
308+
if (index >= tot_bytes) {
306309
index = 0;
307310
if (crc != 0) {
308311
res = FAULT_CODE_FLASH_CORRUPTION;
309312
}
310313
}
314+
311315
return res;
312316
}
313-

ld_eeprom_emu.ld

+3-3
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,8 @@
2626
MEMORY
2727
{
2828
flash : org = 0x08000000, len = 16k
29-
flash2 : org = 0x0800C000, len = 393216 - 8 /* NEW_APP_MAX_SIZE - CRC_INFO */
30-
crcinfo : org = 0x0805FFF8, len = 8 /* CRC info*/
29+
flash2 : org = 0x0800C000, len = 393216 - 16 /* NEW_APP_MAX_SIZE - CRC_INFO */
30+
crcinfo : org = 0x0805FFF0, len = 8 /* CRC info */
3131
ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
3232
ram1 : org = 0x20000000, len = 112k /* SRAM1 */
3333
ram2 : org = 0x2001C000, len = 16k /* SRAM2 */
@@ -146,7 +146,7 @@ SECTIONS
146146
_etext = .;
147147
_textdata = _etext;
148148

149-
_crcinfo_start_address = 0x0805FFF8;
149+
_crcinfo_start_address = 0x0805FFF0;
150150

151151
.crcinfo _crcinfo_start_address :
152152
{

main.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -75,20 +75,20 @@
7575
// Private variables
7676
static THD_WORKING_AREA(periodic_thread_wa, 1024);
7777
static THD_WORKING_AREA(timer_thread_wa, 128);
78-
static THD_WORKING_AREA(flash_integrity_check_thread_wa, 1024);
78+
static THD_WORKING_AREA(flash_integrity_check_thread_wa, 256);
7979

8080
static THD_FUNCTION(flash_integrity_check_thread, arg) {
8181
(void)arg;
8282

83-
chRegSetThreadName("Flash integrity check");
83+
chRegSetThreadName("Flash check");
8484
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
8585

8686
for(;;) {
8787
if (flash_helper_verify_flash_memory_chunk() == FAULT_CODE_FLASH_CORRUPTION) {
8888
NVIC_SystemReset();
8989
}
9090

91-
chThdSleepMilliseconds(50);
91+
chThdSleepMilliseconds(6);
9292
}
9393
}
9494

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