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Merge pull request vedderb#399 from Jfriesen222/dev_fw_5_03
Some work for new stormcore hardware prototypes
2 parents 988c68b + 53f6186 commit 37ac4ff

6 files changed

+64
-18
lines changed

build_all/rebuild_all

+40
Original file line numberDiff line numberDiff line change
@@ -418,6 +418,26 @@ make -j12 build_args='-DDISABLE_HW_LIMITS -DHW_SOURCE=\"hw_stormcore_60d.c\" -DH
418418
cd $DIR
419419
cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_default_no_hw_limits.bin
420420

421+
#################### STORMCORE_60Dxs ########################
422+
423+
COPYDIR=STORMCORE_60Dxs
424+
mkdir -p $COPYDIR
425+
rm -f $COPYDIR/*
426+
427+
# default
428+
cd $FWPATH
429+
touch conf_general.h
430+
make -j12 build_args='-DHW_SOURCE=\"hw_stormcore_60d.c\" -DHW_HEADER=\"hw_stormcore_60d.h\" -DHW_VER_IS_60D_XS' USE_VERBOSE_COMPILE=no
431+
cd $DIR
432+
cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_default.bin
433+
434+
# default with HW limits disabled
435+
cd $FWPATH
436+
touch conf_general.h
437+
make -j12 build_args='-DDISABLE_HW_LIMITS -DHW_SOURCE=\"hw_stormcore_60d.c\" -DHW_HEADER=\"hw_stormcore_60d.h\" -DHW_VER_IS_60D_XS' USE_VERBOSE_COMPILE=no
438+
cd $DIR
439+
cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_default_no_hw_limits.bin
440+
421441
#################### STORMCORE_60D+ ########################
422442

423443
COPYDIR='STORMCORE_60D+'
@@ -478,6 +498,26 @@ make -j12 build_args='-DDISABLE_HW_LIMITS -DHW_SOURCE=\"hw_stormcore_100d.c\" -D
478498
cd $DIR
479499
cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_default_no_hw_limits.bin
480500

501+
#################### STORMCORE_100DX ########################
502+
503+
COPYDIR=STORMCORE_100DX
504+
mkdir -p $COPYDIR
505+
rm -f $COPYDIR/*
506+
507+
# default
508+
cd $FWPATH
509+
touch conf_general.h
510+
make -j12 build_args='-DHW_SOURCE=\"hw_stormcore_100d.c\" -DHW_HEADER=\"hw_stormcore_100d.h\" -DHW_VER_IS_100DX' USE_VERBOSE_COMPILE=no
511+
cd $DIR
512+
cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_default.bin
513+
514+
# default with HW limits disabled
515+
cd $FWPATH
516+
touch conf_general.h
517+
make -j12 build_args='-DDISABLE_HW_LIMITS -DHW_SOURCE=\"hw_stormcore_100d.c\" -DHW_HEADER=\"hw_stormcore_100d.h\" -DHW_VER_IS_100DX' USE_VERBOSE_COMPILE=no
518+
cd $DIR
519+
cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_default_no_hw_limits.bin
520+
481521
#################### STORMCORE_100S ########################
482522

483523
COPYDIR=STORMCORE_100S

conf_general.h

+2
Original file line numberDiff line numberDiff line change
@@ -148,10 +148,12 @@
148148

149149
//#define HW_DUAL_CONFIG_PARALLEL
150150
//#define HW_VER_IS_100D_V2
151+
//#define HW_VER_IS_100DX
151152
//#define HW_SOURCE "hw_stormcore_100d.c"
152153
//#define HW_HEADER "hw_stormcore_100d.h"
153154

154155
//#define HW_VER_IS_60D_PLUS
156+
//#define HW_VER_IS_60D_XS
155157
//#define HW_SOURCE "hw_stormcore_60d.c"
156158
//#define HW_HEADER "hw_stormcore_60d.h"
157159

hwconf/hw_stormcore_100d.c

+7-3
Original file line numberDiff line numberDiff line change
@@ -18,13 +18,16 @@
1818
#include "ch.h"
1919
#include "hal.h"
2020
#include "stm32f4xx_conf.h"
21-
#include "drv8323s.h"
2221
#include "comm_can.h"
2322
#include "mc_interface.h"
2423
#include "ledpwm.h"
2524
#include "utils.h"
2625
#include "main.h"
2726

27+
#ifndef HW_VER_IS_100DX
28+
#include "drv8323s.h"
29+
#endif
30+
2831
typedef enum {
2932
SWITCH_BOOTED = 0,
3033
SWITCH_TURN_ON_DELAY_ACTIVE,
@@ -61,7 +64,7 @@ void hw_init_gpio(void) {
6164
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
6265
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
6366

64-
#ifdef HW_VER_IS_100D_V2
67+
#if defined(HW_VER_IS_100D_V2) || defined(HW_VER_IS_100DX)
6568
palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN,
6669
PAL_MODE_OUTPUT_PUSHPULL |
6770
PAL_STM32_OSPEED_HIGHEST);
@@ -181,8 +184,9 @@ void hw_init_gpio(void) {
181184
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
182185
palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
183186
ENABLE_GATE();
184-
187+
#ifndef HW_VER_IS_100DX
185188
drv8323s_init();
189+
#endif
186190
}
187191

188192
void hw_setup_adc_channels(void) {

hwconf/hw_stormcore_100d.h

+11-7
Original file line numberDiff line numberDiff line change
@@ -27,23 +27,27 @@
2727
#define HW_NAME "STORMCORE_100D_PARALLEL"
2828
#elif defined(HW_VER_IS_100D_V2)
2929
#define HW_NAME "STORMCORE_100D_V2"
30+
#elif defined(HW_VER_IS_100DX)
31+
#define HW_NAME "STORMCORE_100DX"
32+
#define INVERTED_SHUNT_POLARITY
33+
#define HW_DEAD_TIME_NSEC 600.0 // Dead time
3034
#else
3135
#define HW_NAME "STORMCORE_100D"
3236
#endif
3337

38+
#ifndef HW_VER_IS_100DX
3439
#include "drv8323s.h"
35-
3640
// HW properties
3741
#define HW_HAS_DRV8323S // for idrive do 0x073b for reg 4 (LS) and 0x034b for reg 3 (HS)
38-
#define HW_HAS_3_SHUNTS
39-
4042
#define DRV8323S_CUSTOM_SETTINGS(); drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN); \
4143
drv8323s_write_reg(3,0x3af); \
4244
drv8323s_write_reg(4,0x7af);
45+
#endif
46+
#define HW_HAS_3_SHUNTS
47+
4348

4449

4550

46-
//#define HW_DEAD_TIME_NSEC 360.0 // Dead time
4751

4852
//Switch Pins
4953
#define HW_HAS_STORMCORE_SWITCH
@@ -71,7 +75,7 @@
7175

7276
#define SMART_SWITCH_MSECS_PRESSED_OFF 2000
7377

74-
#ifdef HW_VER_IS_100D_V2
78+
#if defined(HW_VER_IS_100D_V2) || defined(HW_VER_IS_100DX)
7579
#define HW_HAS_PHASE_FILTERS
7680
#define PHASE_FILTER_GPIO GPIOE
7781
#define PHASE_FILTER_PIN 4
@@ -253,7 +257,7 @@
253257
#endif
254258

255259

256-
#ifdef HW_VER_IS_100D_V2
260+
#if defined(HW_VER_IS_100D_V2) || defined(HW_VER_IS_100DX)
257261
#ifndef CURRENT_AMP_GAIN
258262
#define CURRENT_AMP_GAIN 20.0
259263
#endif
@@ -371,7 +375,7 @@
371375
#define NRF_PIN_MISO 10
372376

373377
// NRF SWD
374-
#ifdef HW_VER_IS_100D_V2
378+
#if defined(HW_VER_IS_100D_V2) || defined(HW_VER_IS_100DX)
375379
#define NRF5x_SWDIO_GPIO GPIOD
376380
#define NRF5x_SWDIO_PIN 9
377381
#define NRF5x_SWCLK_GPIO GPIOD

hwconf/hw_stormcore_60d.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -574,8 +574,10 @@ void smart_switch_pin_init(void) {
574574
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
575575
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
576576
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
577-
578577
palSetPadMode(SWITCH_IN_GPIO, SWITCH_IN_PIN, PAL_MODE_INPUT_PULLDOWN);
578+
#if defined (HW_VER_IS_60D_XS)
579+
palSetPadMode(SWITCH_IN_GPIO, SWITCH_IN_PIN, PAL_MODE_INPUT);
580+
#endif
579581
palSetPadMode(SWITCH_OUT_GPIO,SWITCH_OUT_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
580582
palSetPadMode(SWITCH_LED_1_GPIO,SWITCH_LED_1_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
581583
palSetPadMode(SWITCH_LED_2_GPIO,SWITCH_LED_2_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);

hwconf/hw_stormcore_60d.h

+1-7
Original file line numberDiff line numberDiff line change
@@ -124,17 +124,11 @@
124124

125125

126126
// SPI for DRV8301
127-
#ifdef HW_VER_IS_60D_XS
128-
#define DRV8323S_MOSI_GPIO GPIOC
129-
#define DRV8323S_MOSI_PIN 11
130-
#define DRV8323S_MISO_GPIO GPIOC
131-
#define DRV8323S_MISO_PIN 12
132-
#else
133127
#define DRV8323S_MOSI_GPIO GPIOC
134128
#define DRV8323S_MOSI_PIN 12
135129
#define DRV8323S_MISO_GPIO GPIOC
136130
#define DRV8323S_MISO_PIN 11
137-
#endif
131+
138132
#define DRV8323S_SCK_GPIO GPIOC
139133
#define DRV8323S_SCK_PIN 10
140134
#define DRV8323S_CS_GPIO GPIOC

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