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Commit 3acbfff

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ShackmeisterShackmeister
committed
added custom HW file, support for ID pins, and fixed circular include
1 parent 80b5e70 commit 3acbfff

13 files changed

+561
-8
lines changed

‎conf_general.h

+3
Original file line numberDiff line numberDiff line change
@@ -140,6 +140,9 @@
140140
//#define HW_SOURCE "hw_unity.c"
141141
//#define HW_HEADER "hw_unity.h"
142142

143+
#define HW_SOURCE "hw_uxv_sr.c"
144+
#define HW_HEADER "hw_uxv_sr.h"
145+
143146
//#define HW_DUAL_CONFIG_PARALLEL
144147
//#define HW_SOURCE "hw_stormcore_100d.c"
145148
//#define HW_HEADER "hw_stormcore_100d.h"

‎hwconf/drv8301.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
along with this program. If not, see <http://www.gnu.org/licenses/>.
1818
*/
1919

20-
#include "hw.h"
20+
#include "conf_general.h"
2121
#ifdef HW_HAS_DRV8301
2222

2323
#include "drv8301.h"

‎hwconf/drv8305.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
along with this program. If not, see <http://www.gnu.org/licenses/>.
1818
*/
1919

20-
#include "hw.h"
20+
#include "conf_general.h"
2121
#ifdef HW_HAS_DRV8305
2222

2323
#include "drv8305.h"

‎hwconf/drv8320s.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
along with this program. If not, see <http://www.gnu.org/licenses/>.
1818
*/
1919

20-
#include "hw.h"
20+
#include "conf_general.h"
2121
#ifdef HW_HAS_DRV8320S
2222

2323
#include "drv8320s.h"

‎hwconf/drv8323s.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
along with this program. If not, see <http://www.gnu.org/licenses/>.
1818
*/
1919

20-
#include "hw.h"
20+
#include "conf_general.h"
2121
#ifdef HW_HAS_DRV8323S
2222

2323
#include "drv8323s.h"

‎hwconf/hw.c

+54
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,62 @@
1919

2020
#include "conf_general.h"
2121
#include "utils.h"
22+
#include <math.h>
2223
#include HW_SOURCE
2324

2425
uint8_t hw_id_from_uuid(void) {
2526
return utils_crc32c(STM32_UUID_8, 12) & 0x7F;
2627
}
28+
29+
#if defined(HW_ID_PIN_GPIOS) && defined(HW_ID_PIN_PINS)
30+
uint8_t hw_id_from_pins(void) {
31+
stm32_gpio_t *hw_id_ports[]={HW_ID_PIN_GPIOS};
32+
const uint16_t hw_id_pins[] = {HW_ID_PIN_PINS};
33+
const uint16_t hw_id_pins_size = sizeof(hw_id_pins)/sizeof(uint16_t);
34+
35+
const uint16_t DELAY_MS = 5;
36+
uint8_t trits[hw_id_pins_size];
37+
uint8_t id = 1u; //Start at 1
38+
for (uint8_t i=0; i<hw_id_pins_size; i++)
39+
{
40+
//Initialize pulldown
41+
palSetPadMode(hw_id_ports[i], hw_id_pins[i], PAL_MODE_INPUT_PULLDOWN);
42+
43+
//Delay a little for the resistor to take affect
44+
chThdSleepMilliseconds(DELAY_MS);
45+
bool pin_set_pulldown = (palReadPad(hw_id_ports[i], hw_id_pins[i]));
46+
//Initialize pullup
47+
palSetPadMode(hw_id_ports[i], hw_id_pins[i], PAL_MODE_INPUT_PULLUP);
48+
//Delay a little for the resistor to take affect
49+
chThdSleepMilliseconds(DELAY_MS);
50+
bool pin_set_pullup = (palReadPad(hw_id_ports[i], hw_id_pins[i]));
51+
//Now determine the trit state
52+
if (!pin_set_pulldown && !pin_set_pullup)
53+
{
54+
//Tied to GND
55+
trits[i] = 1u;
56+
57+
}
58+
else if (pin_set_pulldown && pin_set_pullup)
59+
{
60+
//Tied to VCC
61+
trits[i] = 2u;
62+
}
63+
else if (!pin_set_pulldown && pin_set_pullup)
64+
{
65+
//Floating
66+
trits[i] = 0u;
67+
}
68+
else
69+
{
70+
return hw_id_from_uuid();
71+
//To satisfy compiler warning
72+
trits[i] = 3u;
73+
}
74+
id += trits[i] * pow(3, i);
75+
palSetPadMode(hw_id_ports[i], hw_id_pins[i], PAL_MODE_INPUT);
76+
}
77+
78+
return id;
79+
}
80+
#endif //defined(HW_ID_PIN_GPIOS) && defined(HW_ID_PIN_PINS)

‎hwconf/hw.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@
2020
#ifndef HW_H_
2121
#define HW_H_
2222

23-
#include "conf_general.h"
2423
#include "stm32f4xx_conf.h"
2524

2625
#include HW_HEADER
@@ -460,5 +459,6 @@ void hw_start_i2c(void);
460459
void hw_stop_i2c(void);
461460
void hw_try_restore_i2c(void);
462461
uint8_t hw_id_from_uuid(void);
462+
uint8_t hw_id_from_pins(void);
463463

464464
#endif /* HW_H_ */

‎hwconf/hw_uxv_sr.c

+245
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,245 @@
1+
/*
2+
Copyright 2019 Benjamin Vedder [email protected]
3+
4+
This program is free software: you can redistribute it and/or modify
5+
it under the terms of the GNU General Public License as published by
6+
the Free Software Foundation, either version 3 of the License, or
7+
(at your option) any later version.
8+
9+
This program is distributed in the hope that it will be useful,
10+
but WITHOUT ANY WARRANTY; without even the implied warranty of
11+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+
GNU General Public License for more details.
13+
14+
You should have received a copy of the GNU General Public License
15+
along with this program. If not, see <http://www.gnu.org/licenses/>.
16+
*/
17+
18+
#include "hw.h"
19+
20+
#include "ch.h"
21+
#include "hal.h"
22+
#include "stm32f4xx_conf.h"
23+
#include "utils.h"
24+
#include "drv8323s.h"
25+
26+
// Variables
27+
static volatile bool i2c_running = false;
28+
29+
// I2C configuration
30+
static const I2CConfig i2cfg = {
31+
OPMODE_I2C,
32+
100000,
33+
STD_DUTY_CYCLE
34+
};
35+
36+
void hw_init_gpio(void) {
37+
// GPIO clock enable
38+
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
39+
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
40+
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
41+
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
42+
43+
// LEDs
44+
palSetPadMode(GPIOB, 0,
45+
PAL_MODE_OUTPUT_PUSHPULL |
46+
PAL_STM32_OSPEED_HIGHEST);
47+
palSetPadMode(GPIOB, 1,
48+
PAL_MODE_OUTPUT_PUSHPULL |
49+
PAL_STM32_OSPEED_HIGHEST);
50+
51+
// ENABLE_GATE
52+
palSetPadMode(GPIOB, 5,
53+
PAL_MODE_OUTPUT_PUSHPULL |
54+
PAL_STM32_OSPEED_HIGHEST);
55+
56+
// Disable BMI160
57+
palSetPadMode(GPIOA, 15,
58+
PAL_MODE_OUTPUT_PUSHPULL |
59+
PAL_STM32_OSPEED_HIGHEST);
60+
palSetPad(GPIOA, 15);
61+
62+
// Disable DCCAL
63+
palSetPadMode(GPIOD, 2,
64+
PAL_MODE_OUTPUT_PUSHPULL |
65+
PAL_STM32_OSPEED_HIGHEST);
66+
palClearPad(GPIOD, 2);
67+
68+
ENABLE_GATE();
69+
70+
// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
71+
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
72+
PAL_STM32_OSPEED_HIGHEST |
73+
PAL_STM32_PUDR_FLOATING);
74+
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
75+
PAL_STM32_OSPEED_HIGHEST |
76+
PAL_STM32_PUDR_FLOATING);
77+
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
78+
PAL_STM32_OSPEED_HIGHEST |
79+
PAL_STM32_PUDR_FLOATING);
80+
81+
palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
82+
PAL_STM32_OSPEED_HIGHEST |
83+
PAL_STM32_PUDR_FLOATING);
84+
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
85+
PAL_STM32_OSPEED_HIGHEST |
86+
PAL_STM32_PUDR_FLOATING);
87+
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
88+
PAL_STM32_OSPEED_HIGHEST |
89+
PAL_STM32_PUDR_FLOATING);
90+
91+
// Hall sensors
92+
palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
93+
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
94+
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
95+
96+
// Fault pin
97+
palSetPadMode(GPIOB, 7, PAL_MODE_INPUT_PULLUP);
98+
99+
// ADC Pins
100+
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
101+
palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
102+
palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
103+
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
104+
palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
105+
palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
106+
107+
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
108+
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
109+
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
110+
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
111+
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
112+
palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
113+
114+
drv8323s_init();
115+
}
116+
117+
118+
119+
void hw_setup_adc_channels(void) {
120+
// ADC1 regular channels
121+
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles);
122+
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
123+
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles);
124+
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles);
125+
ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles);
126+
127+
// ADC2 regular channels
128+
ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);
129+
ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
130+
ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles);
131+
ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles);
132+
ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles);
133+
134+
// ADC3 regular channels
135+
ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
136+
ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
137+
ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles);
138+
ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles);
139+
ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles);
140+
141+
// Injected channels
142+
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles);
143+
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles);
144+
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles);
145+
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
146+
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
147+
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
148+
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles);
149+
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles);
150+
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles);
151+
}
152+
153+
void hw_start_i2c(void) {
154+
i2cAcquireBus(&HW_I2C_DEV);
155+
156+
if (!i2c_running) {
157+
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
158+
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
159+
PAL_STM32_OTYPE_OPENDRAIN |
160+
PAL_STM32_OSPEED_MID1 |
161+
PAL_STM32_PUDR_PULLUP);
162+
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
163+
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
164+
PAL_STM32_OTYPE_OPENDRAIN |
165+
PAL_STM32_OSPEED_MID1 |
166+
PAL_STM32_PUDR_PULLUP);
167+
168+
i2cStart(&HW_I2C_DEV, &i2cfg);
169+
i2c_running = true;
170+
}
171+
172+
i2cReleaseBus(&HW_I2C_DEV);
173+
}
174+
175+
void hw_stop_i2c(void) {
176+
i2cAcquireBus(&HW_I2C_DEV);
177+
178+
if (i2c_running) {
179+
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
180+
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
181+
182+
i2cStop(&HW_I2C_DEV);
183+
i2c_running = false;
184+
185+
}
186+
187+
i2cReleaseBus(&HW_I2C_DEV);
188+
}
189+
190+
/**
191+
* Try to restore the i2c bus
192+
*/
193+
void hw_try_restore_i2c(void) {
194+
if (i2c_running) {
195+
i2cAcquireBus(&HW_I2C_DEV);
196+
197+
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
198+
PAL_STM32_OTYPE_OPENDRAIN |
199+
PAL_STM32_OSPEED_MID1 |
200+
PAL_STM32_PUDR_PULLUP);
201+
202+
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
203+
PAL_STM32_OTYPE_OPENDRAIN |
204+
PAL_STM32_OSPEED_MID1 |
205+
PAL_STM32_PUDR_PULLUP);
206+
207+
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
208+
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
209+
210+
chThdSleep(1);
211+
212+
for(int i = 0;i < 16;i++) {
213+
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
214+
chThdSleep(1);
215+
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
216+
chThdSleep(1);
217+
}
218+
219+
// Generate start then stop condition
220+
palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
221+
chThdSleep(1);
222+
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
223+
chThdSleep(1);
224+
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
225+
chThdSleep(1);
226+
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
227+
228+
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
229+
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
230+
PAL_STM32_OTYPE_OPENDRAIN |
231+
PAL_STM32_OSPEED_MID1 |
232+
PAL_STM32_PUDR_PULLUP);
233+
234+
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
235+
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
236+
PAL_STM32_OTYPE_OPENDRAIN |
237+
PAL_STM32_OSPEED_MID1 |
238+
PAL_STM32_PUDR_PULLUP);
239+
240+
HW_I2C_DEV.state = I2C_STOP;
241+
i2cStart(&HW_I2C_DEV, &i2cfg);
242+
243+
i2cReleaseBus(&HW_I2C_DEV);
244+
}
245+
}

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