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Updated ChibiOS to 3.0.5
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‎ChibiOS_3.0.5/ext/readme.txt

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All the code contained under ./ext is not part of the ChibiOS project and
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supplied as-is without any additional warranty by ChibiOS. For ownership and
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copyright statements see the license details inside the code.
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Some modules may contain changes from the ChibiOS team in order to increase
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compatibility or usability with ChibiOS itself.

‎ChibiOS_3.0.5/ext/stdperiph_stm32f4/inc/misc.h

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/**
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******************************************************************************
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* @file misc.h
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* @author MCD Application Team
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* @version V1.6.0
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* @date 10-July-2015
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* @brief This file contains all the functions prototypes for the miscellaneous
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* firmware library functions (add-on to CMSIS functions).
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MISC_H
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#define __MISC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx.h"
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup MISC
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief NVIC Init Structure definition
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*/
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typedef struct
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{
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uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
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This parameter can be an enumerator of @ref IRQn_Type
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enumeration (For the complete STM32 Devices IRQ Channels
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list, please refer to stm32f4xx.h file) */
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uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
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specified in NVIC_IRQChannel. This parameter can be a value
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between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
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A lower priority value indicates a higher priority */
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uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
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in NVIC_IRQChannel. This parameter can be a value
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between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
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A lower priority value indicates a higher priority */
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FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
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will be enabled or disabled.
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This parameter can be set either to ENABLE or DISABLE */
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} NVIC_InitTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup MISC_Exported_Constants
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* @{
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*/
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/** @defgroup MISC_Vector_Table_Base
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* @{
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*/
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#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
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#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
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#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
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((VECTTAB) == NVIC_VectTab_FLASH))
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/**
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* @}
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*/
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/** @defgroup MISC_System_Low_Power
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* @{
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*/
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#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
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#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
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#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
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#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
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((LP) == NVIC_LP_SLEEPDEEP) || \
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((LP) == NVIC_LP_SLEEPONEXIT))
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/**
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* @}
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*/
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/** @defgroup MISC_Preemption_Priority_Group
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* @{
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*/
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#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
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4 bits for subpriority */
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#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
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3 bits for subpriority */
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#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
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2 bits for subpriority */
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#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
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1 bits for subpriority */
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#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
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0 bits for subpriority */
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#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
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((GROUP) == NVIC_PriorityGroup_1) || \
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((GROUP) == NVIC_PriorityGroup_2) || \
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((GROUP) == NVIC_PriorityGroup_3) || \
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((GROUP) == NVIC_PriorityGroup_4))
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#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
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#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
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#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
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/**
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* @}
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*/
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/** @defgroup MISC_SysTick_clock_source
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* @{
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*/
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#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
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#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
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#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
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((SOURCE) == SysTick_CLKSource_HCLK_Div8))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
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void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
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void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
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void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
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void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MISC_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎ChibiOS_3.0.5/ext/stdperiph_stm32f4/inc/stm32f4_gpio_af.h

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#ifndef _STM32F4_GPIO_AF_H_
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#define _STM32F4_GPIO_AF_H_
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/**
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* @brief AF 0 selection
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*/
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#define GPIO_AF_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
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#define GPIO_AF_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
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#define GPIO_AF_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
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#define GPIO_AF_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
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#define GPIO_AF_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
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/**
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* @brief AF 1 selection
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*/
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#define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
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#define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
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/**
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* @brief AF 2 selection
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*/
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#define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
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#define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
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#define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
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/**
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* @brief AF 3 selection
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*/
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#define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
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#define GPIO_AF_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
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#define GPIO_AF_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
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#define GPIO_AF_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
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/**
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* @brief AF 4 selection
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*/
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#define GPIO_AF_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
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#define GPIO_AF_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
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#define GPIO_AF_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
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/**
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* @brief AF 5 selection
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*/
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#define GPIO_AF_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
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#define GPIO_AF_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
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/**
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* @brief AF 6 selection
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*/
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#define GPIO_AF_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
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/**
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* @brief AF 7 selection
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*/
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#define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
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#define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
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#define GPIO_AF_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
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#define GPIO_AF_I2S3ext ((uint8_t)0x07) /* I2S3ext Alternate Function mapping */
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/**
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* @brief AF 8 selection
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*/
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#define GPIO_AF_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
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#define GPIO_AF_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
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#define GPIO_AF_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
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/**
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* @brief AF 9 selection
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*/
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#define GPIO_AF_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
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#define GPIO_AF_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
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#define GPIO_AF_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
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#define GPIO_AF_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
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#define GPIO_AF_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
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/**
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* @brief AF 10 selection
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*/
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#define GPIO_AF_OTG_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */
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#define GPIO_AF_OTG_HS ((uint8_t)0xA) /* OTG_HS Alternate Function mapping */
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/**
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* @brief AF 11 selection
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*/
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#define GPIO_AF_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
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/**
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* @brief AF 12 selection
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*/
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#define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */
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#define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */
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#define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */
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/**
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* @brief AF 13 selection
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*/
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#define GPIO_AF_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
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/**
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* @brief AF 15 selection
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*/
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#define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
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#endif
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