From d556f00d0c5f7b08fced4ba34c0e95e755bbbc09 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 31 Mar 2025 15:31:57 +0200 Subject: [PATCH 1/5] mb/protectli/vault_ehl/devicetree.cb: Fix assertion in soc/pmutil MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The SoC code requires or GPE DW config values to be different. Assign the default values of PMC GPIO_CONF register as GPIO GPEs are not used on this platform. Fixes the assertion in soc/intel/elkhartalke/pmutil. TEST=Boot Protectli VP2420 to Ubuntu 24.04. Upstream-Status: https://review.coreboot.org/c/coreboot/+/87049 Change-Id: Ibf4a1f52bf970c27d0ca8dd1b1377d6a5e6477f9 Signed-off-by: Michał Żygowski --- src/mainboard/protectli/vault_ehl/devicetree.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mainboard/protectli/vault_ehl/devicetree.cb b/src/mainboard/protectli/vault_ehl/devicetree.cb index e71a9d72e7b..f1fa5e36f28 100644 --- a/src/mainboard/protectli/vault_ehl/devicetree.cb +++ b/src/mainboard/protectli/vault_ehl/devicetree.cb @@ -19,9 +19,9 @@ chip soc/intel/elkhartlake # route, i.e., if this route changes then the affected GPE # offset bits also need to be changed. This sets the PMC register # GPE_CFG fields. - #register "pmc_gpe0_dw1" = "PMC_GPE_SCC_63_32" - #register "pmc_gpe0_dw2" = "PMC_GPE_N_31_0" - #register "pmc_gpe0_dw3" = "PMC_GPE_SCC_31_0" + register "pmc_gpe0_dw0" = "PMC_GPP_A" + register "pmc_gpe0_dw1" = "PMC_GPP_R" + register "pmc_gpe0_dw2" = "PMC_GPD" register "tcc_offset" = "5" # TCC of 95C From 62676617de6ee561c76df493df5570507f1fb2b6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 31 Mar 2025 15:39:31 +0200 Subject: [PATCH 2/5] soc/intel/elkahrtalake/pmc,gpio: Fix PMC GPE GPIO routes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Based on the description of PMC GPIO_CONF register from EHL EDS Vol 2 Book 2 rev 2.3 R&DC #614109. Some of the groups had incorrect values or even defined non-existent GPIO groups. TEST=Boot Protectli VP2420 to Ubuntu 24.04. Upstream-Status: https://review.coreboot.org/c/coreboot/+/87050 Change-Id: I910f3c4c0d31b8d24b83cd2c3a28688b898b5d9f Signed-off-by: Michał Żygowski --- src/soc/intel/elkhartlake/gpio.c | 1 - src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h | 11 +++++------ src/soc/intel/elkhartlake/include/soc/pmc.h | 11 +++++------ 3 files changed, 10 insertions(+), 13 deletions(-) diff --git a/src/soc/intel/elkhartlake/gpio.c b/src/soc/intel/elkhartlake/gpio.c index 1b07bc5d276..795763ed00c 100644 --- a/src/soc/intel/elkhartlake/gpio.c +++ b/src/soc/intel/elkhartlake/gpio.c @@ -226,7 +226,6 @@ const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) { PMC_GPP_C, GPP_C }, { PMC_GPP_E, GPP_E }, { PMC_GPP_G, GPP_G }, - { PMC_GPP_S, GPP_S } }; *num = ARRAY_SIZE(routes); diff --git a/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h b/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h index 33fcb6bfb73..0aefe965209 100644 --- a/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h +++ b/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h @@ -10,19 +10,18 @@ */ #define GPP_B 0x0 #define GPP_T 0x1 -#define GPP_D 0x2 -#define GPP_A 0x3 -#define GPP_R 0x4 +#define GPP_A 0x2 +#define GPP_R 0x3 +#define GPD 0x4 #define GPP_V 0x5 -#define GPD 0x6 -#define GPP_H 0x7 +#define GPP_H 0x6 +#define GPP_D 0x7 #define GPP_U 0x8 #define VGPIO 0x9 #define GPP_F 0xA #define GPP_C 0xB #define GPP_E 0xC #define GPP_G 0xD -#define GPP_S 0xE #define GPIO_NUM_GROUPS 15 #define GPIO_MAX_NUM_PER_GROUP 32 diff --git a/src/soc/intel/elkhartlake/include/soc/pmc.h b/src/soc/intel/elkhartlake/include/soc/pmc.h index 1c8cb1a6744..a20d6fef9ad 100644 --- a/src/soc/intel/elkhartlake/include/soc/pmc.h +++ b/src/soc/intel/elkhartlake/include/soc/pmc.h @@ -105,19 +105,18 @@ #define PMC_GPP_B 0x0 #define PMC_GPP_T 0x1 -#define PMC_GPP_D 0x2 -#define PMC_GPP_A 0x3 -#define PMC_GPP_R 0x4 +#define PMC_GPP_A 0x2 +#define PMC_GPP_R 0x3 +#define PMC_GPD 0x4 #define PMC_GPP_V 0x5 -#define PMC_GPD 0x6 -#define PMC_GPP_H 0x7 +#define PMC_GPP_H 0x6 +#define PMC_GPP_D 0x7 #define PMC_GPP_U 0x8 #define PMC_VGPIO 0x9 #define PMC_GPP_F 0xA #define PMC_GPP_C 0xB #define PMC_GPP_E 0xC #define PMC_GPP_G 0xD -#define PMC_GPP_S 0xE #define GBLRST_CAUSE0 0x1924 #define GBLRST_CAUSE0_THERMTRIP (1 << 5) From 02bc0121953a6ee95fe1513624820244a99f3c39 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 31 Mar 2025 15:47:26 +0200 Subject: [PATCH 3/5] mainboard/protectli/vault_ehl/Kconfig: Configure TPM PIRQ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The board uses GPP_G19 as GPIO interrupt for SPI dTPM. The pad is already configured as APIC interrupt, so simply define the TPM_PIRQ to GPP_G19_IRQ, which is 0x6B for Elkhart Lake. TEST=Boot Ubuntu 24.04 and check dmesg that Linux does not complain on TPM interrupt not working. Check Windows Device Manager does not report any problem with TPM and its resources. Upstream-Status: https://review.coreboot.org/c/coreboot/+/87051 Change-Id: Ia23319680cff927f10b44d7a5d07928cc30dbc9d Signed-off-by: Michał Żygowski --- src/mainboard/protectli/vault_ehl/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/protectli/vault_ehl/Kconfig b/src/mainboard/protectli/vault_ehl/Kconfig index e5b0f669444..692d443536b 100644 --- a/src/mainboard/protectli/vault_ehl/Kconfig +++ b/src/mainboard/protectli/vault_ehl/Kconfig @@ -62,4 +62,7 @@ config EDK2_CPU_THROTTLING_THRESHOLD_DEFAULT endif +config TPM_PIRQ + default 0x6B # GPP_G19_IRQ + endif # BOARD_PROTECTLI_VP2420 From 594c02f1ed888d595e44391a73c2c6cc3d086d13 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 31 Mar 2025 15:50:00 +0200 Subject: [PATCH 4/5] mb/proteclti/vault_ehl/devicetree.cb: Remove TPM I/O resources MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Modern TPMs do not use legacy I/O access in favor of MMIO access. Discard the I/O resource, so it is not added to the ACPI _CRS. TEST=Boot Ubuntu 24.04 and check dmesg that Linux does not report problems with TPM. Check Windows Device Manager does not report any problem with TPM and its resources. Upstream-Status: https://review.coreboot.org/c/coreboot/+/87052 Change-Id: I0e504af6bc7268bc5ecce2e6642ed172ab682726 Signed-off-by: Michał Żygowski --- src/mainboard/protectli/vault_ehl/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/protectli/vault_ehl/devicetree.cb b/src/mainboard/protectli/vault_ehl/devicetree.cb index f1fa5e36f28..deb4ed1e43c 100644 --- a/src/mainboard/protectli/vault_ehl/devicetree.cb +++ b/src/mainboard/protectli/vault_ehl/devicetree.cb @@ -207,7 +207,7 @@ chip soc/intel/elkhartlake device pnp 2e.a off end # CIR end chip drivers/pc80/tpm - device pnp 0c31.0 on end + device pnp 0.0 on end end end device pci 1f.1 on end # P2SB From 916f07c573687c6b8c1ee7ff76c376395a9cfe53 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Mon, 31 Mar 2025 16:50:10 +0200 Subject: [PATCH 5/5] mainboard/protectli/vault_adl_n: Configure and lock TPM PIRQ GPIO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski --- src/mainboard/protectli/vault_adl_n/variants/vp2430/gpio.c | 4 ++-- src/mainboard/protectli/vault_adl_n/variants/vp32xx/gpio.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/protectli/vault_adl_n/variants/vp2430/gpio.c b/src/mainboard/protectli/vault_adl_n/variants/vp2430/gpio.c index b02b2c4a884..d14fd9e2b6d 100644 --- a/src/mainboard/protectli/vault_adl_n/variants/vp2430/gpio.c +++ b/src/mainboard/protectli/vault_adl_n/variants/vp2430/gpio.c @@ -732,8 +732,8 @@ static const struct pad_config gpio_table[] = { /* GPP_E12 - GPIO */ PAD_NC(GPP_E12, NONE), - /* GPP_E13 - GPIO */ - PAD_CFG_GPI_APIC_LOW(GPP_E13, NONE, PLTRST), + /* GPP_E13 - TPM_PIRQ */ + PAD_CFG_GPI_APIC_LOCK(GPP_E13, NONE, LEVEL, INVERT, LOCK_CONFIG), /* GPP_E14 - DDSP_HPDA */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), diff --git a/src/mainboard/protectli/vault_adl_n/variants/vp32xx/gpio.c b/src/mainboard/protectli/vault_adl_n/variants/vp32xx/gpio.c index f2b71091549..dd0564916fc 100644 --- a/src/mainboard/protectli/vault_adl_n/variants/vp32xx/gpio.c +++ b/src/mainboard/protectli/vault_adl_n/variants/vp32xx/gpio.c @@ -416,8 +416,8 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_E10, NONE), PAD_NC(GPP_E11, NONE), PAD_NC(GPP_E12, NONE), - /* GPP_E13 - GPIO */ - PAD_CFG_GPI_APIC_LOW(GPP_E13, NONE, PLTRST), + /* GPP_E13 - TPM_PIRQ */ + PAD_CFG_GPI_APIC_LOCK(GPP_E13, NONE, LEVEL, INVERT, LOCK_CONFIG), /* GPP_E14 - DDSP_HPDA */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), PAD_NC(GPP_E15, NONE),