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Merge tag 'v2025.01-rc5' into next
Prepare v2025.01-rc5
2 parents 2c366eb + 3391587 commit 5cfbf8c

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‎.gitlab-ci.yml

+5
Original file line numberDiff line numberDiff line change
@@ -669,3 +669,8 @@ nyan-big:
669669
variables:
670670
ROLE: nyan-big
671671
<<: *lab_dfn
672+
673+
rpi:
674+
variables:
675+
ROLE: rpi
676+
<<: *lab_dfn

‎Kconfig

+1
Original file line numberDiff line numberDiff line change
@@ -578,6 +578,7 @@ config STACK_SIZE
578578
hex "Define max stack size that can be used by U-Boot"
579579
default 0x4000000 if ARCH_VERSAL_NET || ARCH_VERSAL || ARCH_ZYNQMP
580580
default 0x200000 if MICROBLAZE
581+
default 0x4000 if ARCH_STM32
581582
default 0x1000000
582583
help
583584
Define Max stack size that can be used by U-Boot. This value is used

‎Makefile

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
VERSION = 2025
44
PATCHLEVEL = 01
55
SUBLEVEL =
6-
EXTRAVERSION = -rc4
6+
EXTRAVERSION = -rc5
77
NAME =
88

99
# *DOCUMENTATION*
@@ -21,7 +21,7 @@ include include/host_arch.h
2121
ifeq ("", "$(CROSS_COMPILE)")
2222
MK_ARCH="${shell uname -m}"
2323
else
24-
MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 's/^\(ccache\)\{0,1\}[[:space:]]*\([^\/]*\/\)*\([^-]*\)-[^[:space:]]*/\3/p'}"
24+
MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 's/^\(.*ccache\)\{0,1\}[[:space:]]*\([^\/]*\/\)*\([^-]*\)-[^[:space:]]*/\3/p'}"
2525
endif
2626
unexport HOST_ARCH
2727
ifeq ("x86_64", $(MK_ARCH))

‎arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi

+4
Original file line numberDiff line numberDiff line change
@@ -203,3 +203,7 @@
203203
&sysclk {
204204
bootph-all;
205205
};
206+
207+
&usb0 {
208+
dr_mode = "host";
209+
};

‎arch/arm/dts/r8a7790-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7790 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7790 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a7791-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7791 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7791 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a7792-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7792 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7792 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a7793-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7793 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7793 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a7794-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7794 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7794 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77951-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7795 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7795 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77960-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A7796 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A7796 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77965-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A77965 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A77965 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77970-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A77970 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A77970 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77980-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A77980 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A77980 SoC
44
*
55
* Copyright (C) 2019 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77990-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A77990 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A77990 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a77995-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar R8A77995 SoC
3+
* Device Tree Source extras for U-Boot on R-Car R8A77995 SoC
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/r8a779x-u-boot.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* Device Tree Source extras for U-Boot on RCar Gen3
3+
* Device Tree Source extras for U-Boot on R-Car Gen3
44
*
55
* Copyright (C) 2018 Marek Vasut <[email protected]>
66
*/

‎arch/arm/dts/stm32mp15-u-boot.dtsi

+3
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,9 @@
186186
bootph-all;
187187
#address-cells = <1>;
188188
#size-cells = <0>;
189+
clock-names = "hse", "hsi", "csi", "lse", "lsi";
190+
clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
191+
<&clk_lse>, <&clk_lsi>;
189192
};
190193

191194
&usart1 {

‎arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi

+4
Original file line numberDiff line numberDiff line change
@@ -112,6 +112,10 @@
112112
};
113113

114114
&rcc {
115+
clock-names = "hse", "hsi", "csi", "lse", "lsi";
116+
clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
117+
<&clk_lse>, <&clk_lsi>;
118+
115119
st,clksrc = <
116120
CLK_MPU_PLL1P
117121
CLK_AXI_PLL2P

‎arch/arm/mach-imx/imx8m/soc.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -362,7 +362,7 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
362362
* space below the 4G address boundary (which is 3GiB big),
363363
* even when the effective available memory is bigger.
364364
*/
365-
top_addr = clamp_val((u64)PHYS_SDRAM + gd->ram_size, 0, 0xffffffff);
365+
top_addr = clamp_val((u64)PHYS_SDRAM + gd->ram_size, 0, SZ_4G);
366366

367367
/*
368368
* rom_pointer[0] stores the TEE memory start address.

‎arch/arm/mach-renesas/Kconfig.32

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
11
if RCAR_32
22

33
config ARCH_RENESAS_BOARD_STRING
4-
string "Renesas RCar Gen2 board name"
4+
string "Renesas R-Car Gen2 board name"
55
default "Board"
66

77
config RCAR_GEN2
8-
bool "Renesas RCar Gen2"
8+
bool "Renesas R-Car Gen2"
99
select PHY
1010
select PHY_RCAR_GEN2
1111
select TMU_TIMER

‎arch/arm/mach-renesas/include/mach/boot0.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0 */
22
/*
3-
* Specialty padding for the RCar Gen2 SPL JTAG loading
3+
* Specialty padding for the R-Car Gen2 SPL JTAG loading
44
*/
55

66
#ifndef __BOOT0_H

‎arch/arm/mach-renesas/memmap-gen3.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0+
22
/*
3-
* Renesas RCar Gen3 memory map tables
3+
* Renesas R-Car Gen3 memory map tables
44
*
55
* Copyright (C) 2017 Marek Vasut <[email protected]>
66
*/

‎arch/arm/mach-stm32mp/stm32mp1/cpu.c

+6-1
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@ void dram_bank_mmu_setup(int bank)
5353
struct bd_info *bd = gd->bd;
5454
int i;
5555
phys_addr_t start;
56+
phys_addr_t addr;
5657
phys_size_t size;
5758
bool use_lmb = false;
5859
enum dcache_option option;
@@ -77,8 +78,12 @@ void dram_bank_mmu_setup(int bank)
7778
for (i = start >> MMU_SECTION_SHIFT;
7879
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
7980
i++) {
81+
addr = i << MMU_SECTION_SHIFT;
8082
option = DCACHE_DEFAULT_OPTION;
81-
if (use_lmb && lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP))
83+
if (use_lmb &&
84+
(lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) ||
85+
addr >= gd->ram_top)
86+
)
8287
option = 0; /* INVALID ENTRY in TLB */
8388
set_section_dcache(i, option);
8489
}

‎board/freescale/t208xqds/eth_t208xqds.c

+20-20
Original file line numberDiff line numberDiff line change
@@ -210,8 +210,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
210210
fdt_set_phy_handle(fdt, compat, addr,
211211
"phy_1gkx1");
212212
fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio1");
213-
sprintf(buf, "%s%s%s", buf, "lane-c,",
214-
(char *)lane_mode[0]);
213+
strcat(buf, "lane-c,");
214+
strcat(buf, (char *)lane_mode[0]);
215215
out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
216216
PCCR1_SGMIIH_KX_MASK);
217217
break;
@@ -222,8 +222,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
222222
fdt_set_phy_handle(fdt, compat, addr,
223223
"phy_1gkx2");
224224
fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio2");
225-
sprintf(buf, "%s%s%s", buf, "lane-d,",
226-
(char *)lane_mode[0]);
225+
strcat(buf, "lane-d,");
226+
strcat(buf, (char *)lane_mode[0]);
227227
out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
228228
PCCR1_SGMIIG_KX_MASK);
229229
break;
@@ -234,8 +234,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
234234
fdt_set_phy_handle(fdt, compat, addr,
235235
"phy_1gkx9");
236236
fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio9");
237-
sprintf(buf, "%s%s%s", buf, "lane-a,",
238-
(char *)lane_mode[0]);
237+
strcat(buf, "lane-a,");
238+
strcat(buf, (char *)lane_mode[0]);
239239
out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
240240
PCCR1_SGMIIE_KX_MASK);
241241
break;
@@ -247,8 +247,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
247247
"phy_1gkx10");
248248
fdt_status_okay_by_alias(fdt,
249249
"1gkx_pcs_mdio10");
250-
sprintf(buf, "%s%s%s", buf, "lane-b,",
251-
(char *)lane_mode[0]);
250+
strcat(buf, "lane-b,");
251+
strcat(buf, (char *)lane_mode[0]);
252252
out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
253253
PCCR1_SGMIIF_KX_MASK);
254254
break;
@@ -269,8 +269,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
269269
fdt_set_phy_handle(fdt, compat, addr,
270270
"phy_1gkx5");
271271
fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio5");
272-
sprintf(buf, "%s%s%s", buf, "lane-g,",
273-
(char *)lane_mode[0]);
272+
strcat(buf, "lane-g,");
273+
strcat(buf, (char *)lane_mode[0]);
274274
out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
275275
PCCR1_SGMIIC_KX_MASK);
276276
break;
@@ -281,8 +281,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
281281
fdt_set_phy_handle(fdt, compat, addr,
282282
"phy_1gkx6");
283283
fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio6");
284-
sprintf(buf, "%s%s%s", buf, "lane-h,",
285-
(char *)lane_mode[0]);
284+
strcat(buf, "lane-h,");
285+
strcat(buf, (char *)lane_mode[0]);
286286
out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
287287
PCCR1_SGMIID_KX_MASK);
288288
break;
@@ -328,8 +328,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
328328
fdt_set_phy_handle(fdt, compat, addr,
329329
"phy_xfi9");
330330
fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio9");
331-
sprintf(buf, "%s%s%s", buf, "lane-a,",
332-
(char *)lane_mode[1]);
331+
strcat(buf, "lane-a,");
332+
strcat(buf, (char *)lane_mode[1]);
333333
}
334334
break;
335335
case FM1_10GEC2:
@@ -339,8 +339,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
339339
fdt_set_phy_handle(fdt, compat, addr,
340340
"phy_xfi10");
341341
fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio10");
342-
sprintf(buf, "%s%s%s", buf, "lane-b,",
343-
(char *)lane_mode[1]);
342+
strcat(buf, "lane-b,");
343+
strcat(buf, (char *)lane_mode[1]);
344344
}
345345
break;
346346
case FM1_10GEC3:
@@ -350,8 +350,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
350350
fdt_set_phy_handle(fdt, compat, addr,
351351
"phy_xfi1");
352352
fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio1");
353-
sprintf(buf, "%s%s%s", buf, "lane-c,",
354-
(char *)lane_mode[1]);
353+
strcat(buf, "lane-c,");
354+
strcat(buf, (char *)lane_mode[1]);
355355
}
356356
break;
357357
case FM1_10GEC4:
@@ -361,8 +361,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
361361
fdt_set_phy_handle(fdt, compat, addr,
362362
"phy_xfi2");
363363
fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio2");
364-
sprintf(buf, "%s%s%s", buf, "lane-d,",
365-
(char *)lane_mode[1]);
364+
strcat(buf, "lane-d,");
365+
strcat(buf, (char *)lane_mode[1]);
366366
}
367367
break;
368368
default:

‎board/kontron/sl28/sl28.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,8 @@ int fsl_board_late_init(void)
156156
* If the watchdog isn't enabled at reset (which is a configuration
157157
* option) disabling it doesn't hurt either.
158158
*/
159-
if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART))
159+
if (IS_ENABLED(CONFIG_WDT_SL28CPLD) &&
160+
!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART))
160161
stop_recovery_watchdog();
161162

162163
return 0;

‎board/kontron/sl28/spl.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,10 @@ int board_fit_config_name_match(const char *name)
5050
return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var1");
5151
case 2:
5252
return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var2");
53+
case 3:
54+
return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var3");
5355
case 4:
5456
return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var4");
55-
case 3:
5657
default:
5758
return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28");
5859
}

‎board/raspberrypi/rpi/rpi.c

+17-1
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,19 @@ struct msg_get_clock_rate {
6868
u32 end_tag;
6969
};
7070

71+
struct efi_fw_image fw_images[] = {
72+
{
73+
.fw_name = u"RPI_UBOOT",
74+
.image_index = 1,
75+
},
76+
};
77+
78+
struct efi_capsule_update_info update_info = {
79+
.dfu_string = "mmc 0=u-boot.bin fat 0 1",
80+
.num_images = ARRAY_SIZE(fw_images),
81+
.images = fw_images,
82+
};
83+
7184
#ifdef CONFIG_ARM64
7285
#define DTB_DIR "broadcom/"
7386
#else
@@ -544,12 +557,15 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt)
544557
if (fdt == fw_fdt)
545558
return;
546559

547-
/* The firmware provides a more precie model; so copy that */
560+
/* The firmware provides a more precise model; so copy that */
548561
copy_property(fdt, fw_fdt, "/", "model");
549562

550563
/* memory reserve as suggested by the firmware */
551564
copy_property(fdt, fw_fdt, "/", "memreserve");
552565

566+
/* copy the CMA memory setting from the firmware DT to linux */
567+
copy_property(fdt, fw_fdt, "/reserved-memory/linux,cma", "size");
568+
553569
/* Adjust dma-ranges for the SD card and PCI bus as they can depend on
554570
* the SoC revision
555571
*/

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