Uart

[DuyenBui0]

/*

• File: newmain.c
• Author: Ngoc Nguyen
• Created on March 18, 2025, 10:30 PM
  */

// PIC18F4620 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1H
#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)

// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>
//#include <xc.h>
#include <stdint.h>
#include <stdio.h>
#define _XTAL_FREQ 20000000 // Th?ch anh 20MHz

volatile unsigned long millis_count = 0;

void __interrupt() ISR() {
if (TMR0IF) {
millis_count++; // M?i 1ms t?ng 1 ??n v?
TMR0L = 100; // Gi?tr? kh?i t?o
TMR0IF = 0; // X? c? ng?t
}
}

void millis_init() {
T0CON = 0b11000100; // 8-bit mode, Prescaler = 32
TMR0L = 100; // Gi?tr? kh?i t?o
TMR0IF = 0; // X? c? ng?t
TMR0IE = 1; // B?t ng?t Timer0
PEIE = 1; // Cho ph? ng?t ngo?i vi
GIE = 1; // Cho ph? ng?t to? c?c
}

unsigned long millis() {
unsigned long ms;
GIE = 0; // T?m th?i t?t ng?t ?? tr?h xung ??t khi ??c millis_count
ms = millis_count;
GIE = 1; // B?t l?i ng?t
return ms;
}

void adc_init() {
TRISAbits.RA0 = 1;
ADCON1 = 0x0E; // Ch? AN0 l?analog, c? ch? kh? l?digital
ADCON2 = 0xA9; // Right Justified, TAD = 8, Fosc/8
ADCON0 = 0x01; // B?t ADC, ch?n k?h AN0
}

uint16_t adc_read() {
ADCON0bits.GO = 1; // B?t ??u chuy?n ??i ADC
while (ADCON0bits.GO); // ??i ho? th?h
return (ADRESH << 😎 | ADRESL;
}
void io_init() {
TRISD = 0x00; // Ch? AN0 l?analog, c? ch? kh? l?digital
PORTD = 0x00; // Right Justified, TAD = 8, Fosc/8
//ADCON0 = 0x01; // B?t ADC, ch?n k?h AN0
}

void uart_init() {
TRISC6 = 0;
TRISC7 = 1;
PORTCbits.RC6=0;
TXSTA = 0x24; // B?t TX, 8-bit mode
RCSTA = 0x90; // B?t RX
SPBRG = 32; // Baudrate 9600 v?i Fosc = 20MHz
}

void uart_send_char(char c) {
while (!TXIF);
TXREG = c;
}

void uart_send_string(const char *s) {
while (*s) uart_send_char(*s++);
}

void main() {
io_init();
millis_init();
adc_init();
uart_init();

unsigned long last_time = millis();

while (1) {
    if (millis() - last_time >= 1000) {  // M?i 1 gi? ??c ADC v?g?i UART
        last_time = millis();
        
        uint16_t adc_value = adc_read();
        char buffer[10];
        sprintf(buffer, "%u\r\nHello", adc_value);
        uart_send_string(buffer);
    }

// PORTD = 0xff;
// __delay_ms(1000);
// PORTD = 0x00;
// __delay_ms(1000);
}
}