Fix instances of sim preamble

wordimont · wordimont · commit d6ba2dfb5cb5 · 2024-09-17T08:43:22.000-05:00
diff --git a/fpga/docs/usrp3/sim/writing_sim_makefile.md b/fpga/docs/usrp3/sim/writing_sim_makefile.md
@@ -23,7 +23,7 @@ template for your RFNoC block.
     $(error "UHD_FPGA_DIR is not set! Must point to UHD FPGA repository!")
     endif
     BASE_DIR = $(UHD_FPGA_DIR)/usrp3/top
-    # Include viv_sim_preample after defining BASE_DIR
+    # Include viv_sim_preamble after defining BASE_DIR
     include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
     #-------------------------------------------------
@@ -104,7 +104,7 @@ You will notice that the Makefile has 5 distinct sections.
     $(error "UHD_FPGA_DIR is not set! Must point to UHD FPGA repository!")
     endif
     BASE_DIR = $(UHD_FPGA_DIR)/usrp3/top
-    # Include viv_sim_preample after defining BASE_DIR
+    # Include viv_sim_preamble after defining BASE_DIR
     include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 Before declaring any variables or using any recipes, the following must be
diff --git a/fpga/usrp3/export/x300/radio/Makefile b/fpga/usrp3/export/x300/radio/Makefile
@@ -4,7 +4,7 @@
 
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_design_builder.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_addsub/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_duc/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_keep_one_in_n/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_keep_one_in_n/Makefile
@@ -8,7 +8,7 @@
 # Top-of-Makefile
 #-------------------------------------------------
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_license_check/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_license_check/Makefile
@@ -10,7 +10,7 @@
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
 LIB_DIR = ../../../../lib
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_logpwr/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_moving_avg/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_moving_avg/Makefile
@@ -10,7 +10,7 @@
 # Define BASE_DIR to point to the "top" dir. Note:
 # UHD_FPGA_DIR must be passed into this Makefile.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rx_frontend_gen3_tb/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rx_frontend_gen3_tb/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = $(abspath ../../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_split_stream/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_split_stream/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_switchboard/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_switchboard/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_vector_iir/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_window/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/sim/chdr_resize_tb/Makefile b/fpga/usrp3/lib/rfnoc/sim/chdr_resize_tb/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/rfnoc/sim/eth_ipv4_interface_tb/Makefile b/fpga/usrp3/lib/rfnoc/sim/eth_ipv4_interface_tb/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/sim/control/gearbox_2x1/Makefile b/fpga/usrp3/lib/sim/control/gearbox_2x1/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/sim/io_cap_gen/cat_io_lvds_dual_mode_tb/Makefile b/fpga/usrp3/lib/sim/io_cap_gen/cat_io_lvds_dual_mode_tb/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/lib/sim/packet_proc/chdr_dechunker/Makefile b/fpga/usrp3/lib/sim/packet_proc/chdr_dechunker/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../../../top)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/e31x/sim/dram_test/Makefile b/fpga/usrp3/top/e31x/sim/dram_test/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/e31x/sim/e310_io_tb/Makefile b/fpga/usrp3/top/e31x/sim/e310_io_tb/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/n3xx/sim/arm_to_sfp_loopback/Makefile b/fpga/usrp3/top/n3xx/sim/arm_to_sfp_loopback/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/n3xx/sim/aurora_loopback/Makefile b/fpga/usrp3/top/n3xx/sim/aurora_loopback/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/n3xx/sim/dram_fifo/Makefile b/fpga/usrp3/top/n3xx/sim/dram_fifo/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/n3xx/sim/dram_fifo_bist/Makefile b/fpga/usrp3/top/n3xx/sim/dram_fifo_bist/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/n3xx/sim/one_gig_eth_loopback/Makefile b/fpga/usrp3/top/n3xx/sim/one_gig_eth_loopback/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/n3xx/sim/ten_gig_eth_loopback/Makefile b/fpga/usrp3/top/n3xx/sim/ten_gig_eth_loopback/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x300/sim/aurora_loopback/Makefile b/fpga/usrp3/top/x300/sim/aurora_loopback/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x300/sim/dram_fifo/Makefile b/fpga/usrp3/top/x300/sim/dram_fifo/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x300/sim/dram_fifo_bist/Makefile b/fpga/usrp3/top/x300/sim/dram_fifo_bist/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x300/sim/x300_pcie_int/Makefile b/fpga/usrp3/top/x300/sim/x300_pcie_int/Makefile
@@ -7,7 +7,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir
 BASE_DIR = $(abspath ../../..)
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x400/dboards/fbx/sim/clock_en_control/Makefile b/fpga/usrp3/top/x400/dboards/fbx/sim/clock_en_control/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../..
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x400/dboards/fbx/sim/i2c_sync_ctrl/Makefile b/fpga/usrp3/top/x400/dboards/fbx/sim/i2c_sync_ctrl/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../../../..
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/fpga/usrp3/top/x400/rf/sim/Makefile b/fpga/usrp3/top/x400/rf/sim/Makefile
@@ -9,7 +9,7 @@
 #-------------------------------------------------
 # Define BASE_DIR to point to the "top" dir.
 BASE_DIR = ../../..
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/host/examples/rfnoc-gain/fpga/gain/rfnoc_block_gain/Makefile b/host/examples/rfnoc-gain/fpga/gain/rfnoc_block_gain/Makefile
@@ -16,7 +16,7 @@ ifndef UHD_FPGA_DIR
 $(error "UHD_FPGA_DIR is not set! Must point to UHD FPGA repository!")
 endif
 BASE_DIR = $(UHD_FPGA_DIR)/usrp3/top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
diff --git a/host/python/uhd/rfnoc_utils/templates/blocktool/Makefile.mako b/host/python/uhd/rfnoc_utils/templates/blocktool/Makefile.mako
@@ -13,7 +13,7 @@ ifndef UHD_FPGA_DIR
 $(error "UHD_FPGA_DIR is not set! Must point to UHD FPGA repository!")
 endif
 BASE_DIR = $(UHD_FPGA_DIR)/usrp3/top
-# Include viv_sim_preample after defining BASE_DIR
+# Include viv_sim_preamble after defining BASE_DIR
 include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
 
 #-------------------------------------------------
