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This repository has been archived by the owner on Aug 4, 2022. It is now read-only.
Per ERRATA.txt, pins 31 and 32 on U1 (STM32L011) should be shorted together to select the correct boot state. Tentatively, I've labeled this "bug", although I'm not sure what the implications of it are yet.
I suspect the best way to do this is with a pull down resistor. That is a little less "permanent" of a change, and permits easier bodge-wiring at a later date. Perhaps we can reuse a 47k 0603 -- or alternatively, kicad's "Jumper" if we want to save on soldering another part.
I took a brief look at the datasheet, section 3.4.4. It indicates that there are several pins which control boot mode, can anyone confirm this needs to take place?
The text was updated successfully, but these errors were encountered:
Doing a bit more reading on the STM32 boot modes. I now understand that PB9 is BOOT0, and nBOOT{0,1} and nBOOT_SEL are configuration bits.
I had to push some traces around a little to get the resistor to fit, but I don't think this is worth pushing yet -- I still don't understand enough about the STM32 to consider this ready. Is there any reason we would want BOOT0 to be logic high? Or would this be a recovery scenario, and a bodge wire is tolerable?
I'm going to make a separate issue with a documentation request for compiling and flashing the firmware -- I think this would help better understand what the board needs!
Also, since this seems to be a relatively minor change, are there any objections to including this in the rev2 hardware?
Per
ERRATA.txt
, pins 31 and 32 on U1 (STM32L011) should be shorted together to select the correct boot state. Tentatively, I've labeled this "bug", although I'm not sure what the implications of it are yet.I suspect the best way to do this is with a pull down resistor. That is a little less "permanent" of a change, and permits easier bodge-wiring at a later date. Perhaps we can reuse a 47k 0603 -- or alternatively, kicad's "Jumper" if we want to save on soldering another part.
I took a brief look at the datasheet, section 3.4.4. It indicates that there are several pins which control boot mode, can anyone confirm this needs to take place?
The text was updated successfully, but these errors were encountered: