Skip to content
This repository was archived by the owner on Sep 4, 2023. It is now read-only.

Commit 03d6f64

Browse files
committed
Update sys.
1 parent b15ccef commit 03d6f64

File tree

6 files changed

+463
-208
lines changed

6 files changed

+463
-208
lines changed

Genesis.qsf

+5-2
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,10 @@ set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION ALWAYS
3030
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
3131
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
3232
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE ON
33-
set_global_assignment -name QII_AUTO_PACKED_REGISTERS NORMAL
33+
set_global_assignment -name QII_AUTO_PACKED_REGISTERS "SPARSE AUTO"
3434
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
3535
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
36+
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
3637
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
3738
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
3839
set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
@@ -48,7 +49,9 @@ set_global_assignment -name ECO_OPTIMIZE_TIMING ON
4849
set_global_assignment -name PERIPHERY_TO_CORE_PLACEMENT_AND_ROUTING_OPTIMIZATION ON
4950
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
5051
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT LOW
51-
set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 2.0
52+
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF
53+
set_global_assignment -name ROUTER_REGISTER_DUPLICATION ON
54+
set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION ALWAYS
5255
set_global_assignment -name SEED 1
5356

5457
source sys/sys.tcl

Genesis.sv

+1-1
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ module emu
3030
input RESET,
3131

3232
//Must be passed to hps_io module
33-
inout [47:0] HPS_BUS,
33+
inout [48:0] HPS_BUS,
3434

3535
//Base video clock. Usually equals to CLK_SYS.
3636
output CLK_VIDEO,

0 commit comments

Comments
 (0)