corrected Eagle files

check change_log.txt

Author: ha7dcd

pcb/proxmark3_fix/BOT_layer_preview.png

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+13/11/2015 Change list from original PCB:
+
+Main problem: more then 800 DRC errors when runing that in Eagle. Check out the following changes to make a more reliable PCB. Those are minor cosmetic changes, but ease your life to avoid short circuit.
+
+1. Eagle Layout / DRC rules / Masks / Limit: from 0mil to 16mil, thus ordinary GND and signal vias which smaller then 16mil wont be open at solder stop mask layer.
+
+2. Eagle Layout / DRC rules / Masks / Stop MAX: from 2mil to 0, this way the solder stop mask wont overlap silkscreen drawings. Also as per PCB assembly houses, it's recommended, they set their own scaling for production.
+
+3. Exporting all the parts in the proxmark3 Eagle Layout into a library for minor silkscreen edition: proxmark3_components  merged.lbr
+	- Editing components footprint as was overlapping with top stop mask
+
+4. Adding top, bottom, in1, in2 layer markings in PCB layout for better manufacturing identification	
+
+5. Generating 4 layer CAM files

pcb/proxmark3_fix/CAD/change_log.txt

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+
+project: proxmark3-00
+
+    * please make 18 boards
+    * panelize 3x1 (for total 6 panels)
+    * 0.062" finished thickness
+    * FR-4
+    * solder mask top and bottom
+    * silkscreen legend top
+    * either 1 ounce or 0.5 ounce copper acceptable (1 ounce preferred)
+
+Layer stackup:
+
+Top layer: *.GTL
+Inner Layer 1: *.GL1 (for 4-layer board)
+Inner Layer 2: *.GL2 (for 4-layer board)
+Bottom layer: *.GBL
+Solder Stop Mask top: *.GTS
+Solder Stop Mask Bottom: *.GBS
+Silk Top: *.GTO
+Silk Bottom: *.GBO
+NC Drill: *.TXT
+Outline layer: *.GKO or *.DO
+
+Note:
+ All the gerber files in RS-274x format, except the drill file in Excellon format. 
+
+
+
+Ship to
+
+<my shipping address>
+
+<my email address>
+