Just wondering how to measure Clock Cycle.

[namu00]

Hello, thank you for providing this great simulator.

When I run below command to execute the GEMV benchmark,
(./sim --gtest_filter=PIMBenchFixture.gemv)
I’m not sure whether the reported cycles are based on
the PE clock (250–300 MHz) or the HBM2 clock (1–1.2 GHz).

Additionally, if the cycles are based on the DRAM clock,
I would like to know how the PE latency is internally translated and reflected.

(요약: GEMV 실행 시 측정 cycle이 PIM PE 클럭 기준인지 HBM2 클럭 기준인지 문의드립니다.)