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native voice memory: expose owner-scoped high-water accounting and shrink activation/session arenas #169

Description

@sydneyrenee

Problem

LfmModelMemoryV1 proves the immutable image and weight-copy invariants, but it does not describe the dominant activation and session allocations. A current one-conversation inventory at the production maximum found approximately 2.281 GiB outside the shared model image, including:

  • Conformer workspace: 802,212,288 bytes;
  • frontend workspace: 12,312,000 bytes;
  • capture-resampled PCM: 1,920,000 bytes;
  • mel/adapted rows: 2,304,000 bytes;
  • prefill workspace: approximately 5.0 MiB at eight lanes;
  • two Flashkern pass scratch banks: approximately 34.7 MiB, dominated by duplicate [32][128000] F32 attention score planes;
  • playback PCM: eight separately allocated 1,920-F32 slot payloads;
  • capture arena: page-rounded physical storage plus a second virtual alias.

All of this can be legal setup-time storage while still hiding an excessive high-water mark. Cache residency must not be inferred from allocation type: these are ordinary DRAM-backed virtual pages that happen to cache while hot.

Accounting first

Add owner-scoped, versioned native accounting for model, conversation, pass/ticket, and session storage. Report at least:

  • persistent recurrence bytes;
  • retained formula-derived bytes;
  • frontend, Conformer, prefill, Depthformer, sampler, and detokenizer workspace bytes;
  • per-pass scratch bytes and slot count;
  • capture physical bytes versus virtual alias bytes;
  • playback payload and metadata bytes;
  • tokenizer/control/event metadata bytes;
  • current and maximum live bytes;
  • allocation count before readiness;
  • post-readiness allocation attempts/bytes.

Accounting must be computed from actual plans/allocations, not hard-coded constants, and must define whether shared storage is charged once or apportioned.

High-water reduction

Use the accounting to drive a liveness plan:

  • recalculate Conformer planes from exact producer/last-consumer intervals;
  • reuse dead planes only when alias safety is proven at plan construction;
  • keep valid mel/Conformer output direct and avoid padded compatibility planes;
  • replace prefill and pass-bank vector collections with sealed byte arenas and typed offset views;
  • investigate eliminating or tiling the full-context F32 attention score plane without changing trained arithmetic;
  • keep ticket-private scratch whenever concurrent passes can still write;
  • slab-allocate playback payloads instead of one heap allocation per slot;
  • retain the macOS capture double-map as a virtual alias, counting physical bytes only once;
  • fuse the final detokenizer → band-limited device-rate output under native inference: remove residual C++ numerical fallbacks and materialized scratch #158 rather than retaining an avoidable full codec plane.

No reduction may depend on assumed L1/L2 residency, macOS affinity, unsafe cross-ticket aliasing, or a scalar fallback.

Verification

  • Freeze a baseline manifest for every supported configuration.
  • Assert planner high-water equals the sum of actual carved regions.
  • Use red-zone/canary and sanitizer tests for every alias boundary.
  • Compare full hidden/logit/code/state/PCM values before deleting old layouts.
  • Run two simultaneous conversations and both pass slots to prove private scratch remains private.
  • Record cold/warm RSS, virtual bytes, physical/accounted bytes, and allocation count.
  • Run the native real-checkpoint and audio-only self-conversation gate after each tranche.

Acceptance gates

  • Owner-scoped accounting covers every persistent numerical and dock allocation.
  • Shared and aliased storage is not double counted.
  • No activation or PCM payload uses an unreported heap allocation.
  • Conformer, prefill, pass, and playback layouts are sealed before readiness.
  • The measured high-water mark decreases without numerical or lifecycle regression.
  • No tensor object, per-pass allocation, weight materialization, scalar fallback, or compatibility implementation is introduced.
  • AArch64, x86_64/Rosetta, sanitizer, and real-checkpoint gates pass.

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