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flashkern sampler: move the complete top-k ladder into cooperative assembly #171

Description

@sydneyrenee

Problem

Production audio uses top-k 4, but the hot sampler still performs correctness-bearing numerical work in C++ inside flashkern_engine.cpp:

  • BF16/F32 conversion helpers: lines 151–161;
  • raw/scaled access: 1671–1683;
  • heap threshold construction with make_heap/pop_heap/push_heap: 1685–1699;
  • temperature scaling and maximum scans: 3322–3357;
  • lane folds, double target arithmetic, and std::nextafter termination: 3401–3467.

The SAMPLE_PHASE_* collective skeleton is sound, and sampler.S already supplies libm-free max, exponential-sum, prefix, and selection leaves. The program does not yet use assembly for the whole numerical ladder.

Required execution

  1. Shard candidate ranges across lanes.
  2. Compute exact top-k threshold with stable tie/index semantics.
  3. Apply temperature using the existing precision/order contract.
  4. Compute lane maxima.
  5. Final-return transition folds the bounded lane maxima.
  6. Compute masked exp/sums with the approved sampler polynomial.
  7. Fold the global sum and form one draw target.
  8. Compute lane prefix intervals.
  9. Resolve exactly one interval owner and token.
  10. Advance PRNG exactly once and preserve its serialized state.

C++ may route phases and publish bounded control state. It may not scan logits, build heaps, evaluate sampling arithmetic, or choose the numerical winner.

Faithfulness gates

Compare, for adversarial and real-checkpoint logits:

  • threshold value and selected top-k indices;
  • ties, signed zero, infinities, NaNs, and all-masked inputs;
  • scaled logits and lane maxima;
  • lane/global sums;
  • draw target and interval ownership;
  • chosen token;
  • PRNG state before/after;
  • greedy, temperature, top-k 1/4/N, and vocabulary tails.

The gate must detect wrong intermediate values even when the same token wins.

Architecture requirements

  • AArch64 and x86_64 paired assembly.
  • No libm, heap, allocation, scalar fallback, or C++ numerical helper in the pass path.
  • No change to ticket, phase, PRNG-consumption, or deterministic-order semantics.
  • Registers hold per-tile work; only compact cross-lane partials materialize at true collective boundaries.
  • Unsupported ISA fails at readiness.

Acceptance

  • No production sampler heap or numerical scan remains in C++.
  • Every sampling mode matches the frozen full-value trace.
  • Fixed-seed text/audio codes and PRNG state match across consecutive turns.
  • AArch64 and x86_64/Rosetta pass.
  • Real-checkpoint speech and audio-only conversation gates pass.
  • No post-readiness allocation or materialization counter moves.

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