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lines changed Original file line number Diff line number Diff line change @@ -1163,7 +1163,7 @@ def predicate(edge: Edge) -> bool:
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e ["kind" ] = DependencyGraphEdgeKind .CompileOrder
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def IterateDocumentsInCompileOrder (self ) -> Generator ['Document' , None , None ]:
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- if self ._compileOrderGraph .EdgeCount == 0 :
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+ if self ._compileOrderGraph .EdgeCount < self . _compileOrderGraph . VertexCount - 1 :
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raise VHDLModelException (f"Compile order is not yet computed from dependency graph." )
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for compileOrderNode in self ._compileOrderGraph .IterateTopologically ():
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class VHDLLibrary (TestCase ):
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def CreateDesign (self ) -> Design :
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- design = Design ()
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+ design = Design ("example" )
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library = design .GetLibrary ("lib_1" )
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path = Path ("tests.vhdl" )
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