@@ -1013,7 +1013,7 @@ def IndexPackages(self):
1013
1013
def IndexArchitectures (self ):
1014
1014
for architectures in self ._architectures .values ():
1015
1015
for architecture in architectures .values ():
1016
- architecture .IndexArchitecture ()
1016
+ architecture .Index ()
1017
1017
1018
1018
def __str__ (self ):
1019
1019
return f"VHDL Library: '{ self .Identifier } '"
@@ -2853,12 +2853,12 @@ def Statements(self) -> List[SequentialStatement]:
2853
2853
2854
2854
@export
2855
2855
class Context (PrimaryUnit ):
2856
- _references : List [Union [ LibraryClause , UseClause , ContextReference ] ]
2856
+ _references : List [ContextUnion ]
2857
2857
_libraryReferences : List [LibraryClause ]
2858
2858
_packageReferences : List [UseClause ]
2859
2859
_contextReferences : List [ContextReference ]
2860
2860
2861
- def __init__ (self , identifier : str , references : Iterable [Union [ LibraryClause , UseClause , ContextReference ] ] = None , documentation : str = None ):
2861
+ def __init__ (self , identifier : str , references : Iterable [ContextUnion ] = None , documentation : str = None ):
2862
2862
super ().__init__ (identifier , documentation )
2863
2863
2864
2864
self ._references = []
@@ -3406,6 +3406,10 @@ def SelectExpression(self) -> ExpressionUnion:
3406
3406
def Cases (self ) -> List [GenerateCase ]:
3407
3407
return self ._cases
3408
3408
3409
+ def Index (self ):
3410
+ for case in self ._cases :
3411
+ case .Index ()
3412
+
3409
3413
3410
3414
@export
3411
3415
class ForGenerateStatement (GenerateStatement , ConcurrentDeclarations , ConcurrentStatements ):
0 commit comments