Have mem_modules() return coleco mem map

Author: lwerdna

mame_coleco.py

@@ -2,7 +2,7 @@
 
 # packets supported by MAME stub
 # https://github.com/mamedev/mame/blob/master/src/osd/modules/debugger/debuggdbstub.cpp
-# ! - 
+# ! -
 # ? get last stop reason
 # c continue
 # D detach
@@ -86,6 +86,30 @@ def thread_select(self, tid):
 			raise DebugAdapter.GeneralError('mame_coleco has only one implicit thread: 0')
 
 	#
+	def mem_modules(self):
+		#[0000, 2000) - BIOS ROM
+		#[2000, 4000) - Expansion Port
+		#[4000, 6000) - Expansion Port
+		#[6000, 8000) - RAM (1K mapped into 8K)
+		#[8000, FFFF] - Cartridge ROM (32K 4 sections, enabled separately)
+
+		# from https://github.com/mamedev/mame/blob/master/src/mame/drivers/coleco.cpp
+		# ROM_START (coleco)
+		# 	ROM_REGION( 0x10000, "maincpu", 0 )
+		# 	ROM_SYSTEM_BIOS( 0, "original", "Original" )
+		# 	ROMX_LOAD( "313 10031-4005 73108a.u2", 0x0000, 0x2000, CRC(3aa93ef3) SHA1(45bedc4cbdeac66c7df59e9e599195c778d86a92), ROM_BIOS(0) )
+		# 	ROM_SYSTEM_BIOS( 1, "thick", "Thick characters" )
+		# 	// differences to 0x3aa93ef3 modified characters, added a pad 2 related fix
+		# 	ROMX_LOAD( "colecoa.rom", 0x0000, 0x2000, CRC(39bb16fc) SHA1(99ba9be24ada3e86e5c17aeecb7a2d68c5edfe59), ROM_BIOS(1) )
+		# ROM_END
+
+		return {
+			'colecoa.rom': 0,
+			'ram_mapped.bin': 0x6000,
+			'cartridge.rom': 0x8000
+		}
+
+	# callbacks
 	def thread_stop_pkt_to_reason(self, pkt_data):
 		''' callback: given the stop packet data in the form of a "TDICT", return
 			a (reason, extra_data) tuple '''