From 0ee260ec37a039ffc276f2f827c842f71513a3e9 Mon Sep 17 00:00:00 2001 From: Kai Luo Date: Thu, 18 Apr 2024 10:00:56 +0800 Subject: [PATCH] [PowerPC] `ANDI_rec_1_*` should define CR0 (#89034) These pseudo instructions finally copy the result to CR0 so they should define `CR0` in their definitions. --- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 ++ 1 file changed, 2 insertions(+) diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 43e3902cf407..261b9a3d1dff 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -4191,6 +4191,7 @@ def : Pat<(v4i32 (selectcc i1:$lhs, i1:$rhs, v4i32:$tval, v4i32:$fval, SETUGT)), def : Pat<(v4i32 (selectcc i1:$lhs, i1:$rhs, v4i32:$tval, v4i32:$fval, SETNE)), (SELECT_VRRC (CRXOR $lhs, $rhs), $tval, $fval)>; +let Defs = [CR0] in { def ANDI_rec_1_EQ_BIT : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins gprc:$in), "#ANDI_rec_1_EQ_BIT", [(set i1:$dst, (trunc (not i32:$in)))]>; @@ -4204,6 +4205,7 @@ def ANDI_rec_1_EQ_BIT8 : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins g8rc: def ANDI_rec_1_GT_BIT8 : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins g8rc:$in), "#ANDI_rec_1_GT_BIT8", [(set i1:$dst, (trunc i64:$in))]>; +} def : Pat<(i1 (not (trunc i32:$in))), (ANDI_rec_1_EQ_BIT $in)>;