diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PMultiSlotPseudoInstrInfo.td b/llvm/lib/Target/AIE/aie2p/AIE2PMultiSlotPseudoInstrInfo.td
index df6aa863676f..bb667fe72af0 100644
--- a/llvm/lib/Target/AIE/aie2p/AIE2PMultiSlotPseudoInstrInfo.td
+++ b/llvm/lib/Target/AIE/aie2p/AIE2PMultiSlotPseudoInstrInfo.td
@@ -25,12 +25,14 @@ let mayLoad = false, mayStore = false, hasSideEffects = false, Itinerary = II_PA
                           [PADDA_pstm_nrm_imm, PADDB_pstm_nrm_imm, PADDS_pstm_nrm_imm] >;
   }
 
-  let Itinerary = II_PADDB_2D in {
+  let Itinerary = II_PADDB_2D in
+  let Constraints = "$ptr_out = $ptr" in {
     def PADD_2D_pseudo : MultiSlot_Pseudo< (outs eP:$ptr_out, eDC:$dc), (ins eP:$ptr, eD:$mod),
                           "padd_2d_pseudo", "[$ptr], $mod", [PADDB_2D, PADDS_2D, PADDA_2D]>, AIE_HasTiedSubregister;
   }
 
-  let Itinerary = II_PADDB_3D in {
+  let Itinerary = II_PADDB_3D in
+  let Constraints = "$ptr_out = $ptr" in {
     def PADD_3D_pseudo : MultiSlot_Pseudo< (outs eP:$ptr_out, eDCL:$dcl, eDCH:$dch), (ins eP:$ptr, eDS:$mod),
                           "padd_3d_pseudo", "[$ptr], $mod", [PADDB_3D, PADDS_3D, PADDA_3D]>, AIE_HasTiedSubregister;
   }
@@ -289,14 +291,16 @@ let hasSideEffects = false, mayLoad = true, mayStore = false in {
   }
 
   // 2D vector.
-  let Itinerary = II_VLDB_2D_dmw_ldb in {
+  let Itinerary = II_VLDB_2D_dmw_ldb in
+  let Constraints = "$ptr_out = $ptr" in {
   def VLD_2D_w_pseudo : MultiSlot_Pseudo< (outs mWa:$dst, eP:$ptr_out, eDC:$dc),
                                           (ins eP:$ptr, eD:$mod),
       "vld_2d_w_pseudo", "$dst, [$ptr], $mod",
       [VLDB_2D_dmw_ldb, VLDA_2D_dmw_lda_w]>, AIE_HasTiedSubregister;
   }
 
-  let Itinerary = II_VLDB_2D_dmx_ldb_x in {
+  let Itinerary = II_VLDB_2D_dmx_ldb_x in
+  let Constraints = "$ptr_out = $ptr" in {
   def VLD_2D_x_pseudo : MultiSlot_Pseudo< (outs mXa:$dst, eP:$ptr_out, eDC:$dc),
                                                    (ins eP:$ptr, eD:$mod),
       "vld_2d_x_pseudo", "$dst, [$ptr], $mod",
@@ -304,14 +308,16 @@ let hasSideEffects = false, mayLoad = true, mayStore = false in {
   }
 
   // 3D vector.
-  let Itinerary = II_VLDB_3D_dmw_ldb in {
+  let Itinerary = II_VLDB_3D_dmw_ldb in
+  let Constraints = "$ptr_out = $ptr" in {
   def VLD_3D_w_pseudo : MultiSlot_Pseudo< (outs mWa:$dst, eP:$ptr_out, eDCL:$dcl, eDCH:$dch),
                                           (ins eP:$ptr, eDS:$mod),
       "vld_3d_w_pseudo", "$dst, [$ptr], $mod",
       [VLDB_3D_dmw_ldb, VLDA_3D_dmw_lda_w]>, AIE_HasTiedSubregister;
   }
 
-  let Itinerary = II_VLDB_3D_dmx_ldb_x in {
+  let Itinerary = II_VLDB_3D_dmx_ldb_x in
+  let Constraints = "$ptr_out = $ptr" in {
   def VLD_3D_x_pseudo : MultiSlot_Pseudo< (outs mXa:$dst, eP:$ptr_out, eDCL:$dcl, eDCH:$dch),
                                                    (ins eP:$ptr, eDS:$mod),
       "vld_3d_x_pseudo", "$dst, [$ptr], $mod",
@@ -349,14 +355,16 @@ let hasSideEffects = false, mayLoad = true, mayStore = false in {
       [VLDB_128_pstm_nrm_imm, VLDA_128_dmv_lda_w_pstm_nrm_imm]>;
   }
 
-  let Itinerary = II_VLDB_2D_128 in {
+  let Itinerary = II_VLDB_2D_128 in 
+  let Constraints = "$ptr_out = $ptr" in {
   def VLD_2D_128_pseudo : MultiSlot_Pseudo< (outs mWa:$dst, eP:$ptr_out, eDC:$dc),
                                           (ins eP:$ptr, eD:$mod),
       "vld_2d_128_pseudo", "$dst, [$ptr], $mod",
       [VLDB_2D_128, VLDA_2D_128]>, AIE_HasTiedSubregister;
   }
 
-  let Itinerary = II_VLDB_3D_128 in {
+  let Itinerary = II_VLDB_3D_128 in
+  let Constraints = "$ptr_out = $ptr" in {
   def VLD_3D_128_pseudo : MultiSlot_Pseudo< (outs mWa:$dst, eP:$ptr_out, eDCL:$dcl, eDCH:$dch),
                                           (ins eP:$ptr, eDS:$mod),
       "vld_3d_128_pseudo", "$dst, [$ptr], $mod",
diff --git a/llvm/test/CodeGen/AIE/aie2p/addr_1d2d3d.ll b/llvm/test/CodeGen/AIE/aie2p/addr_1d2d3d.ll
index f33466f220d4..2b1d4fe1df11 100644
--- a/llvm/test/CodeGen/AIE/aie2p/addr_1d2d3d.ll
+++ b/llvm/test/CodeGen/AIE/aie2p/addr_1d2d3d.ll
@@ -27,15 +27,16 @@ define dso_local ptr @test_add_2d_ptr(ptr %a, i32 noundef %off, i32 noundef %siz
 ; CHECK-LABEL: test_add_2d_ptr:
 ; CHECK:         .p2align 4
 ; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    mova r3, #6; nopxm
-; CHECK-NEXT:    lda dc0, [p2, #0]
+; CHECK-NEXT:    mova r3, #6; nopx
 ; CHECK-NEXT:    mov dn0, r1
+; CHECK-NEXT:    lda dc0, [p2, #0]
+; CHECK-NEXT:    mov p0, p1
 ; CHECK-NEXT:    lshl r0, r0, r3
 ; CHECK-NEXT:    mov m0, r0
 ; CHECK-NEXT:    ret lr
 ; CHECK-NEXT:    lshl r0, r2, r3 // Delay Slot 5
 ; CHECK-NEXT:    mov dj0, r0 // Delay Slot 4
-; CHECK-NEXT:    paddb.2d [p1], d0 // Delay Slot 3
+; CHECK-NEXT:    paddb.2d [p0], d0 // Delay Slot 3
 ; CHECK-NEXT:    st dc0, [p2, #0] // Delay Slot 2
 ; CHECK-NEXT:    nop // Delay Slot 1
 entry:
@@ -59,13 +60,13 @@ define dso_local ptr @test_add_2d_byte(ptr %a, i32 noundef %off, i32 noundef %si
 ; CHECK:         .p2align 4
 ; CHECK-NEXT:  // %bb.0: // %entry
 ; CHECK-NEXT:    lda dc0, [p2, #0]; nopb ; nops ; nopxm ; nopv
-; CHECK-NEXT:    nopx
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    mov m0, r0
+; CHECK-NEXT:    mov dj0, r2
 ; CHECK-NEXT:    ret lr
-; CHECK-NEXT:    mov dj0, r2 // Delay Slot 5
-; CHECK-NEXT:    mov dn0, r1 // Delay Slot 4
-; CHECK-NEXT:    paddb.2d [p1], d0 // Delay Slot 3
+; CHECK-NEXT:    mov dn0, r1 // Delay Slot 5
+; CHECK-NEXT:    mov p0, p1 // Delay Slot 4
+; CHECK-NEXT:    paddb.2d [p0], d0 // Delay Slot 3
 ; CHECK-NEXT:    st dc0, [p2, #0] // Delay Slot 2
 ; CHECK-NEXT:    nop // Delay Slot 1
 entry:
@@ -86,9 +87,10 @@ define dso_local ptr @test_add_3d_ptr(ptr %a, i32 noundef %off, i32 noundef %siz
 ; CHECK-LABEL: test_add_3d_ptr:
 ; CHECK:         .p2align 4
 ; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    mova r5, #6; nopx
-; CHECK-NEXT:    mov dn0, r1
+; CHECK-NEXT:    mova r5, #6; nopb ; nops ; nopxm ; nopv
+; CHECK-NEXT:    nopx ; mov dn0, r1
 ; CHECK-NEXT:    mov dn4, r3
+; CHECK-NEXT:    mov p0, p1
 ; CHECK-NEXT:    lda dc0, [p2, #0]
 ; CHECK-NEXT:    lda dc4, [p3, #0]
 ; CHECK-NEXT:    lshl r0, r0, r5
@@ -98,7 +100,7 @@ define dso_local ptr @test_add_3d_ptr(ptr %a, i32 noundef %off, i32 noundef %siz
 ; CHECK-NEXT:    lshl r0, r4, r5
 ; CHECK-NEXT:    ret lr
 ; CHECK-NEXT:    mov dj4, r0 // Delay Slot 5
-; CHECK-NEXT:    paddb.3d [p1], d0 // Delay Slot 4
+; CHECK-NEXT:    paddb.3d [p0], d0 // Delay Slot 4
 ; CHECK-NEXT:    st dc0, [p2, #0] // Delay Slot 3
 ; CHECK-NEXT:    st dc4, [p3, #0] // Delay Slot 2
 ; CHECK-NEXT:    nop // Delay Slot 1
@@ -130,15 +132,16 @@ define dso_local ptr @test_add_3d_byte(ptr %a, i32 noundef %off, i32 noundef %si
 ; CHECK-LABEL: test_add_3d_byte:
 ; CHECK:         .p2align 4
 ; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; nopb ; nops ; nopx ; mov m0, r0; nopv
 ; CHECK-NEXT:    lda dc0, [p2, #0]; nopx
 ; CHECK-NEXT:    lda dc4, [p3, #0]
-; CHECK-NEXT:    mov m0, r0
 ; CHECK-NEXT:    mov dj0, r2
 ; CHECK-NEXT:    mov dj4, r4
 ; CHECK-NEXT:    mov dn0, r1
+; CHECK-NEXT:    mov dn4, r3
 ; CHECK-NEXT:    ret lr
-; CHECK-NEXT:    mov dn4, r3 // Delay Slot 5
-; CHECK-NEXT:    paddb.3d [p1], d0 // Delay Slot 4
+; CHECK-NEXT:    mov p0, p1 // Delay Slot 5
+; CHECK-NEXT:    paddb.3d [p0], d0 // Delay Slot 4
 ; CHECK-NEXT:    st dc0, [p2, #0] // Delay Slot 3
 ; CHECK-NEXT:    st dc4, [p3, #0] // Delay Slot 2
 ; CHECK-NEXT:    nop // Delay Slot 1
@@ -167,7 +170,8 @@ define dso_local ptr @test_add_2d_ptr_backTOback_call(ptr %a, i32 noundef %off,
 ; CHECK-LABEL: test_add_2d_ptr_backTOback_call:
 ; CHECK:         .p2align 4
 ; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    mova r3, #6; nopb ; nopxm
+; CHECK-NEXT:    nops ; mov p0, p1
+; CHECK-NEXT:    mova r3, #6
 ; CHECK-NEXT:    mova dc0, #0
 ; CHECK-NEXT:    mov dn0, r1
 ; CHECK-NEXT:    lshl r0, r0, r3
@@ -175,7 +179,7 @@ define dso_local ptr @test_add_2d_ptr_backTOback_call(ptr %a, i32 noundef %off,
 ; CHECK-NEXT:    mov m0, r0 // Delay Slot 5
 ; CHECK-NEXT:    lshl r0, r2, r3 // Delay Slot 4
 ; CHECK-NEXT:    mov dj0, r0 // Delay Slot 3
-; CHECK-NEXT:    paddb.2d [p1], d0 // Delay Slot 2
+; CHECK-NEXT:    paddb.2d [p0], d0 // Delay Slot 2
 ; CHECK-NEXT:    paddb.2d [p0], d0 // Delay Slot 1
 entry:
   %mul.i = shl i32 %off, 6
@@ -196,7 +200,8 @@ define dso_local ptr @test_add_3d_ptr_backTOback_call(ptr %a, i32 noundef %off,
 ; CHECK-LABEL: test_add_3d_ptr_backTOback_call:
 ; CHECK:         .p2align 4
 ; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    mova r5, #6; nopb ; nopxm
+; CHECK-NEXT:    nops ; mov p0, p1
+; CHECK-NEXT:    mova r5, #6
 ; CHECK-NEXT:    mova dc0, #0
 ; CHECK-NEXT:    mov dn0, r1
 ; CHECK-NEXT:    mov dn4, r3
@@ -208,7 +213,7 @@ define dso_local ptr @test_add_3d_ptr_backTOback_call(ptr %a, i32 noundef %off,
 ; CHECK-NEXT:    mov dj0, r0 // Delay Slot 5
 ; CHECK-NEXT:    lshl r0, r4, r5 // Delay Slot 4
 ; CHECK-NEXT:    mov dj4, r0 // Delay Slot 3
-; CHECK-NEXT:    paddb.3d [p1], d0 // Delay Slot 2
+; CHECK-NEXT:    paddb.3d [p0], d0 // Delay Slot 2
 ; CHECK-NEXT:    paddb.3d [p0], d0 // Delay Slot 1
 entry:
   %mul.i = shl i32 %off, 6
diff --git a/llvm/test/CodeGen/AIE/aie2p/schedule/resource/vld_multi_slot_memory_banks.mir b/llvm/test/CodeGen/AIE/aie2p/schedule/resource/vld_multi_slot_memory_banks.mir
index 360e79998202..ba40682536a1 100644
--- a/llvm/test/CodeGen/AIE/aie2p/schedule/resource/vld_multi_slot_memory_banks.mir
+++ b/llvm/test/CodeGen/AIE/aie2p/schedule/resource/vld_multi_slot_memory_banks.mir
@@ -320,7 +320,7 @@ body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: VLD_2D_w_pseudo_same_bank
     ; CHECK: $wh3, $p7, $dc5 = VLDB_2D_dmw_ldb killed $p7, killed $d5 :: (load (<8 x s32>), addrspace 9)
-    ; CHECK-NEXT: $wh4, $p7, $dc7 = VLDB_2D_dmw_ldb killed $p6, killed $d7 :: (load (<8 x s32>), addrspace 9)
+    ; CHECK-NEXT: $wh4, $p6, $dc7 = VLDB_2D_dmw_ldb killed $p6, killed $d7 :: (load (<8 x s32>), addrspace 9)
     ; CHECK-NEXT: NOP
     ; CHECK-NEXT: NOP
     ; CHECK-NEXT: NOP
@@ -328,7 +328,7 @@ body:             |
     ; CHECK-NEXT: NOP
     ; CHECK-NEXT: NOP
     $wh3, $p7, $dc5 = VLD_2D_w_pseudo $p7, $d5 :: (load (<8 x s32>), addrspace 9)
-    $wh4, $p7, $dc7 = VLD_2D_w_pseudo $p6, $d7 :: (load (<8 x s32>), addrspace 9)
+    $wh4, $p6, $dc7 = VLD_2D_w_pseudo $p6, $d7 :: (load (<8 x s32>), addrspace 9)
 ...
 
 ---
@@ -358,7 +358,7 @@ body:             |
   bb.0.entry:
     ; CHECK-LABEL: name: VLD_2D_x_pseudo_same_bank
     ; CHECK: $x0, $p7, $dc5 = VLDB_2D_dmx_ldb_x killed $p7, killed $d5 :: (load (<16 x s32>), addrspace 9)
-    ; CHECK-NEXT: $x1, $p7, $dc7 = VLDB_2D_dmx_ldb_x killed $p6, killed $d7 :: (load (<16 x s32>), addrspace 9)
+    ; CHECK-NEXT: $x1, $p6, $dc7 = VLDB_2D_dmx_ldb_x killed $p6, killed $d7 :: (load (<16 x s32>), addrspace 9)
     ; CHECK-NEXT: NOP
     ; CHECK-NEXT: NOP
     ; CHECK-NEXT: NOP
@@ -366,7 +366,7 @@ body:             |
     ; CHECK-NEXT: NOP
     ; CHECK-NEXT: NOP
     $x0, $p7, $dc5 = VLD_2D_x_pseudo $p7, $d5 :: (load (<16 x s32>), addrspace 9)
-    $x1, $p7, $dc7 = VLD_2D_x_pseudo $p6, $d7 :: (load (<16 x s32>), addrspace 9)
+    $x1, $p6, $dc7 = VLD_2D_x_pseudo $p6, $d7 :: (load (<16 x s32>), addrspace 9)
 ...
 
 ---