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rocallahanjix
rocallahan
authored and
jix
committed
Only write out stdcells/lutcosts once for all ABC runs
1 parent 13b3418 commit 222f457

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+82
-59
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1 file changed

+82
-59
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‎passes/techmap/abc.cc‎

Lines changed: 82 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,7 @@ bool cmos_cost;
119119

120120
struct AbcConfig
121121
{
122+
std::string global_tempdir_name;
122123
std::string script_file;
123124
std::string exe_file;
124125
std::vector<std::string> liberty_files;
@@ -878,9 +879,9 @@ void AbcModuleState::prepare_module(RTLIL::Design *design, RTLIL::Module *module
878879
abc_script += stringf("read_constr -v \"%s\"; ", config.constr_file);
879880
} else
880881
if (!config.lut_costs.empty())
881-
abc_script += stringf("read_lut %s/lutdefs.txt; ", tempdir_name);
882+
abc_script += stringf("read_lut %s/lutdefs.txt; ", config.global_tempdir_name);
882883
else
883-
abc_script += stringf("read_library %s/stdcells.genlib; ", tempdir_name);
884+
abc_script += stringf("read_library %s/stdcells.genlib; ", config.global_tempdir_name);
884885

885886
if (!config.script_file.empty()) {
886887
const std::string &script_file = config.script_file;
@@ -1112,65 +1113,8 @@ void AbcModuleState::run_abc()
11121113

11131114
log("Extracted %d gates and %d wires to a netlist network with %d inputs and %d outputs.\n",
11141115
count_gates, GetSize(signal_list), count_input, count_output);
1115-
log_push();
11161116
if (count_output > 0)
11171117
{
1118-
auto &cell_cost = cmos_cost ? CellCosts::cmos_gate_cost() : CellCosts::default_gate_cost();
1119-
1120-
buffer = stringf("%s/stdcells.genlib", tempdir_name);
1121-
f = fopen(buffer.c_str(), "wt");
1122-
if (f == nullptr)
1123-
log_error("Opening %s for writing failed: %s\n", buffer, strerror(errno));
1124-
fprintf(f, "GATE ZERO 1 Y=CONST0;\n");
1125-
fprintf(f, "GATE ONE 1 Y=CONST1;\n");
1126-
fprintf(f, "GATE BUF %d Y=A; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at(ID($_BUF_)));
1127-
fprintf(f, "GATE NOT %d Y=!A; PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_NOT_)));
1128-
if (enabled_gates.count("AND"))
1129-
fprintf(f, "GATE AND %d Y=A*B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at(ID($_AND_)));
1130-
if (enabled_gates.count("NAND"))
1131-
fprintf(f, "GATE NAND %d Y=!(A*B); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_NAND_)));
1132-
if (enabled_gates.count("OR"))
1133-
fprintf(f, "GATE OR %d Y=A+B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at(ID($_OR_)));
1134-
if (enabled_gates.count("NOR"))
1135-
fprintf(f, "GATE NOR %d Y=!(A+B); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_NOR_)));
1136-
if (enabled_gates.count("XOR"))
1137-
fprintf(f, "GATE XOR %d Y=(A*!B)+(!A*B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_XOR_)));
1138-
if (enabled_gates.count("XNOR"))
1139-
fprintf(f, "GATE XNOR %d Y=(A*B)+(!A*!B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_XNOR_)));
1140-
if (enabled_gates.count("ANDNOT"))
1141-
fprintf(f, "GATE ANDNOT %d Y=A*!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_ANDNOT_)));
1142-
if (enabled_gates.count("ORNOT"))
1143-
fprintf(f, "GATE ORNOT %d Y=A+!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_ORNOT_)));
1144-
if (enabled_gates.count("AOI3"))
1145-
fprintf(f, "GATE AOI3 %d Y=!((A*B)+C); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_AOI3_)));
1146-
if (enabled_gates.count("OAI3"))
1147-
fprintf(f, "GATE OAI3 %d Y=!((A+B)*C); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_OAI3_)));
1148-
if (enabled_gates.count("AOI4"))
1149-
fprintf(f, "GATE AOI4 %d Y=!((A*B)+(C*D)); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_AOI4_)));
1150-
if (enabled_gates.count("OAI4"))
1151-
fprintf(f, "GATE OAI4 %d Y=!((A+B)*(C+D)); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_OAI4_)));
1152-
if (enabled_gates.count("MUX"))
1153-
fprintf(f, "GATE MUX %d Y=(A*B)+(S*B)+(!S*A); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_MUX_)));
1154-
if (enabled_gates.count("NMUX"))
1155-
fprintf(f, "GATE NMUX %d Y=!((A*B)+(S*B)+(!S*A)); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_NMUX_)));
1156-
if (map_mux4)
1157-
fprintf(f, "GATE MUX4 %d Y=(!S*!T*A)+(S*!T*B)+(!S*T*C)+(S*T*D); PIN * UNKNOWN 1 999 1 0 1 0\n", 2*cell_cost.at(ID($_MUX_)));
1158-
if (map_mux8)
1159-
fprintf(f, "GATE MUX8 %d Y=(!S*!T*!U*A)+(S*!T*!U*B)+(!S*T*!U*C)+(S*T*!U*D)+(!S*!T*U*E)+(S*!T*U*F)+(!S*T*U*G)+(S*T*U*H); PIN * UNKNOWN 1 999 1 0 1 0\n", 4*cell_cost.at(ID($_MUX_)));
1160-
if (map_mux16)
1161-
fprintf(f, "GATE MUX16 %d Y=(!S*!T*!U*!V*A)+(S*!T*!U*!V*B)+(!S*T*!U*!V*C)+(S*T*!U*!V*D)+(!S*!T*U*!V*E)+(S*!T*U*!V*F)+(!S*T*U*!V*G)+(S*T*U*!V*H)+(!S*!T*!U*V*I)+(S*!T*!U*V*J)+(!S*T*!U*V*K)+(S*T*!U*V*L)+(!S*!T*U*V*M)+(S*!T*U*V*N)+(!S*T*U*V*O)+(S*T*U*V*P); PIN * UNKNOWN 1 999 1 0 1 0\n", 8*cell_cost.at(ID($_MUX_)));
1162-
fclose(f);
1163-
1164-
if (!config.lut_costs.empty()) {
1165-
buffer = stringf("%s/lutdefs.txt", tempdir_name);
1166-
f = fopen(buffer.c_str(), "wt");
1167-
if (f == nullptr)
1168-
log_error("Opening %s for writing failed: %s\n", buffer, strerror(errno));
1169-
for (int i = 0; i < GetSize(config.lut_costs); i++)
1170-
fprintf(f, "%d %d.00 1.00\n", i+1, config.lut_costs.at(i));
1171-
fclose(f);
1172-
}
1173-
11741118
buffer = stringf("\"%s\" -s -f %s/abc.script 2>&1", config.exe_file, tempdir_name);
11751119
log("Running ABC command: %s\n", replace_tempdir(buffer, tempdir_name, config.show_tempdir));
11761120

@@ -1231,6 +1175,65 @@ void AbcModuleState::run_abc()
12311175
log("Don't call ABC as there is nothing to map.\n");
12321176
}
12331177

1178+
void emit_global_input_files(const AbcConfig &config)
1179+
{
1180+
if (!config.lut_costs.empty()) {
1181+
std::string buffer = stringf("%s/lutdefs.txt", config.global_tempdir_name.c_str());
1182+
FILE *f = fopen(buffer.c_str(), "wt");
1183+
if (f == nullptr)
1184+
log_error("Opening %s for writing failed: %s\n", buffer.c_str(), strerror(errno));
1185+
for (int i = 0; i < GetSize(config.lut_costs); i++)
1186+
fprintf(f, "%d %d.00 1.00\n", i+1, config.lut_costs.at(i));
1187+
fclose(f);
1188+
} else {
1189+
auto &cell_cost = cmos_cost ? CellCosts::cmos_gate_cost() : CellCosts::default_gate_cost();
1190+
1191+
std::string buffer = stringf("%s/stdcells.genlib", config.global_tempdir_name.c_str());
1192+
FILE *f = fopen(buffer.c_str(), "wt");
1193+
if (f == nullptr)
1194+
log_error("Opening %s for writing failed: %s\n", buffer.c_str(), strerror(errno));
1195+
fprintf(f, "GATE ZERO 1 Y=CONST0;\n");
1196+
fprintf(f, "GATE ONE 1 Y=CONST1;\n");
1197+
fprintf(f, "GATE BUF %d Y=A; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at(ID($_BUF_)));
1198+
fprintf(f, "GATE NOT %d Y=!A; PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_NOT_)));
1199+
if (enabled_gates.count("AND"))
1200+
fprintf(f, "GATE AND %d Y=A*B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at(ID($_AND_)));
1201+
if (enabled_gates.count("NAND"))
1202+
fprintf(f, "GATE NAND %d Y=!(A*B); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_NAND_)));
1203+
if (enabled_gates.count("OR"))
1204+
fprintf(f, "GATE OR %d Y=A+B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at(ID($_OR_)));
1205+
if (enabled_gates.count("NOR"))
1206+
fprintf(f, "GATE NOR %d Y=!(A+B); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_NOR_)));
1207+
if (enabled_gates.count("XOR"))
1208+
fprintf(f, "GATE XOR %d Y=(A*!B)+(!A*B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_XOR_)));
1209+
if (enabled_gates.count("XNOR"))
1210+
fprintf(f, "GATE XNOR %d Y=(A*B)+(!A*!B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_XNOR_)));
1211+
if (enabled_gates.count("ANDNOT"))
1212+
fprintf(f, "GATE ANDNOT %d Y=A*!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_ANDNOT_)));
1213+
if (enabled_gates.count("ORNOT"))
1214+
fprintf(f, "GATE ORNOT %d Y=A+!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_ORNOT_)));
1215+
if (enabled_gates.count("AOI3"))
1216+
fprintf(f, "GATE AOI3 %d Y=!((A*B)+C); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_AOI3_)));
1217+
if (enabled_gates.count("OAI3"))
1218+
fprintf(f, "GATE OAI3 %d Y=!((A+B)*C); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_OAI3_)));
1219+
if (enabled_gates.count("AOI4"))
1220+
fprintf(f, "GATE AOI4 %d Y=!((A*B)+(C*D)); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_AOI4_)));
1221+
if (enabled_gates.count("OAI4"))
1222+
fprintf(f, "GATE OAI4 %d Y=!((A+B)*(C+D)); PIN * INV 1 999 1 0 1 0\n", cell_cost.at(ID($_OAI4_)));
1223+
if (enabled_gates.count("MUX"))
1224+
fprintf(f, "GATE MUX %d Y=(A*B)+(S*B)+(!S*A); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_MUX_)));
1225+
if (enabled_gates.count("NMUX"))
1226+
fprintf(f, "GATE NMUX %d Y=!((A*B)+(S*B)+(!S*A)); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at(ID($_NMUX_)));
1227+
if (map_mux4)
1228+
fprintf(f, "GATE MUX4 %d Y=(!S*!T*A)+(S*!T*B)+(!S*T*C)+(S*T*D); PIN * UNKNOWN 1 999 1 0 1 0\n", 2*cell_cost.at(ID($_MUX_)));
1229+
if (map_mux8)
1230+
fprintf(f, "GATE MUX8 %d Y=(!S*!T*!U*A)+(S*!T*!U*B)+(!S*T*!U*C)+(S*T*!U*D)+(!S*!T*U*E)+(S*!T*U*F)+(!S*T*U*G)+(S*T*U*H); PIN * UNKNOWN 1 999 1 0 1 0\n", 4*cell_cost.at(ID($_MUX_)));
1231+
if (map_mux16)
1232+
fprintf(f, "GATE MUX16 %d Y=(!S*!T*!U*!V*A)+(S*!T*!U*!V*B)+(!S*T*!U*!V*C)+(S*T*!U*!V*D)+(!S*!T*U*!V*E)+(S*!T*U*!V*F)+(!S*T*U*!V*G)+(S*T*U*!V*H)+(!S*!T*!U*V*I)+(S*!T*!U*V*J)+(!S*T*!U*V*K)+(S*T*!U*V*L)+(!S*!T*U*V*M)+(S*!T*U*V*N)+(!S*T*U*V*O)+(S*T*U*V*P); PIN * UNKNOWN 1 999 1 0 1 0\n", 8*cell_cost.at(ID($_MUX_)));
1233+
fclose(f);
1234+
}
1235+
}
1236+
12341237
void AbcModuleState::extract(AbcSigMap &assign_map, RTLIL::Design *design, RTLIL::Module *module)
12351238
{
12361239
if (!did_run_abc) {
@@ -1811,6 +1814,13 @@ struct AbcPass : public Pass {
18111814
config.show_tempdir = design->scratchpad_get_bool("abc.showtmp", false);
18121815
markgroups = design->scratchpad_get_bool("abc.markgroups", markgroups);
18131816

1817+
if (config.cleanup)
1818+
config.global_tempdir_name = get_base_tmpdir() + "/";
1819+
else
1820+
config.global_tempdir_name = "_tmp_";
1821+
config.global_tempdir_name += proc_program_prefix() + "yosys-abc-XXXXXX";
1822+
config.global_tempdir_name = make_temp_dir(config.global_tempdir_name);
1823+
18141824
if (design->scratchpad_get_bool("abc.debug")) {
18151825
config.cleanup = false;
18161826
config.show_tempdir = true;
@@ -2139,6 +2149,8 @@ struct AbcPass : public Pass {
21392149
// enabled_gates.insert("NMUX");
21402150
}
21412151

2152+
emit_global_input_files(config);
2153+
21422154
for (auto mod : design->selected_modules())
21432155
{
21442156
if (mod->processes.size() > 0) {
@@ -2164,9 +2176,12 @@ struct AbcPass : public Pass {
21642176

21652177
AbcModuleState state(config, initvals);
21662178
state.prepare_module(design, mod, assign_map, cells, dff_mode, clk_str);
2179+
log_push();
2180+
log_header(design, "Executing ABC.\n");
21672181
state.run_abc();
21682182
state.extract(assign_map, design, mod);
21692183
state.finish();
2184+
log_pop();
21702185
continue;
21712186
}
21722187

@@ -2335,12 +2350,20 @@ struct AbcPass : public Pass {
23352350
state.srst_polarity = std::get<6>(it.first);
23362351
state.srst_sig = assign_map(std::get<7>(it.first));
23372352
state.prepare_module(design, mod, assign_map, it.second, !state.clk_sig.empty(), "$");
2353+
log_push();
2354+
log_header(design, "Executing ABC.\n");
23382355
state.run_abc();
23392356
state.extract(assign_map, design, mod);
23402357
state.finish();
2358+
log_pop();
23412359
}
23422360
}
23432361

2362+
if (config.cleanup) {
2363+
log("Removing global temp directory.\n");
2364+
remove_directory(config.global_tempdir_name);
2365+
}
2366+
23442367
log_pop();
23452368
}
23462369
} AbcPass;

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