I2S - support for 64 bit setBitsPerSample() -- TLV320ADC5140 #1253

johnofleek · 2023-03-03T17:43:22Z

johnofleek
Mar 3, 2023

Hi
I'm looking at how feasible it would be to connect a multi channel (4x 32 bit) ADC to the pico I2S.

The project requires 4 analogue microphones. I've started working with the TLV320ADC5140 Quad-Channel Audiuo ADC.

I think to support 4 analog mics the TLV320ADC5140 in I2S mode uses 2x 32 bits left channel and 2x 32 bits right channel. I'm think that this is the same 64 bits per sample.

Does anyone know if it's possible to modify the I2S library to support this?

Many thanks in advance

Answered by johnofleek

Mar 7, 2023

I'm learning but nowhere up to speed with RP2040 pio programming - many thanks for all your help and patience.

Suggested changes does create the correct number of frame bits - 64 Left and 64 Right

pio_i2s.pio

static inline void pio_i2s_in64_program_init(PIO pio, uint sm, uint offset, uint data_pin, uint clock_pin_base, uint bits) {
    pio_gpio_init(pio, data_pin);
    pio_gpio_init(pio, clock_pin_base);
    pio_gpio_init(pio, clock_pin_base + 1);
    pio_sm_config sm_config = pio_i2s_in_program_get_default_config(offset);
    sm_config_set_in_pins(&sm_config, data_pin);
    sm_config_set_sideset_pins(&sm_config, clock_pin_base);
    sm_config_set_in_shift(&sm_config, false, true, 32); //…

View full answer

earlephilhower · 2023-03-03T20:43:15Z

earlephilhower
Mar 3, 2023
Maintainer

It's a hack, but I think it's not too difficult as long as you yourself keep track of the channel layout.

Note that this is off the top of my head, but it should get you going...

In the I2S lib, comment out the sanity check

arduino-pico/libraries/I2S/src/I2S.cpp

Lines 77 to 79 in 7aa1c08

    
           if (_running || ((bps != 8) && (bps != 16) && (bps != 24) && (bps != 32))) { 
        
               return false; 
        
           }

In your app use setBuffers() to make 4 or 5 large multiple-of-4 buffers (think 128-ish). Call setBitsPerSample(64) and do the usual startup. I think the I2S::read() will return things just fine. The backend DMA AudioBufferManager doesn't care about the BPS/Fs/etc. so no mods there.

0 replies

johnofleek · 2023-03-06T11:33:51Z

johnofleek
Mar 6, 2023
Author

Many thanks for the quick response.

I modified the I2S.cpp setBitsPerSample(int bps) and tested with the following 64 bit per channel calls:


I2S i2s0(INPUT);

#define I2S0_DATA  0
#define I2S0_BCLK  1 // LRCLK = I2C0_BCLK + 1

void i2s0_setup(void){
  i2s0.setDATA(I2S0_DATA);
  i2s0.setBCLK(I2S0_BCLK); 
  i2s0.setBitsPerSample(64);
  i2s0.setBuffers(64,2048,0);
  
  i2s0.setFrequency(16000);
  i2s0.begin();
}

i2s0.setBitsPerSample(64) produces a 2.048MHz clock 32 bits per channel

i2s0.setBitsPerSample(32) produces a 1.024MHz clock 32 bits per channel

The modified I2S.cpp is definitly being used - if I put an error in the I2S source then the build fails

Any ideas?

Many thanks John

1 reply

earlephilhower Mar 6, 2023
Maintainer

Well, I2S.cpp probably is good, but now the PIO program needs a couple tweaks.

This needs to be maxed to shift at 32b, not 64b:

arduino-pico/libraries/I2S/src/pio_i2s.pio

Line 144 in 54f9d3c

    
           sm_config_set_in_shift(&sm_config, false, true, (bits <= 16) ? 2 * bits : bits);

And here, it turns out, the PIO SET instruction can only set values up to 31...and we're trying to set the bitcount (for LRCLK generation) to 62. It needs to be modified for the core to push 62 on the IN FIFO and have the PIO pop it into our bitwidth register Y.:

arduino-pico/libraries/I2S/src/pio_i2s.pio

Line 153 in 54f9d3c

pio_sm_exec(pio, sm, pio_encode_set(pio_y, bits - 2));

That needs to be done before the IN/OUT FIFOs are connected here

arduino-pico/libraries/I2S/src/pio_i2s.pio

Line 145 in 54f9d3c

sm_config_set_fifo_join(&sm_config, PIO_FIFO_JOIN_RX);

johnofleek · 2023-03-06T21:22:26Z

johnofleek
Mar 6, 2023
Author

Many thanks for helping with this - sorry I'm not yet up to speed with the pico pio

I tried the mods. as follows

I2S.cpp

bool I2S::begin() {
    _running = true;
    _hasPeeked = false;
    int off = 0;
    _i2s = new PIOProgram(_isOutput ? (_isLSBJ ? &pio_lsbj_out_program : &pio_i2s_out_program) : &pio_i2s_in_program);
    _i2s->prepare(&_pio, &_sm, &off);
    if (_isOutput) {
        if (_isLSBJ) {
            pio_lsbj_out_program_init(_pio, _sm, off, _pinDOUT, _pinBCLK, _bps);
        } else {
            pio_i2s_out_program_init(_pio, _sm, off, _pinDOUT, _pinBCLK, _bps);
        }
    } 
    else {   // JT added this new function to support 2x 32bit per L and R channel i2s
        pio_i2s_in64_program_init(_pio, _sm, off, _pinDOUT, _pinBCLK, _bps);
    }
    /* temp remove normal IP code
    else {
        pio_i2s_in_program_init(_pio, _sm, off, _pinDOUT, _pinBCLK, _bps);
    }
    */
    setFrequency(_freq);

And added a function to pio_i2s_pio

static inline void pio_i2s_in64_program_init(PIO pio, uint sm, uint offset, uint data_pin, uint clock_pin_base, uint bits) {
    pio_gpio_init(pio, data_pin);
    pio_gpio_init(pio, clock_pin_base);
    pio_gpio_init(pio, clock_pin_base + 1);
    pio_sm_config sm_config = pio_i2s_in_program_get_default_config(offset);
    sm_config_set_in_pins(&sm_config, data_pin);
    sm_config_set_sideset_pins(&sm_config, clock_pin_base);
    sm_config_set_in_shift(&sm_config, false, true, 64); // JT changed this to xx bits fixed
    pio_sm_exec(pio, sm, pio_encode_set(pio_y, 32 - 2)); // JT changed this to 62 bits fixed
    sm_config_set_fifo_join(&sm_config, PIO_FIFO_JOIN_RX);
    pio_sm_init(pio, sm, offset, &sm_config);
    uint pin_mask = 3u << clock_pin_base;
    pio_sm_set_pindirs_with_mask(pio, sm, pin_mask, pin_mask);
    pio_sm_set_pins(pio, sm, 0); // clear pins
}

The BLCK is still 32 bits per LRCLK

static uint pio_encode_set(enum pio_src_dest dest, uint value )

value 0-31

1 reply

earlephilhower Mar 6, 2023
Maintainer

Getting there, but still some issues:

This should ne 32b, not 64b. You'll still shift the FIFO when it has 32b of data to the DMA engine:

sm_config_set_in_shift(&sm_config, false, true, 64); // JT changed this to xx bits fixed

This is the same issue as before. You need to push for FIFO from the ARM w/62, then pop it and move it to Y on the PIO thru injected commands:

pio_sm_exec(pio, sm, pio_encode_set(pio_y, 32 - 2)); // JT changed this to 62 bits fixed

So something like (untested, just looking at datasheet)

pio_sm_put_blocking(pio, sm, 62);
pio_sm_exec(pio, sm, pio_encode_pull(false, true)); // OSR now has 62
pio_sm_exec(pio, sm, pio_encode_mov(pio_y, pio_osr)); // MOV Y <- OSR, now Y has 62

johnofleek · 2023-03-07T12:52:36Z

johnofleek
Mar 7, 2023
Author

I'm learning but nowhere up to speed with RP2040 pio programming - many thanks for all your help and patience.

Suggested changes does create the correct number of frame bits - 64 Left and 64 Right

pio_i2s.pio

static inline void pio_i2s_in64_program_init(PIO pio, uint sm, uint offset, uint data_pin, uint clock_pin_base, uint bits) {
    pio_gpio_init(pio, data_pin);
    pio_gpio_init(pio, clock_pin_base);
    pio_gpio_init(pio, clock_pin_base + 1);
    pio_sm_config sm_config = pio_i2s_in_program_get_default_config(offset);
    sm_config_set_in_pins(&sm_config, data_pin);
    sm_config_set_sideset_pins(&sm_config, clock_pin_base);
    sm_config_set_in_shift(&sm_config, false, true, 32); // JT changed this to 32 bits fixed
    pio_sm_exec(pio, sm, pio_encode_set(pio_y, 32 - 2)); // JT changed this to 32 bits fixed
    pio_sm_put_blocking(pio, sm, 62);
    pio_sm_exec(pio, sm, pio_encode_pull(false, true));  // OSR now has 62   
    pio_sm_exec(pio, sm, pio_encode_mov(pio_y, pio_osr)); // MOV Y <- OSR, now Y has 62
    sm_config_set_fifo_join(&sm_config, PIO_FIFO_JOIN_RX);
    pio_sm_init(pio, sm, offset, &sm_config);
    uint pin_mask = 3u << clock_pin_base;
    pio_sm_set_pindirs_with_mask(pio, sm, pin_mask, pin_mask);
    pio_sm_set_pins(pio, sm, 0); // clear pins
}

Current modified library
I2S_L.zip

Current test ino
i2sTest_get4x32channels.zip

Debug out when driving DIN with a un-syncronised square wave of similar frequency to the frame rate. The data is I think sane - I only ever see odd numbers on the left and even on the right but the logic analayser sees similar behaviour.

Using the above test code there are missing groups of data frames every so often - I didn't know if this was an issue from the pio code or the serial debug code.

So I tried extracting the data first into a local buffer and then printing the buffer. With i2s0.setBuffers(16,128,0) I get 0x100 samples then empty data. I suspect the DMA is empty? but I failed to check something? Increasing the bufferWords in i2s0.setBuffers(16,256,0) fills adcOutData - I must be miss understanding something here. However there are no missing sets of samples until the end of the i2s0.setBuffers setting and the results are consistent.

i2sTest_get4channelsInToBuf.ino.txt

log.log

7 replies

johnofleek Mar 7, 2023
Author

Is there a function that I can call to discover how much valid data is in the Audio buffer?

For the project I'm looking at something like 640K bytes of RAM data to post process - is it reasonable to set the Audio buffer / DMA to capture that much data in one lump ?

earlephilhower Mar 7, 2023
Maintainer

available will give you the # of 32b words that you can read. You can't access a currently being filled buffer, the DMA hardware owns it.

...something like 640K bytes of RAM data...

Well, seeing as you only have 256K total and probably ~200K free to write into, then no. 😆

johnofleek Mar 8, 2023
Author

Many many thank for all the help it's much appreciated. Testing so far is looking good.

Sorry about the daft memory question.
What I should have asked is - is the value of I2S0_BUFFERS_WORDS in i2s0.setBuffers(I2S0_BUFFERS, I2S0_BUFFERS_WORDS, I2S0_SILENCE_SAMPLE); only limited by the available RP2040 RAM ?

Moving onto the data corruption issue I was seeing - I think the issue is connected with the DMA memory intial conditions. Once data has been read - everything after that is ok. In my example (below) after the 0x80th sample is read the data appears to be is fine for ever (no odd changes to the data pattern).

Any thoughts on why the first block of data is corrupted ? and how best to work around the issue?

#define I2S0_DATA                 0
#define I2S0_BCLK                 1 // LRCLK = I2C0_BCLK + 1
#define I2S0_BUFFERS              4
#define I2S0_BUFFERS_WORDS        0x20
#define I2S0_SILENCE_SAMPLE       0xE5E5E5E5
#define I2S0_FREQUENCY            4000   // Hz This is the L/R CLK FREQUENCY

void i2s0_setup(void){
  i2s0.setDATA(I2S0_DATA);
  i2s0.setBCLK(I2S0_BCLK); 
  i2s0.setBitsPerSample(32);      // Does nothing in I2S_L as the code is hardcoded 
  i2s0.setBuffers(I2S0_BUFFERS, I2S0_BUFFERS_WORDS, I2S0_SILENCE_SAMPLE);
  i2s0.setFrequency(I2S0_FREQUENCY);
  
  i2s0.begin();
}

Data read and stored in an array
when complete array is printf'd

0000 : 0003FFFF FFFF0000 00003FFF FFFFE000
0004 : 000007FF FFFFFE00 0000007F FFFFFFE0
0008 : 00000007 FFFFFFFE 00000000 7FFFFFFF
000C : C0000000 0FFFFFFF FC000000 00FFFFFF
0010 : FFC00000 000FFFFF FFFC0000 0000FFFF
0014 : FFFFC000 00000FFF FFFFF800 000001FF
0018 : FFFFFF80 0000001F FFFFFFF8 00000001
001C : FFFFFFFF 80000000 1FFFFFFF F8000000
0020 : 01FFFFFF FF000000 003FFFFF FFF00000
0024 : 0003FFFF FFFF0000 00003FFF FFFFF000
0028 : 000003FF FFFFFF00 0000003F FFFFFFE0
002C : 00000007 FFFFFFFE 00000000 7FFFFFFF
0030 : E0000000 07FFFFFF FE000000 007FFFFF
0034 : FFC00000 000FFFFF FFFC0000 0000FFFF
0038 : FFFFC000 00000FFF FFFFFC00 000000FF
003C : FFFFFFC0 0000000F FFFFFFF8 00000001
0040 : 00000000 00000000 00000000 00000000
0044 : 00000000 00000000 00000000 00000000
0048 : 00000000 00000000 00000000 00000000
004C : 00000000 00000000 00000000 00000000
0050 : 00000000 00000000 00000000 00000000
0054 : 00000000 00000000 00000000 00000000
0058 : 00000000 00000000 00000000 00000000
005C : 00000000 00000000 00000000 00000000
0060 : 00000000 00000000 00000000 00000000
0064 : 00000000 00000000 00000000 00000000
0068 : 00000000 00000000 00000000 00000000
006C : 00000000 00000000 00000000 00000000
0070 : 00000000 00000000 00000000 00000000
0074 : 00000000 00000000 00000000 00000000
0078 : 00000000 00000000 00000000 00000000
007C : 00000000 00000000 00000000 00000000
0080 : 0003FFFF FFFF0000 00003FFF FFFFE000
0084 : 000007FF FFFFFE00 0000007F FFFFFFE0
0088 : 00000007 FFFFFFFE 00000000 7FFFFFFF
008C : C0000000 0FFFFFFF FC000000 00FFFFFF
0090 : FFC00000 000FFFFF FFFC0000 0000FFFF
0094 : FFFFC000 00000FFF FFFFF800 000001FF
0098 : FFFFFF80 0000001F FFFFFFF8 00000001
009C : FFFFFFFF 80000000 1FFFFFFF F8000000
00A0 : FFFFFFFF 80000000 1FFFFFFF F8000000
00A4 : 01FFFFFF FF800000 001FFFFF FFF80000
00A8 : 0001FFFF FFFF0000 00003FFF FFFFF000
00AC : 000003FF FFFFFF00 0000003F FFFFFFF0
...
02DC : FFFFFFFF 00000000 3FFFFFFF E0000000
02E0 : 07FFFFFF FE000000 007FFFFF FFE00000
02E4 : 0007FFFF FFFE0000 00007FFF FFFFE000
02E8 : 000007FF FFFFFC00 000000FF FFFFFFC0
02EC : 0000000F FFFFFFFC 00000000 FFFFFFFF
02F0 : C0000000 0FFFFFFF FC000000 00FFFFFF
02F4 : FF800000 001FFFFF FFF80000 0001FFFF
02F8 : FFFF8000 00001FFF FFFFF800 000001FF
02FC : FFFFFF00 0000003F FFFFFFF0 00000003

Test code
i2sTest_get4channelsInToBuf2.ino.txt

earlephilhower Mar 8, 2023
Maintainer

In my example (below) after the 0x80th sample is read the data appears to be is fine for ever (no odd changes to the data pattern).

Would you be able to do an experiment and run the same test @ 32b/sample using unmodified code and your waveform generator? It may be a real I2S or AudioBufferManager bug due to startup conditions...

Re this

What I should have asked is - is the value of I2S0_BUFFERS_WORDS in i2s0.setBuffers(I2S0_BUFFERS, I2S0_BUFFERS_WORDS, I2S0_SILENCE_SAMPLE); only limited by the available RP2040 RAM ?

I guess you already know the answer, but if not then yes it is limited by available RAM. Bufferwords * 4 * numbuffers must fit in RAM. The DMA engines themselves have 32b counters so can do much more than RAM (i.e. if you're sending the same value somewhere periodically and not increasing a read or write address).

johnofleek Mar 8, 2023
Author

Would you be able to do an experiment and run the same test @ 32b/sample using unmodified code and your waveform generator? It may be a real I2S or AudioBufferManager bug due to startup conditions...

I should have mentioned - I was doing a test with unmodified code when I noticed the start up issue / bug. The problem occurs with standard and modified I2S/ pio code

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I2S - support for 64 bit setBitsPerSample() -- TLV320ADC5140 #1253

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I2S - support for 64 bit setBitsPerSample() -- TLV320ADC5140 #1253

johnofleek Mar 3, 2023

Replies: 4 comments · 9 replies

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