diff --git a/.gitignore b/.gitignore index af6c64087..ec3c5d0b8 100644 --- a/.gitignore +++ b/.gitignore @@ -14,6 +14,7 @@ macrocell.list default.cvcrc *.log *.tar.gz +abc.history # Python cache **/__pycache__ diff --git a/tests/1007/.gitignore b/tests/1007-buffer_insertion/.gitignore similarity index 100% rename from tests/1007/.gitignore rename to tests/1007-buffer_insertion/.gitignore diff --git a/tests/1007/config.tcl b/tests/1007-buffer_insertion/config.tcl similarity index 100% rename from tests/1007/config.tcl rename to tests/1007-buffer_insertion/config.tcl diff --git a/tests/1007/hooks/post_run.py b/tests/1007-buffer_insertion/hooks/post_run.py similarity index 100% rename from tests/1007/hooks/post_run.py rename to tests/1007-buffer_insertion/hooks/post_run.py diff --git a/tests/1007/in.def b/tests/1007-buffer_insertion/in.def similarity index 100% rename from tests/1007/in.def rename to tests/1007-buffer_insertion/in.def diff --git a/tests/1007/interactive.tcl b/tests/1007-buffer_insertion/interactive.tcl similarity index 100% rename from tests/1007/interactive.tcl rename to tests/1007-buffer_insertion/interactive.tcl diff --git a/tests/1413/.gitignore b/tests/1413-odb_remover/.gitignore similarity index 100% rename from tests/1413/.gitignore rename to tests/1413-odb_remover/.gitignore diff --git a/tests/1413/config.tcl b/tests/1413-odb_remover/config.tcl similarity index 100% rename from tests/1413/config.tcl rename to tests/1413-odb_remover/config.tcl diff --git a/tests/1413/hooks/post_run.py b/tests/1413-odb_remover/hooks/post_run.py similarity index 100% rename from tests/1413/hooks/post_run.py rename to tests/1413-odb_remover/hooks/post_run.py diff --git a/tests/1413-odb_remover/in.def b/tests/1413-odb_remover/in.def new file mode 120000 index 000000000..72f295b9b --- /dev/null +++ b/tests/1413-odb_remover/in.def @@ -0,0 +1 @@ +../1007-buffer_insertion/in.def \ No newline at end of file diff --git a/tests/1413-odb_remover/interactive.tcl b/tests/1413-odb_remover/interactive.tcl new file mode 100644 index 000000000..7b1d98018 --- /dev/null +++ b/tests/1413-odb_remover/interactive.tcl @@ -0,0 +1,24 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +try_catch echo { + read_lef $::env(MERGED_LEF) + read_def $::env(DESIGN_DIR)/in.def + write_db $::env(DESIGN_DIR)/in.odb + } | openroad -exit + + set ::env(CURRENT_ODB) $::env(DESIGN_DIR)/in.odb + + set save_odb $::env(DESIGN_DIR)/out.odb + + # Remove pins first: nets cannot be removed if they are associated with a pin + remove_components -input $::env(CURRENT_ODB) -output $save_odb + remove_pins -input $save_odb + remove_nets -rx {^in$} -input $save_odb + + set ::env(CURRENT_ODB) $save_odb + + try_catch $::env(OPENROAD_BIN) -exit -no_init -python $::env(DESIGN_DIR)/hooks/post_run.py + + puts_info "Done." \ No newline at end of file diff --git a/tests/1413/in.def b/tests/1413/in.def deleted file mode 120000 index aee5f17cd..000000000 --- a/tests/1413/in.def +++ /dev/null @@ -1 +0,0 @@ -../1007/in.def \ No newline at end of file diff --git a/tests/1413/interactive.tcl b/tests/1413/interactive.tcl deleted file mode 100644 index 6e14b4a5d..000000000 --- a/tests/1413/interactive.tcl +++ /dev/null @@ -1,24 +0,0 @@ -package require openlane; - -prep -design $::env(TEST_DIR) {*}$argv - -try_catch echo { - read_lef $::env(MERGED_LEF) - read_def $::env(DESIGN_DIR)/../1413/in.def - write_db $::env(DESIGN_DIR)/in.odb -} | openroad -exit - -set ::env(CURRENT_ODB) $::env(DESIGN_DIR)/in.odb - -set save_odb $::env(DESIGN_DIR)/out.odb - -# Remove pins first: nets cannot be removed if they are associated with a pin -remove_components -input $::env(CURRENT_ODB) -output $save_odb -remove_pins -input $save_odb -remove_nets -rx {^in$} -input $save_odb - -set ::env(CURRENT_ODB) $save_odb - -try_catch $::env(OPENROAD_BIN) -exit -no_init -python $::env(DESIGN_DIR)/hooks/post_run.py - -puts_info "Done." \ No newline at end of file diff --git a/tests/1506/config.json b/tests/1506-config_preprocessor/config.json similarity index 91% rename from tests/1506/config.json rename to tests/1506-config_preprocessor/config.json index f205274c1..1c1490124 100644 --- a/tests/1506/config.json +++ b/tests/1506-config_preprocessor/config.json @@ -17,7 +17,7 @@ "TEST_FLOAT_CALC": "expr::2 * $CLOCK_PERIOD", "TEST_MALICIOUS_VAR_0": "\t\\};puts hi;[puts hi];{\"\"\"''''", "TEST_MALICIOUS_VAR_1": "\n\nputs hi;\n\n\u0010potato\n", - "TEST_INTERNAL_GLOB": "dir::../1506/src/*", + "TEST_INTERNAL_GLOB": "dir::../1506-config_preprocessor/src/*", "TEST_EXTERNAL_GLOB": "dir::../*", "TEST_REGEX": "x\\.y" } \ No newline at end of file diff --git a/tests/1506/hooks/post_run.py b/tests/1506-config_preprocessor/hooks/post_run.py similarity index 100% rename from tests/1506/hooks/post_run.py rename to tests/1506-config_preprocessor/hooks/post_run.py diff --git a/tests/1506/interactive.tcl b/tests/1506-config_preprocessor/interactive.tcl similarity index 100% rename from tests/1506/interactive.tcl rename to tests/1506-config_preprocessor/interactive.tcl diff --git a/tests/1506/src/inverter.v b/tests/1506-config_preprocessor/src/inverter.v similarity index 100% rename from tests/1506/src/inverter.v rename to tests/1506-config_preprocessor/src/inverter.v diff --git a/tests/2038-drc_bad/config.json b/tests/2038-drc_bad/config.json new file mode 100644 index 000000000..565a42970 --- /dev/null +++ b/tests/2038-drc_bad/config.json @@ -0,0 +1,16 @@ +{ + "DESIGN_NAME": "inverter", + "VERILOG_FILES": [], + "RUN_CTS": false, + "CLOCK_PORT": null, + "PL_RANDOM_GLB_PLACEMENT": true, + "FP_SIZING": "absolute", + "DIE_AREA": "0 0 34.5 57.12", + "PL_TARGET_DENSITY": 0.75, + "FP_PDN_AUTO_ADJUST": false, + "FP_PDN_VPITCH": 25, + "FP_PDN_HPITCH": 25, + "FP_PDN_VOFFSET": 5, + "FP_PDN_HOFFSET": 5, + "DIODE_INSERTION_STRATEGY": 3 +} \ No newline at end of file diff --git a/tests/2038-drc_bad/interactive.tcl b/tests/2038-drc_bad/interactive.tcl new file mode 100644 index 000000000..7fe180f97 --- /dev/null +++ b/tests/2038-drc_bad/interactive.tcl @@ -0,0 +1,7 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +set ::env(CURRENT_GDS) $::env(TEST_DIR)/inverter.gds + +run_magic_drc \ No newline at end of file diff --git a/tests/2038-drc_bad/inverter.gds b/tests/2038-drc_bad/inverter.gds new file mode 100644 index 000000000..3ae4f3fa2 Binary files /dev/null and b/tests/2038-drc_bad/inverter.gds differ diff --git a/tests/2038-drc_bad/issue_regression.py b/tests/2038-drc_bad/issue_regression.py new file mode 100644 index 000000000..83dce4acb --- /dev/null +++ b/tests/2038-drc_bad/issue_regression.py @@ -0,0 +1,21 @@ +import os +import subprocess +import sys + +args = sys.argv[1:] + +run_folder = args[0] + +log_path = os.path.join(run_folder, "openlane.log") + +assert ( + subprocess.call( + ["grep", "-i", "There are violations in the design after Magic DRC", log_path] + ) + == 0 +), "OpenLane does not accurately report the existence of violations" + +assert ( + subprocess.call(["grep", "-Pi", "Total Number of violations is \\d+", log_path]) + == 0 +), "OpenLane does not accurately print the number of violations" diff --git a/tests/2038-drc_good/config.json b/tests/2038-drc_good/config.json new file mode 100644 index 000000000..565a42970 --- /dev/null +++ b/tests/2038-drc_good/config.json @@ -0,0 +1,16 @@ +{ + "DESIGN_NAME": "inverter", + "VERILOG_FILES": [], + "RUN_CTS": false, + "CLOCK_PORT": null, + "PL_RANDOM_GLB_PLACEMENT": true, + "FP_SIZING": "absolute", + "DIE_AREA": "0 0 34.5 57.12", + "PL_TARGET_DENSITY": 0.75, + "FP_PDN_AUTO_ADJUST": false, + "FP_PDN_VPITCH": 25, + "FP_PDN_HPITCH": 25, + "FP_PDN_VOFFSET": 5, + "FP_PDN_HOFFSET": 5, + "DIODE_INSERTION_STRATEGY": 3 +} \ No newline at end of file diff --git a/tests/2038-drc_good/interactive.tcl b/tests/2038-drc_good/interactive.tcl new file mode 100644 index 000000000..7fe180f97 --- /dev/null +++ b/tests/2038-drc_good/interactive.tcl @@ -0,0 +1,7 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +set ::env(CURRENT_GDS) $::env(TEST_DIR)/inverter.gds + +run_magic_drc \ No newline at end of file diff --git a/tests/2038-drc_good/inverter.gds b/tests/2038-drc_good/inverter.gds new file mode 100644 index 000000000..649e49123 Binary files /dev/null and b/tests/2038-drc_good/inverter.gds differ diff --git a/tests/2038-drc_good/issue_regression.py b/tests/2038-drc_good/issue_regression.py new file mode 100644 index 000000000..50d742465 --- /dev/null +++ b/tests/2038-drc_good/issue_regression.py @@ -0,0 +1,15 @@ +import os +import subprocess +import sys + +args = sys.argv[1:] + +run_folder = args[0] + +log_path = os.path.join(run_folder, "openlane.log") +assert ( + subprocess.call( + ["grep", "-i", "No DRC violations after GDS streaming out", log_path] + ) + == 0 +), "OpenLane did not report the lack of DRC violations properly" diff --git a/tests/2038-lvs_bad/config.json b/tests/2038-lvs_bad/config.json new file mode 100644 index 000000000..565a42970 --- /dev/null +++ b/tests/2038-lvs_bad/config.json @@ -0,0 +1,16 @@ +{ + "DESIGN_NAME": "inverter", + "VERILOG_FILES": [], + "RUN_CTS": false, + "CLOCK_PORT": null, + "PL_RANDOM_GLB_PLACEMENT": true, + "FP_SIZING": "absolute", + "DIE_AREA": "0 0 34.5 57.12", + "PL_TARGET_DENSITY": 0.75, + "FP_PDN_AUTO_ADJUST": false, + "FP_PDN_VPITCH": 25, + "FP_PDN_HPITCH": 25, + "FP_PDN_VOFFSET": 5, + "FP_PDN_HOFFSET": 5, + "DIODE_INSERTION_STRATEGY": 3 +} \ No newline at end of file diff --git a/tests/2038-lvs_bad/interactive.tcl b/tests/2038-lvs_bad/interactive.tcl new file mode 100644 index 000000000..1835897cf --- /dev/null +++ b/tests/2038-lvs_bad/interactive.tcl @@ -0,0 +1,11 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +set ::env(CURRENT_DEF) $::env(TEST_DIR)/inverter.def +set ::env(CURRENT_GDS) $::env(TEST_DIR)/inverter.gds +set ::env(CURRENT_POWERED_NETLIST) $::env(TEST_DIR)/inverter.pnl.v + +set ::env(MAGIC_EXT_USE_GDS) 1 +run_magic_spice_export +run_lvs \ No newline at end of file diff --git a/tests/2038-lvs_bad/inverter.def b/tests/2038-lvs_bad/inverter.def new file mode 100644 index 000000000..2096c7962 --- /dev/null +++ b/tests/2038-lvs_bad/inverter.def @@ -0,0 +1,246 @@ +VERSION 5.8 ; +DIVIDERCHAR "/" ; +BUSBITCHARS "[]" ; +DESIGN inverter ; +UNITS DISTANCE MICRONS 1000 ; +DIEAREA ( 0 0 ) ( 50000 50000 ) ; +ROW ROW_0 unithd 5520 10880 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_1 unithd 5520 13600 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_2 unithd 5520 16320 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_3 unithd 5520 19040 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_4 unithd 5520 21760 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_5 unithd 5520 24480 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_6 unithd 5520 27200 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_7 unithd 5520 29920 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_8 unithd 5520 32640 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_9 unithd 5520 35360 FS DO 84 BY 1 STEP 460 0 ; +TRACKS X 230 DO 109 STEP 460 LAYER li1 ; +TRACKS Y 170 DO 147 STEP 340 LAYER li1 ; +TRACKS X 170 DO 147 STEP 340 LAYER met1 ; +TRACKS Y 170 DO 147 STEP 340 LAYER met1 ; +TRACKS X 230 DO 109 STEP 460 LAYER met2 ; +TRACKS Y 230 DO 109 STEP 460 LAYER met2 ; +TRACKS X 340 DO 73 STEP 680 LAYER met3 ; +TRACKS Y 340 DO 73 STEP 680 LAYER met3 ; +TRACKS X 460 DO 54 STEP 920 LAYER met4 ; +TRACKS Y 460 DO 54 STEP 920 LAYER met4 ; +TRACKS X 1700 DO 14 STEP 3400 LAYER met5 ; +TRACKS Y 1700 DO 14 STEP 3400 LAYER met5 ; +GCELLGRID X 0 DO 7 STEP 6900 ; +GCELLGRID Y 0 DO 7 STEP 6900 ; +VIAS 4 ; + - via2_3_1600_480_1_5_320_320 + VIARULE M1M2_PR + CUTSIZE 150 150 + LAYERS met1 via met2 + CUTSPACING 170 170 + ENCLOSURE 85 165 55 85 + ROWCOL 1 5 ; + - via3_4_1600_480_1_4_400_400 + VIARULE M2M3_PR + CUTSIZE 200 200 + LAYERS met2 via2 met3 + CUTSPACING 200 200 + ENCLOSURE 40 85 65 65 + ROWCOL 1 4 ; + - via4_5_1600_480_1_4_400_400 + VIARULE M3M4_PR + CUTSIZE 200 200 + LAYERS met3 via3 met4 + CUTSPACING 200 200 + ENCLOSURE 90 60 100 65 + ROWCOL 1 4 ; + - via5_6_1600_1600_1_1_1600_1600 + VIARULE M4M5_PR + CUTSIZE 800 800 + LAYERS met4 via4 met5 + CUTSPACING 800 800 + ENCLOSURE 400 190 310 400 ; +END VIAS +COMPONENTS 33 ; + - PHY_EDGE_ROW_0_Left_10 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 10880 ) N ; + - PHY_EDGE_ROW_0_Right_0 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 10880 ) FN ; + - PHY_EDGE_ROW_1_Left_11 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 13600 ) FS ; + - PHY_EDGE_ROW_1_Right_1 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 13600 ) S ; + - PHY_EDGE_ROW_2_Left_12 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 16320 ) N ; + - PHY_EDGE_ROW_2_Right_2 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 16320 ) FN ; + - PHY_EDGE_ROW_3_Left_13 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 19040 ) FS ; + - PHY_EDGE_ROW_3_Right_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 19040 ) S ; + - PHY_EDGE_ROW_4_Left_14 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 21760 ) N ; + - PHY_EDGE_ROW_4_Right_4 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 21760 ) FN ; + - PHY_EDGE_ROW_5_Left_15 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 24480 ) FS ; + - PHY_EDGE_ROW_5_Right_5 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 24480 ) S ; + - PHY_EDGE_ROW_6_Left_16 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 27200 ) N ; + - PHY_EDGE_ROW_6_Right_6 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 27200 ) FN ; + - PHY_EDGE_ROW_7_Left_17 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 29920 ) FS ; + - PHY_EDGE_ROW_7_Right_7 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 29920 ) S ; + - PHY_EDGE_ROW_8_Left_18 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 32640 ) N ; + - PHY_EDGE_ROW_8_Right_8 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 32640 ) FN ; + - PHY_EDGE_ROW_9_Left_19 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 35360 ) FS ; + - PHY_EDGE_ROW_9_Right_9 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 35360 ) S ; + - TAP_TAPCELL_ROW_0_20 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 10880 ) N ; + - TAP_TAPCELL_ROW_0_21 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 10880 ) N ; + - TAP_TAPCELL_ROW_1_22 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 13600 ) FS ; + - TAP_TAPCELL_ROW_2_23 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 16320 ) N ; + - TAP_TAPCELL_ROW_3_24 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 19040 ) FS ; + - TAP_TAPCELL_ROW_4_25 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 21760 ) N ; + - TAP_TAPCELL_ROW_5_26 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 24480 ) FS ; + - TAP_TAPCELL_ROW_6_27 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 27200 ) N ; + - TAP_TAPCELL_ROW_7_28 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 29920 ) FS ; + - TAP_TAPCELL_ROW_8_29 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 32640 ) N ; + - TAP_TAPCELL_ROW_9_30 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 35360 ) FS ; + - TAP_TAPCELL_ROW_9_31 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 35360 ) FS ; + - _0_ sky130_fd_sc_hd__inv_2 + PLACED ( 40020 24480 ) S ; +END COMPONENTS +PINS 4 ; + - VGND + NET VGND + SPECIAL + DIRECTION INOUT + USE GROUND + + PORT + + LAYER met5 ( -19560 -800 ) ( 19560 800 ) + + LAYER met4 ( 13180 -8540 ) ( 14780 19140 ) + + LAYER met4 ( -11820 -8540 ) ( -10220 19140 ) + + FIXED ( 24840 19180 ) N ; + - VPWR + NET VPWR + SPECIAL + DIRECTION INOUT + USE POWER + + PORT + + LAYER met5 ( -19560 -800 ) ( 19560 800 ) + + LAYER met4 ( 9880 -5240 ) ( 11480 22440 ) + + LAYER met4 ( -15120 -5240 ) ( -13520 22440 ) + + FIXED ( 24840 15880 ) N ; + - in + NET in + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met3 ( -2000 -300 ) ( 2000 300 ) + + PLACED ( 48000 27540 ) N ; + - out + NET out + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met3 ( -2000 -300 ) ( 2000 300 ) + + PLACED ( 48000 24140 ) N ; +END PINS +SPECIALNETS 2 ; + - VGND ( PIN VGND ) ( * VNB ) ( * VGND ) + USE GROUND + + ROUTED met1 480 + SHAPE FOLLOWPIN ( 5520 38080 ) ( 44160 38080 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 32640 ) ( 44160 32640 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 27200 ) ( 44160 27200 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 21760 ) ( 44160 21760 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 16320 ) ( 44160 16320 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 10880 ) ( 44160 10880 ) + NEW met5 1600 + SHAPE STRIPE ( 5280 19180 ) ( 44400 19180 ) + NEW met4 1600 + SHAPE STRIPE ( 38820 10640 ) ( 38820 38320 ) + NEW met4 1600 + SHAPE STRIPE ( 13820 10640 ) ( 13820 38320 ) + NEW met4 0 + SHAPE STRIPE ( 38820 19180 ) via5_6_1600_1600_1_1_1600_1600 + NEW met4 0 + SHAPE STRIPE ( 13820 19180 ) via5_6_1600_1600_1_1_1600_1600 + NEW met3 330 + SHAPE STRIPE ( 38030 38080 ) ( 39610 38080 ) + NEW met3 0 + SHAPE STRIPE ( 38820 38080 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 38080 ) ( 39590 38080 ) + NEW met2 0 + SHAPE STRIPE ( 38820 38080 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 38080 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 32640 ) ( 39610 32640 ) + NEW met3 0 + SHAPE STRIPE ( 38820 32640 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 32640 ) ( 39590 32640 ) + NEW met2 0 + SHAPE STRIPE ( 38820 32640 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 32640 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 27200 ) ( 39610 27200 ) + NEW met3 0 + SHAPE STRIPE ( 38820 27200 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 27200 ) ( 39590 27200 ) + NEW met2 0 + SHAPE STRIPE ( 38820 27200 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 27200 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 21760 ) ( 39610 21760 ) + NEW met3 0 + SHAPE STRIPE ( 38820 21760 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 21760 ) ( 39590 21760 ) + NEW met2 0 + SHAPE STRIPE ( 38820 21760 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 21760 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 16320 ) ( 39610 16320 ) + NEW met3 0 + SHAPE STRIPE ( 38820 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 16320 ) ( 39590 16320 ) + NEW met2 0 + SHAPE STRIPE ( 38820 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 10880 ) ( 39610 10880 ) + NEW met3 0 + SHAPE STRIPE ( 38820 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 10880 ) ( 39590 10880 ) + NEW met2 0 + SHAPE STRIPE ( 38820 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 10880 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 38080 ) ( 14610 38080 ) + NEW met3 0 + SHAPE STRIPE ( 13820 38080 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 38080 ) ( 14590 38080 ) + NEW met2 0 + SHAPE STRIPE ( 13820 38080 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 38080 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 32640 ) ( 14610 32640 ) + NEW met3 0 + SHAPE STRIPE ( 13820 32640 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 32640 ) ( 14590 32640 ) + NEW met2 0 + SHAPE STRIPE ( 13820 32640 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 32640 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 27200 ) ( 14610 27200 ) + NEW met3 0 + SHAPE STRIPE ( 13820 27200 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 27200 ) ( 14590 27200 ) + NEW met2 0 + SHAPE STRIPE ( 13820 27200 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 27200 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 21760 ) ( 14610 21760 ) + NEW met3 0 + SHAPE STRIPE ( 13820 21760 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 21760 ) ( 14590 21760 ) + NEW met2 0 + SHAPE STRIPE ( 13820 21760 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 21760 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 16320 ) ( 14610 16320 ) + NEW met3 0 + SHAPE STRIPE ( 13820 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 16320 ) ( 14590 16320 ) + NEW met2 0 + SHAPE STRIPE ( 13820 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 10880 ) ( 14610 10880 ) + NEW met3 0 + SHAPE STRIPE ( 13820 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 10880 ) ( 14590 10880 ) + NEW met2 0 + SHAPE STRIPE ( 13820 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 10880 ) via2_3_1600_480_1_5_320_320 ; + - VPWR ( PIN VPWR ) ( * VPB ) ( * VPWR ) + USE POWER + + ROUTED met1 480 + SHAPE FOLLOWPIN ( 5520 35360 ) ( 44160 35360 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 29920 ) ( 44160 29920 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 24480 ) ( 44160 24480 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 19040 ) ( 44160 19040 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 13600 ) ( 44160 13600 ) + NEW met5 1600 + SHAPE STRIPE ( 5280 15880 ) ( 44400 15880 ) + NEW met4 1600 + SHAPE STRIPE ( 35520 10640 ) ( 35520 38320 ) + NEW met4 1600 + SHAPE STRIPE ( 10520 10640 ) ( 10520 38320 ) + NEW met4 0 + SHAPE STRIPE ( 35520 15880 ) via5_6_1600_1600_1_1_1600_1600 + NEW met4 0 + SHAPE STRIPE ( 10520 15880 ) via5_6_1600_1600_1_1_1600_1600 + NEW met3 330 + SHAPE STRIPE ( 34730 35360 ) ( 36310 35360 ) + NEW met3 0 + SHAPE STRIPE ( 35520 35360 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 35360 ) ( 36290 35360 ) + NEW met2 0 + SHAPE STRIPE ( 35520 35360 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 35360 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 29920 ) ( 36310 29920 ) + NEW met3 0 + SHAPE STRIPE ( 35520 29920 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 29920 ) ( 36290 29920 ) + NEW met2 0 + SHAPE STRIPE ( 35520 29920 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 29920 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 24480 ) ( 36310 24480 ) + NEW met3 0 + SHAPE STRIPE ( 35520 24480 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 24480 ) ( 36290 24480 ) + NEW met2 0 + SHAPE STRIPE ( 35520 24480 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 24480 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 19040 ) ( 36310 19040 ) + NEW met3 0 + SHAPE STRIPE ( 35520 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 19040 ) ( 36290 19040 ) + NEW met2 0 + SHAPE STRIPE ( 35520 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 13600 ) ( 36310 13600 ) + NEW met3 0 + SHAPE STRIPE ( 35520 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 13600 ) ( 36290 13600 ) + NEW met2 0 + SHAPE STRIPE ( 35520 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 13600 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 35360 ) ( 11310 35360 ) + NEW met3 0 + SHAPE STRIPE ( 10520 35360 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 35360 ) ( 11290 35360 ) + NEW met2 0 + SHAPE STRIPE ( 10520 35360 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 35360 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 29920 ) ( 11310 29920 ) + NEW met3 0 + SHAPE STRIPE ( 10520 29920 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 29920 ) ( 11290 29920 ) + NEW met2 0 + SHAPE STRIPE ( 10520 29920 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 29920 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 24480 ) ( 11310 24480 ) + NEW met3 0 + SHAPE STRIPE ( 10520 24480 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 24480 ) ( 11290 24480 ) + NEW met2 0 + SHAPE STRIPE ( 10520 24480 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 24480 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 19040 ) ( 11310 19040 ) + NEW met3 0 + SHAPE STRIPE ( 10520 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 19040 ) ( 11290 19040 ) + NEW met2 0 + SHAPE STRIPE ( 10520 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 13600 ) ( 11310 13600 ) + NEW met3 0 + SHAPE STRIPE ( 10520 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 13600 ) ( 11290 13600 ) + NEW met2 0 + SHAPE STRIPE ( 10520 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 13600 ) via2_3_1600_480_1_5_320_320 ; +END SPECIALNETS +NETS 2 ; + - in ( PIN in ) ( _0_ A ) + USE SIGNAL + + ROUTED met1 ( 41170 26010 ) ( 43930 * ) + NEW met1 ( 43930 26010 ) ( * 26690 ) + NEW met2 ( 43930 26690 ) ( * 27540 ) + NEW met3 ( 43930 27540 ) ( 46460 * 0 ) + NEW li1 ( 41170 26010 ) L1M1_PR_MR + NEW met1 ( 43930 26690 ) M1M2_PR + NEW met2 ( 43930 27540 ) M2M3_PR ; + - out ( PIN out ) ( _0_ Y ) + USE SIGNAL + + ROUTED met1 ( 40710 24990 ) ( 43470 * ) + NEW met2 ( 43470 24140 ) ( * 24990 ) + NEW met3 ( 43470 24140 ) ( 46460 * 0 ) + NEW li1 ( 40710 24990 ) L1M1_PR_MR + NEW met1 ( 43470 24990 ) M1M2_PR + NEW met2 ( 43470 24140 ) M2M3_PR ; +END NETS +END DESIGN diff --git a/tests/2038-lvs_bad/inverter.gds b/tests/2038-lvs_bad/inverter.gds new file mode 100644 index 000000000..d0a5a7fe8 Binary files /dev/null and b/tests/2038-lvs_bad/inverter.gds differ diff --git a/tests/2038-lvs_bad/inverter.pnl.v b/tests/2038-lvs_bad/inverter.pnl.v new file mode 100644 index 000000000..37784115d --- /dev/null +++ b/tests/2038-lvs_bad/inverter.pnl.v @@ -0,0 +1,121 @@ +module inverter (in, + out, + VPWR, + VGND); + input in; + output out; + input VPWR; + input VGND; + + + sky130_fd_sc_hd__inv_2 _0_ (.A(in), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .Y(out)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_0_Right_0 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_1_Right_1 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_2_Right_2 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_3_Right_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_4_Right_4 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_5_Right_5 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_6_Right_6 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_7_Right_7 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_8_Right_8 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_9_Right_9 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_0_Left_10 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_1_Left_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_2_Left_12 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_3_Left_13 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_4_Left_14 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_5_Left_15 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_6_Left_16 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_7_Left_17 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_8_Left_18 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_9_Left_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_0_20 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_0_21 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_1_22 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_2_23 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_3_24 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_4_25 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_5_26 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_6_27 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_7_28 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_8_29 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_9_30 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_9_31 (.VGND(VGND), + .VPWR(VPWR)); +endmodule diff --git a/tests/2038-lvs_bad/issue_regression.py b/tests/2038-lvs_bad/issue_regression.py new file mode 100644 index 000000000..7b2ff0ad2 --- /dev/null +++ b/tests/2038-lvs_bad/issue_regression.py @@ -0,0 +1,12 @@ +import os +import subprocess +import sys + +args = sys.argv[1:] + +run_folder = args[0] + +log_path = os.path.join(run_folder, "openlane.log") +assert ( + subprocess.call(["grep", "-i", "There are LVS errors in the design", log_path]) == 0 +), "OpenLane did not report the existence of LVS errors correctly" diff --git a/tests/2038-lvs_bad_lefdef/config.json b/tests/2038-lvs_bad_lefdef/config.json new file mode 120000 index 000000000..36db892e6 --- /dev/null +++ b/tests/2038-lvs_bad_lefdef/config.json @@ -0,0 +1 @@ +../2038-lvs_bad/config.json \ No newline at end of file diff --git a/tests/2038-lvs_bad_lefdef/interactive.tcl b/tests/2038-lvs_bad_lefdef/interactive.tcl new file mode 100644 index 000000000..12fc6b916 --- /dev/null +++ b/tests/2038-lvs_bad_lefdef/interactive.tcl @@ -0,0 +1,10 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +set ::env(CURRENT_DEF) $::env(TEST_DIR)/inverter.def +set ::env(CURRENT_GDS) $::env(TEST_DIR)/inverter.gds +set ::env(CURRENT_POWERED_NETLIST) $::env(TEST_DIR)/inverter.pnl.v + +run_magic_spice_export +run_lvs \ No newline at end of file diff --git a/tests/2038-lvs_bad_lefdef/inverter.def b/tests/2038-lvs_bad_lefdef/inverter.def new file mode 120000 index 000000000..2f730db68 --- /dev/null +++ b/tests/2038-lvs_bad_lefdef/inverter.def @@ -0,0 +1 @@ +../2038-lvs_bad/inverter.def \ No newline at end of file diff --git a/tests/2038-lvs_bad_lefdef/inverter.gds b/tests/2038-lvs_bad_lefdef/inverter.gds new file mode 120000 index 000000000..1ad6350da --- /dev/null +++ b/tests/2038-lvs_bad_lefdef/inverter.gds @@ -0,0 +1 @@ +../2038-lvs_bad/inverter.gds \ No newline at end of file diff --git a/tests/2038-lvs_bad_lefdef/inverter.pnl.v b/tests/2038-lvs_bad_lefdef/inverter.pnl.v new file mode 120000 index 000000000..f48e560b6 --- /dev/null +++ b/tests/2038-lvs_bad_lefdef/inverter.pnl.v @@ -0,0 +1 @@ +../2038-lvs_bad/inverter.pnl.v \ No newline at end of file diff --git a/tests/2038-lvs_bad_lefdef/issue_regression.py b/tests/2038-lvs_bad_lefdef/issue_regression.py new file mode 120000 index 000000000..3f1613dcf --- /dev/null +++ b/tests/2038-lvs_bad_lefdef/issue_regression.py @@ -0,0 +1 @@ +../2038-lvs_bad/issue_regression.py \ No newline at end of file diff --git a/tests/2038-lvs_good/config.json b/tests/2038-lvs_good/config.json new file mode 100644 index 000000000..565a42970 --- /dev/null +++ b/tests/2038-lvs_good/config.json @@ -0,0 +1,16 @@ +{ + "DESIGN_NAME": "inverter", + "VERILOG_FILES": [], + "RUN_CTS": false, + "CLOCK_PORT": null, + "PL_RANDOM_GLB_PLACEMENT": true, + "FP_SIZING": "absolute", + "DIE_AREA": "0 0 34.5 57.12", + "PL_TARGET_DENSITY": 0.75, + "FP_PDN_AUTO_ADJUST": false, + "FP_PDN_VPITCH": 25, + "FP_PDN_HPITCH": 25, + "FP_PDN_VOFFSET": 5, + "FP_PDN_HOFFSET": 5, + "DIODE_INSERTION_STRATEGY": 3 +} \ No newline at end of file diff --git a/tests/2038-lvs_good/interactive.tcl b/tests/2038-lvs_good/interactive.tcl new file mode 100644 index 000000000..1835897cf --- /dev/null +++ b/tests/2038-lvs_good/interactive.tcl @@ -0,0 +1,11 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +set ::env(CURRENT_DEF) $::env(TEST_DIR)/inverter.def +set ::env(CURRENT_GDS) $::env(TEST_DIR)/inverter.gds +set ::env(CURRENT_POWERED_NETLIST) $::env(TEST_DIR)/inverter.pnl.v + +set ::env(MAGIC_EXT_USE_GDS) 1 +run_magic_spice_export +run_lvs \ No newline at end of file diff --git a/tests/2038-lvs_good/inverter.def b/tests/2038-lvs_good/inverter.def new file mode 100644 index 000000000..f3eb48349 --- /dev/null +++ b/tests/2038-lvs_good/inverter.def @@ -0,0 +1,357 @@ +VERSION 5.8 ; +DIVIDERCHAR "/" ; +BUSBITCHARS "[]" ; +DESIGN inverter ; +UNITS DISTANCE MICRONS 1000 ; +DIEAREA ( 0 0 ) ( 50000 50000 ) ; +ROW ROW_0 unithd 5520 10880 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_1 unithd 5520 13600 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_2 unithd 5520 16320 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_3 unithd 5520 19040 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_4 unithd 5520 21760 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_5 unithd 5520 24480 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_6 unithd 5520 27200 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_7 unithd 5520 29920 FS DO 84 BY 1 STEP 460 0 ; +ROW ROW_8 unithd 5520 32640 N DO 84 BY 1 STEP 460 0 ; +ROW ROW_9 unithd 5520 35360 FS DO 84 BY 1 STEP 460 0 ; +TRACKS X 230 DO 109 STEP 460 LAYER li1 ; +TRACKS Y 170 DO 147 STEP 340 LAYER li1 ; +TRACKS X 170 DO 147 STEP 340 LAYER met1 ; +TRACKS Y 170 DO 147 STEP 340 LAYER met1 ; +TRACKS X 230 DO 109 STEP 460 LAYER met2 ; +TRACKS Y 230 DO 109 STEP 460 LAYER met2 ; +TRACKS X 340 DO 73 STEP 680 LAYER met3 ; +TRACKS Y 340 DO 73 STEP 680 LAYER met3 ; +TRACKS X 460 DO 54 STEP 920 LAYER met4 ; +TRACKS Y 460 DO 54 STEP 920 LAYER met4 ; +TRACKS X 1700 DO 14 STEP 3400 LAYER met5 ; +TRACKS Y 1700 DO 14 STEP 3400 LAYER met5 ; +GCELLGRID X 0 DO 7 STEP 6900 ; +GCELLGRID Y 0 DO 7 STEP 6900 ; +VIAS 4 ; + - via2_3_1600_480_1_5_320_320 + VIARULE M1M2_PR + CUTSIZE 150 150 + LAYERS met1 via met2 + CUTSPACING 170 170 + ENCLOSURE 85 165 55 85 + ROWCOL 1 5 ; + - via3_4_1600_480_1_4_400_400 + VIARULE M2M3_PR + CUTSIZE 200 200 + LAYERS met2 via2 met3 + CUTSPACING 200 200 + ENCLOSURE 40 85 65 65 + ROWCOL 1 4 ; + - via4_5_1600_480_1_4_400_400 + VIARULE M3M4_PR + CUTSIZE 200 200 + LAYERS met3 via3 met4 + CUTSPACING 200 200 + ENCLOSURE 90 60 100 65 + ROWCOL 1 4 ; + - via5_6_1600_1600_1_1_1600_1600 + VIARULE M4M5_PR + CUTSIZE 800 800 + LAYERS met4 via4 met5 + CUTSPACING 800 800 + ENCLOSURE 400 190 310 400 ; +END VIAS +COMPONENTS 144 ; + - FILLER_0_0_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 10880 ) N ; + - FILLER_0_0_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 10880 ) N ; + - FILLER_0_0_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 17940 10880 ) N ; + - FILLER_0_0_29 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 18860 10880 ) N ; + - FILLER_0_0_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 10880 ) N ; + - FILLER_0_0_37 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 22540 10880 ) N ; + - FILLER_0_0_45 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 26220 10880 ) N ; + - FILLER_0_0_53 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 29900 10880 ) N ; + - FILLER_0_0_57 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 31740 10880 ) N ; + - FILLER_0_0_65 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 35420 10880 ) N ; + - FILLER_0_0_73 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 39100 10880 ) N ; + - FILLER_0_1_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 13600 ) FS ; + - FILLER_0_1_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 13600 ) FS ; + - FILLER_0_1_27 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 17940 13600 ) FS ; + - FILLER_0_1_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 13600 ) FS ; + - FILLER_0_1_35 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 21620 13600 ) FS ; + - FILLER_0_1_43 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 25300 13600 ) FS ; + - FILLER_0_1_51 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 28980 13600 ) FS ; + - FILLER_0_1_55 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 30820 13600 ) FS ; + - FILLER_0_1_57 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 31740 13600 ) FS ; + - FILLER_0_1_65 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 35420 13600 ) FS ; + - FILLER_0_1_73 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 39100 13600 ) FS ; + - FILLER_0_2_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 16320 ) N ; + - FILLER_0_2_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 16320 ) N ; + - FILLER_0_2_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 17940 16320 ) N ; + - FILLER_0_2_29 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 18860 16320 ) N ; + - FILLER_0_2_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 16320 ) N ; + - FILLER_0_2_37 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 22540 16320 ) N ; + - FILLER_0_2_45 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 26220 16320 ) N ; + - FILLER_0_2_53 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 29900 16320 ) N ; + - FILLER_0_2_61 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 33580 16320 ) N ; + - FILLER_0_2_69 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 37260 16320 ) N ; + - FILLER_0_2_77 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 40940 16320 ) N ; + - FILLER_0_3_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 19040 ) FS ; + - FILLER_0_3_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 19040 ) FS ; + - FILLER_0_3_27 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 17940 19040 ) FS ; + - FILLER_0_3_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 19040 ) FS ; + - FILLER_0_3_35 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 21620 19040 ) FS ; + - FILLER_0_3_43 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 25300 19040 ) FS ; + - FILLER_0_3_51 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 28980 19040 ) FS ; + - FILLER_0_3_55 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 30820 19040 ) FS ; + - FILLER_0_3_57 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 31740 19040 ) FS ; + - FILLER_0_3_65 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 35420 19040 ) FS ; + - FILLER_0_3_73 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 39100 19040 ) FS ; + - FILLER_0_4_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 21760 ) N ; + - FILLER_0_4_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 21760 ) N ; + - FILLER_0_4_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 17940 21760 ) N ; + - FILLER_0_4_29 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 18860 21760 ) N ; + - FILLER_0_4_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 21760 ) N ; + - FILLER_0_4_37 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 22540 21760 ) N ; + - FILLER_0_4_45 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 26220 21760 ) N ; + - FILLER_0_4_53 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 29900 21760 ) N ; + - FILLER_0_4_61 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 33580 21760 ) N ; + - FILLER_0_4_69 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 37260 21760 ) N ; + - FILLER_0_4_77 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 40940 21760 ) N ; + - FILLER_0_5_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 24480 ) FS ; + - FILLER_0_5_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 24480 ) FS ; + - FILLER_0_5_27 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 17940 24480 ) FS ; + - FILLER_0_5_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 24480 ) FS ; + - FILLER_0_5_35 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 21620 24480 ) FS ; + - FILLER_0_5_43 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 25300 24480 ) FS ; + - FILLER_0_5_51 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 28980 24480 ) FS ; + - FILLER_0_5_55 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 30820 24480 ) FS ; + - FILLER_0_5_57 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 31740 24480 ) FS ; + - FILLER_0_5_65 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 35420 24480 ) FS ; + - FILLER_0_5_73 sky130_fd_sc_hd__fill_2 + SOURCE DIST + PLACED ( 39100 24480 ) FS ; + - FILLER_0_5_78 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 41400 24480 ) FS ; + - FILLER_0_6_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 27200 ) N ; + - FILLER_0_6_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 27200 ) N ; + - FILLER_0_6_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 17940 27200 ) N ; + - FILLER_0_6_29 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 18860 27200 ) N ; + - FILLER_0_6_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 27200 ) N ; + - FILLER_0_6_37 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 22540 27200 ) N ; + - FILLER_0_6_45 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 26220 27200 ) N ; + - FILLER_0_6_53 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 29900 27200 ) N ; + - FILLER_0_6_61 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 33580 27200 ) N ; + - FILLER_0_6_69 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 37260 27200 ) N ; + - FILLER_0_6_77 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 40940 27200 ) N ; + - FILLER_0_7_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 29920 ) FS ; + - FILLER_0_7_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 29920 ) FS ; + - FILLER_0_7_27 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 17940 29920 ) FS ; + - FILLER_0_7_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 29920 ) FS ; + - FILLER_0_7_35 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 21620 29920 ) FS ; + - FILLER_0_7_43 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 25300 29920 ) FS ; + - FILLER_0_7_51 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 28980 29920 ) FS ; + - FILLER_0_7_55 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 30820 29920 ) FS ; + - FILLER_0_7_57 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 31740 29920 ) FS ; + - FILLER_0_7_65 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 35420 29920 ) FS ; + - FILLER_0_7_73 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 39100 29920 ) FS ; + - FILLER_0_8_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 32640 ) N ; + - FILLER_0_8_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 32640 ) N ; + - FILLER_0_8_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 17940 32640 ) N ; + - FILLER_0_8_29 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 18860 32640 ) N ; + - FILLER_0_8_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 32640 ) N ; + - FILLER_0_8_37 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 22540 32640 ) N ; + - FILLER_0_8_45 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 26220 32640 ) N ; + - FILLER_0_8_53 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 29900 32640 ) N ; + - FILLER_0_8_61 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 33580 32640 ) N ; + - FILLER_0_8_69 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 37260 32640 ) N ; + - FILLER_0_8_77 sky130_fd_sc_hd__decap_4 + SOURCE DIST + PLACED ( 40940 32640 ) N ; + - FILLER_0_9_11 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 10580 35360 ) FS ; + - FILLER_0_9_19 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 14260 35360 ) FS ; + - FILLER_0_9_27 sky130_fd_sc_hd__fill_1 + SOURCE DIST + PLACED ( 17940 35360 ) FS ; + - FILLER_0_9_29 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 18860 35360 ) FS ; + - FILLER_0_9_3 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 6900 35360 ) FS ; + - FILLER_0_9_37 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 22540 35360 ) FS ; + - FILLER_0_9_45 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 26220 35360 ) FS ; + - FILLER_0_9_53 sky130_fd_sc_hd__decap_3 + SOURCE DIST + PLACED ( 29900 35360 ) FS ; + - FILLER_0_9_57 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 31740 35360 ) FS ; + - FILLER_0_9_65 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 35420 35360 ) FS ; + - FILLER_0_9_73 sky130_fd_sc_hd__decap_8 + SOURCE DIST + PLACED ( 39100 35360 ) FS ; + - PHY_EDGE_ROW_0_Left_10 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 10880 ) N ; + - PHY_EDGE_ROW_0_Right_0 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 10880 ) FN ; + - PHY_EDGE_ROW_1_Left_11 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 13600 ) FS ; + - PHY_EDGE_ROW_1_Right_1 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 13600 ) S ; + - PHY_EDGE_ROW_2_Left_12 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 16320 ) N ; + - PHY_EDGE_ROW_2_Right_2 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 16320 ) FN ; + - PHY_EDGE_ROW_3_Left_13 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 19040 ) FS ; + - PHY_EDGE_ROW_3_Right_3 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 19040 ) S ; + - PHY_EDGE_ROW_4_Left_14 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 21760 ) N ; + - PHY_EDGE_ROW_4_Right_4 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 21760 ) FN ; + - PHY_EDGE_ROW_5_Left_15 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 24480 ) FS ; + - PHY_EDGE_ROW_5_Right_5 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 24480 ) S ; + - PHY_EDGE_ROW_6_Left_16 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 27200 ) N ; + - PHY_EDGE_ROW_6_Right_6 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 27200 ) FN ; + - PHY_EDGE_ROW_7_Left_17 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 29920 ) FS ; + - PHY_EDGE_ROW_7_Right_7 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 29920 ) S ; + - PHY_EDGE_ROW_8_Left_18 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 32640 ) N ; + - PHY_EDGE_ROW_8_Right_8 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 32640 ) FN ; + - PHY_EDGE_ROW_9_Left_19 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 5520 35360 ) FS ; + - PHY_EDGE_ROW_9_Right_9 sky130_fd_sc_hd__decap_3 + SOURCE DIST + FIXED ( 42780 35360 ) S ; + - TAP_TAPCELL_ROW_0_20 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 10880 ) N ; + - TAP_TAPCELL_ROW_0_21 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 10880 ) N ; + - TAP_TAPCELL_ROW_1_22 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 13600 ) FS ; + - TAP_TAPCELL_ROW_2_23 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 16320 ) N ; + - TAP_TAPCELL_ROW_3_24 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 19040 ) FS ; + - TAP_TAPCELL_ROW_4_25 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 21760 ) N ; + - TAP_TAPCELL_ROW_5_26 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 24480 ) FS ; + - TAP_TAPCELL_ROW_6_27 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 27200 ) N ; + - TAP_TAPCELL_ROW_7_28 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 29920 ) FS ; + - TAP_TAPCELL_ROW_8_29 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 32640 ) N ; + - TAP_TAPCELL_ROW_9_30 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 18400 35360 ) FS ; + - TAP_TAPCELL_ROW_9_31 sky130_fd_sc_hd__tapvpwrvgnd_1 + SOURCE DIST + FIXED ( 31280 35360 ) FS ; + - _0_ sky130_fd_sc_hd__inv_2 + PLACED ( 40020 24480 ) S ; +END COMPONENTS +PINS 4 ; + - VGND + NET VGND + SPECIAL + DIRECTION INOUT + USE GROUND + + PORT + + LAYER met5 ( -19560 -800 ) ( 19560 800 ) + + LAYER met4 ( 13180 -8540 ) ( 14780 19140 ) + + LAYER met4 ( -11820 -8540 ) ( -10220 19140 ) + + FIXED ( 24840 19180 ) N ; + - VPWR + NET VPWR + SPECIAL + DIRECTION INOUT + USE POWER + + PORT + + LAYER met5 ( -19560 -800 ) ( 19560 800 ) + + LAYER met4 ( 9880 -5240 ) ( 11480 22440 ) + + LAYER met4 ( -15120 -5240 ) ( -13520 22440 ) + + FIXED ( 24840 15880 ) N ; + - in + NET in + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER met3 ( -2000 -300 ) ( 2000 300 ) + + PLACED ( 48000 27540 ) N ; + - out + NET out + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER met3 ( -2000 -300 ) ( 2000 300 ) + + PLACED ( 48000 24140 ) N ; +END PINS +SPECIALNETS 2 ; + - VGND ( PIN VGND ) ( * VNB ) ( * VGND ) + USE GROUND + + ROUTED met1 480 + SHAPE FOLLOWPIN ( 5520 38080 ) ( 44160 38080 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 32640 ) ( 44160 32640 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 27200 ) ( 44160 27200 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 21760 ) ( 44160 21760 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 16320 ) ( 44160 16320 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 10880 ) ( 44160 10880 ) + NEW met5 1600 + SHAPE STRIPE ( 5280 19180 ) ( 44400 19180 ) + NEW met4 1600 + SHAPE STRIPE ( 38820 10640 ) ( 38820 38320 ) + NEW met4 1600 + SHAPE STRIPE ( 13820 10640 ) ( 13820 38320 ) + NEW met4 0 + SHAPE STRIPE ( 38820 19180 ) via5_6_1600_1600_1_1_1600_1600 + NEW met4 0 + SHAPE STRIPE ( 13820 19180 ) via5_6_1600_1600_1_1_1600_1600 + NEW met3 330 + SHAPE STRIPE ( 38030 38080 ) ( 39610 38080 ) + NEW met3 0 + SHAPE STRIPE ( 38820 38080 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 38080 ) ( 39590 38080 ) + NEW met2 0 + SHAPE STRIPE ( 38820 38080 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 38080 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 32640 ) ( 39610 32640 ) + NEW met3 0 + SHAPE STRIPE ( 38820 32640 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 32640 ) ( 39590 32640 ) + NEW met2 0 + SHAPE STRIPE ( 38820 32640 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 32640 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 27200 ) ( 39610 27200 ) + NEW met3 0 + SHAPE STRIPE ( 38820 27200 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 27200 ) ( 39590 27200 ) + NEW met2 0 + SHAPE STRIPE ( 38820 27200 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 27200 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 21760 ) ( 39610 21760 ) + NEW met3 0 + SHAPE STRIPE ( 38820 21760 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 21760 ) ( 39590 21760 ) + NEW met2 0 + SHAPE STRIPE ( 38820 21760 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 21760 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 16320 ) ( 39610 16320 ) + NEW met3 0 + SHAPE STRIPE ( 38820 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 16320 ) ( 39590 16320 ) + NEW met2 0 + SHAPE STRIPE ( 38820 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 38030 10880 ) ( 39610 10880 ) + NEW met3 0 + SHAPE STRIPE ( 38820 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 38050 10880 ) ( 39590 10880 ) + NEW met2 0 + SHAPE STRIPE ( 38820 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 38820 10880 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 38080 ) ( 14610 38080 ) + NEW met3 0 + SHAPE STRIPE ( 13820 38080 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 38080 ) ( 14590 38080 ) + NEW met2 0 + SHAPE STRIPE ( 13820 38080 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 38080 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 32640 ) ( 14610 32640 ) + NEW met3 0 + SHAPE STRIPE ( 13820 32640 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 32640 ) ( 14590 32640 ) + NEW met2 0 + SHAPE STRIPE ( 13820 32640 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 32640 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 27200 ) ( 14610 27200 ) + NEW met3 0 + SHAPE STRIPE ( 13820 27200 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 27200 ) ( 14590 27200 ) + NEW met2 0 + SHAPE STRIPE ( 13820 27200 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 27200 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 21760 ) ( 14610 21760 ) + NEW met3 0 + SHAPE STRIPE ( 13820 21760 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 21760 ) ( 14590 21760 ) + NEW met2 0 + SHAPE STRIPE ( 13820 21760 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 21760 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 16320 ) ( 14610 16320 ) + NEW met3 0 + SHAPE STRIPE ( 13820 16320 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 16320 ) ( 14590 16320 ) + NEW met2 0 + SHAPE STRIPE ( 13820 16320 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 16320 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 13030 10880 ) ( 14610 10880 ) + NEW met3 0 + SHAPE STRIPE ( 13820 10880 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 13050 10880 ) ( 14590 10880 ) + NEW met2 0 + SHAPE STRIPE ( 13820 10880 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 13820 10880 ) via2_3_1600_480_1_5_320_320 ; + - VPWR ( PIN VPWR ) ( * VPB ) ( * VPWR ) + USE POWER + + ROUTED met1 480 + SHAPE FOLLOWPIN ( 5520 35360 ) ( 44160 35360 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 29920 ) ( 44160 29920 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 24480 ) ( 44160 24480 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 19040 ) ( 44160 19040 ) + NEW met1 480 + SHAPE FOLLOWPIN ( 5520 13600 ) ( 44160 13600 ) + NEW met5 1600 + SHAPE STRIPE ( 5280 15880 ) ( 44400 15880 ) + NEW met4 1600 + SHAPE STRIPE ( 35520 10640 ) ( 35520 38320 ) + NEW met4 1600 + SHAPE STRIPE ( 10520 10640 ) ( 10520 38320 ) + NEW met4 0 + SHAPE STRIPE ( 35520 15880 ) via5_6_1600_1600_1_1_1600_1600 + NEW met4 0 + SHAPE STRIPE ( 10520 15880 ) via5_6_1600_1600_1_1_1600_1600 + NEW met3 330 + SHAPE STRIPE ( 34730 35360 ) ( 36310 35360 ) + NEW met3 0 + SHAPE STRIPE ( 35520 35360 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 35360 ) ( 36290 35360 ) + NEW met2 0 + SHAPE STRIPE ( 35520 35360 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 35360 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 29920 ) ( 36310 29920 ) + NEW met3 0 + SHAPE STRIPE ( 35520 29920 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 29920 ) ( 36290 29920 ) + NEW met2 0 + SHAPE STRIPE ( 35520 29920 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 29920 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 24480 ) ( 36310 24480 ) + NEW met3 0 + SHAPE STRIPE ( 35520 24480 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 24480 ) ( 36290 24480 ) + NEW met2 0 + SHAPE STRIPE ( 35520 24480 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 24480 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 19040 ) ( 36310 19040 ) + NEW met3 0 + SHAPE STRIPE ( 35520 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 19040 ) ( 36290 19040 ) + NEW met2 0 + SHAPE STRIPE ( 35520 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 34730 13600 ) ( 36310 13600 ) + NEW met3 0 + SHAPE STRIPE ( 35520 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 34750 13600 ) ( 36290 13600 ) + NEW met2 0 + SHAPE STRIPE ( 35520 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 35520 13600 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 35360 ) ( 11310 35360 ) + NEW met3 0 + SHAPE STRIPE ( 10520 35360 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 35360 ) ( 11290 35360 ) + NEW met2 0 + SHAPE STRIPE ( 10520 35360 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 35360 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 29920 ) ( 11310 29920 ) + NEW met3 0 + SHAPE STRIPE ( 10520 29920 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 29920 ) ( 11290 29920 ) + NEW met2 0 + SHAPE STRIPE ( 10520 29920 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 29920 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 24480 ) ( 11310 24480 ) + NEW met3 0 + SHAPE STRIPE ( 10520 24480 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 24480 ) ( 11290 24480 ) + NEW met2 0 + SHAPE STRIPE ( 10520 24480 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 24480 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 19040 ) ( 11310 19040 ) + NEW met3 0 + SHAPE STRIPE ( 10520 19040 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 19040 ) ( 11290 19040 ) + NEW met2 0 + SHAPE STRIPE ( 10520 19040 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 19040 ) via2_3_1600_480_1_5_320_320 + NEW met3 330 + SHAPE STRIPE ( 9730 13600 ) ( 11310 13600 ) + NEW met3 0 + SHAPE STRIPE ( 10520 13600 ) via4_5_1600_480_1_4_400_400 + NEW met2 370 + SHAPE STRIPE ( 9750 13600 ) ( 11290 13600 ) + NEW met2 0 + SHAPE STRIPE ( 10520 13600 ) via3_4_1600_480_1_4_400_400 + NEW met1 0 + SHAPE STRIPE ( 10520 13600 ) via2_3_1600_480_1_5_320_320 ; +END SPECIALNETS +NETS 2 ; + - in ( PIN in ) ( _0_ A ) + USE SIGNAL + + ROUTED met1 ( 41170 26010 ) ( 43930 * ) + NEW met1 ( 43930 26010 ) ( * 26690 ) + NEW met2 ( 43930 26690 ) ( * 27540 ) + NEW met3 ( 43930 27540 ) ( 46460 * 0 ) + NEW li1 ( 41170 26010 ) L1M1_PR_MR + NEW met1 ( 43930 26690 ) M1M2_PR + NEW met2 ( 43930 27540 ) M2M3_PR ; + - out ( PIN out ) ( _0_ Y ) + USE SIGNAL + + ROUTED met1 ( 40710 24990 ) ( 43470 * ) + NEW met2 ( 43470 24140 ) ( * 24990 ) + NEW met3 ( 43470 24140 ) ( 46460 * 0 ) + NEW li1 ( 40710 24990 ) L1M1_PR_MR + NEW met1 ( 43470 24990 ) M1M2_PR + NEW met2 ( 43470 24140 ) M2M3_PR ; +END NETS +END DESIGN diff --git a/tests/2038-lvs_good/inverter.gds b/tests/2038-lvs_good/inverter.gds new file mode 100644 index 000000000..bf3b3f4ba Binary files /dev/null and b/tests/2038-lvs_good/inverter.gds differ diff --git a/tests/2038-lvs_good/inverter.pnl.v b/tests/2038-lvs_good/inverter.pnl.v new file mode 100644 index 000000000..718b5f421 --- /dev/null +++ b/tests/2038-lvs_good/inverter.pnl.v @@ -0,0 +1,565 @@ +module inverter (in, + out, + VPWR, + VGND); + input in; + output out; + input VPWR; + input VGND; + + + sky130_fd_sc_hd__inv_2 _0_ (.A(in), + .VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR), + .Y(out)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_0_Right_0 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_1_Right_1 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_2_Right_2 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_3_Right_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_4_Right_4 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_5_Right_5 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_6_Right_6 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_7_Right_7 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_8_Right_8 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_9_Right_9 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_0_Left_10 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_1_Left_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_2_Left_12 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_3_Left_13 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_4_Left_14 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_5_Left_15 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_6_Left_16 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_7_Left_17 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_8_Left_18 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 PHY_EDGE_ROW_9_Left_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_0_20 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_0_21 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_1_22 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_2_23 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_3_24 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_4_25 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_5_26 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_6_27 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_7_28 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_8_29 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_9_30 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_TAPCELL_ROW_9_31 (.VGND(VGND), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_0_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_37 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_45 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_0_0_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_65 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_0_73 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_35 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_43 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_1_51 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_1_55 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_65 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_1_73 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_2_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_37 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_45 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_61 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_2_69 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_2_77 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_35 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_43 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_3_51 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_3_55 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_65 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_3_73 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_4_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_37 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_45 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_61 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_4_69 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_4_77 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_35 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_43 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_5_51 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_5_55 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_5_65 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_2 FILLER_0_5_73 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_0_5_78 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_6_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_37 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_45 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_61 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_6_69 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_6_77 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_35 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_43 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_7_51 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_7_55 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_65 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_7_73 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_8_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_37 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_45 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_61 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_8_69 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_4 FILLER_0_8_77 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_3 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_11 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_19 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__fill_1 FILLER_0_9_27 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_29 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_37 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_45 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_3 FILLER_0_9_53 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_57 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_65 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); + sky130_fd_sc_hd__decap_8 FILLER_0_9_73 (.VGND(VGND), + .VNB(VGND), + .VPB(VPWR), + .VPWR(VPWR)); +endmodule diff --git a/tests/2038-lvs_good/issue_regression.py b/tests/2038-lvs_good/issue_regression.py new file mode 100644 index 000000000..5df3fcf4d --- /dev/null +++ b/tests/2038-lvs_good/issue_regression.py @@ -0,0 +1,25 @@ +import os +import sys +import glob +import subprocess + +args = sys.argv[1:] + +run_folder = args[0] + +log_path = glob.glob( + os.path.join(run_folder, "reports", "signoff", "*-inverter.lvs.rpt") +) +assert len(log_path) != 0, "LVS report file not found" +assert len(log_path) == 1, "Multiple LVS report files found" +assert ( + subprocess.call( + [ + "grep", + "-i", + "Total errors = 0", + log_path[0], + ] + ) + == 0 +), "Unexpected LVS error count" diff --git a/tests/2038-lvs_good_lefdef/config.json b/tests/2038-lvs_good_lefdef/config.json new file mode 120000 index 000000000..9c36a1a6c --- /dev/null +++ b/tests/2038-lvs_good_lefdef/config.json @@ -0,0 +1 @@ +../2038-lvs_good/config.json \ No newline at end of file diff --git a/tests/2038-lvs_good_lefdef/interactive.tcl b/tests/2038-lvs_good_lefdef/interactive.tcl new file mode 100644 index 000000000..12fc6b916 --- /dev/null +++ b/tests/2038-lvs_good_lefdef/interactive.tcl @@ -0,0 +1,10 @@ +package require openlane; + +prep -design $::env(TEST_DIR) {*}$argv + +set ::env(CURRENT_DEF) $::env(TEST_DIR)/inverter.def +set ::env(CURRENT_GDS) $::env(TEST_DIR)/inverter.gds +set ::env(CURRENT_POWERED_NETLIST) $::env(TEST_DIR)/inverter.pnl.v + +run_magic_spice_export +run_lvs \ No newline at end of file diff --git a/tests/2038-lvs_good_lefdef/inverter.def b/tests/2038-lvs_good_lefdef/inverter.def new file mode 120000 index 000000000..60c234229 --- /dev/null +++ b/tests/2038-lvs_good_lefdef/inverter.def @@ -0,0 +1 @@ +../2038-lvs_good/inverter.def \ No newline at end of file diff --git a/tests/2038-lvs_good_lefdef/inverter.gds b/tests/2038-lvs_good_lefdef/inverter.gds new file mode 120000 index 000000000..93511d962 --- /dev/null +++ b/tests/2038-lvs_good_lefdef/inverter.gds @@ -0,0 +1 @@ +../2038-lvs_good/inverter.gds \ No newline at end of file diff --git a/tests/2038-lvs_good_lefdef/inverter.pnl.v b/tests/2038-lvs_good_lefdef/inverter.pnl.v new file mode 120000 index 000000000..6e91a09eb --- /dev/null +++ b/tests/2038-lvs_good_lefdef/inverter.pnl.v @@ -0,0 +1 @@ +../2038-lvs_good/inverter.pnl.v \ No newline at end of file diff --git a/tests/2038-lvs_good_lefdef/issue_regression.py b/tests/2038-lvs_good_lefdef/issue_regression.py new file mode 120000 index 000000000..a0d4b858a --- /dev/null +++ b/tests/2038-lvs_good_lefdef/issue_regression.py @@ -0,0 +1 @@ +../2038-lvs_good/issue_regression.py \ No newline at end of file diff --git a/tests/912/config.tcl b/tests/912-misaligned_pins/config.tcl similarity index 100% rename from tests/912/config.tcl rename to tests/912-misaligned_pins/config.tcl diff --git a/tests/912/def_test.def b/tests/912-misaligned_pins/def_test.def similarity index 100% rename from tests/912/def_test.def rename to tests/912-misaligned_pins/def_test.def diff --git a/tests/912/issue_regression.py b/tests/912-misaligned_pins/issue_regression.py similarity index 100% rename from tests/912/issue_regression.py rename to tests/912-misaligned_pins/issue_regression.py diff --git a/tests/912/src/def_test.v b/tests/912-misaligned_pins/src/def_test.v similarity index 100% rename from tests/912/src/def_test.v rename to tests/912-misaligned_pins/src/def_test.v diff --git a/tests/__main__.py b/tests/__main__.py index 91e4e6173..02d12beb7 100755 --- a/tests/__main__.py +++ b/tests/__main__.py @@ -40,7 +40,7 @@ def rmrf(path): def get_test_cases(): test_dir = os.path.join(openlane_root, "tests") test_cases = [] - for test in os.listdir(test_dir): + for test in sorted(os.listdir(test_dir)): test_path = os.path.join(test_dir, test) if test == "__pycache__" or not os.path.isdir(test_path): continue