Skip to content

Commit 0eaae76

Browse files
committed
Add an option to set the address size per block
When generating iface based register code the register address and size may actually be different. In the case of the WM8960 that I initially created this for the address size is 7bits, the register size is 9bits.
1 parent 284aaa9 commit 0eaae76

File tree

3 files changed

+3
-0
lines changed

3 files changed

+3
-0
lines changed

src/ir.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -73,6 +73,7 @@ pub struct Block {
7373
#[serde(default, skip_serializing_if = "Option::is_none")]
7474
pub description: Option<String>,
7575
pub items: Vec<BlockItem>,
76+
pub address_size: Option<u32>
7677
}
7778

7879
#[derive(Clone, Debug, PartialEq, Serialize, Deserialize)]

src/svd2ir.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,7 @@ pub fn convert_peripheral(ir: &mut IR, p: &svd::Peripheral) -> anyhow::Result<()
165165
// Convert blocks
166166
for proto in &blocks {
167167
let mut block = Block {
168+
address_size: None,
168169
extends: None,
169170
description: proto.description.clone(),
170171
items: Vec::new(),

src/transform/make_block.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@ impl MakeBlock {
4242
let byte_offset = items[0].byte_offset;
4343

4444
let b2 = Block {
45+
address_size: None,
4546
extends: None,
4647
description: None,
4748
items: items

0 commit comments

Comments
 (0)