From 1f078db7269c1d836ee759585128f2561619de67 Mon Sep 17 00:00:00 2001
From: Kirill Mikhailov <konnor1980@yandex.ru>
Date: Thu, 6 Feb 2025 12:47:43 +0100
Subject: [PATCH] Rebase

---
 esp-hal/src/uart.rs | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/esp-hal/src/uart.rs b/esp-hal/src/uart.rs
index 229319c276..a08e05ce93 100644
--- a/esp-hal/src/uart.rs
+++ b/esp-hal/src/uart.rs
@@ -2448,7 +2448,7 @@ impl Info {
         sync_regs(self.regs());
     }
 
-    fn change_baud(&self, config: &Config) {
+    fn change_baud(&self, config: &Config) -> Result<(), ConfigError> {
         let clocks = Clocks::get();
         let clk = match config.clock_source {
             ClockSource::Apb => clocks.apb_clock.as_hz(),
@@ -2523,7 +2523,7 @@ impl Info {
 
         self.sync_regs();
 
-        let actual_baud = self.get_baudrate(clk);
+        self.verify_baudrate(clk, config)?;
 
         Ok(())
     }
@@ -2598,7 +2598,12 @@ impl Info {
                 let actual_baud = (clk << 4) / ((((clkdiv as u32) << 4) | clkdiv_frag) * (sclk_div_num + 1));
             } else { // esp32c6, esp32h2
                 let pcr = crate::peripherals::PCR::regs();
-                let sclk_div_num = pcr.uart0_sclk_conf().read().uart0_sclk_div_num().bits() as u32;
+                let conf = if self.is_instance(unsafe { crate::peripherals::UART0::steal() }) {
+                    pcr.uart(0).clk_conf()
+                } else {
+                    pcr.uart(1).clk_conf()
+                };
+                let sclk_div_num = conf.read().sclk_div_num().bits() as u32;
                 let actual_baud = (clk << 4) / ((((clkdiv as u32) << 4) | clkdiv_frag) * (sclk_div_num + 1));
             }
         };