diff --git a/esp-hal/src/cpu.rs b/esp-hal/src/cpu.rs
index 28b6409974..ccbab42fb8 100644
--- a/esp-hal/src/cpu.rs
+++ b/esp-hal/src/cpu.rs
@@ -167,15 +167,15 @@ bitflags::bitflags! {
 
 /// Performs a software reset on the chip.
 #[inline]
-pub fn software_reset() {
-    crate::rom::software_reset();
+pub fn software_reset() -> ! {
+    crate::rom::software_reset()
 }
 
 /// Resets the given CPU, leaving peripherals unchanged.
 #[instability::unstable]
 #[inline]
 pub fn software_reset_cpu(cpu: Cpu) {
-    crate::rom::software_reset_cpu(cpu as u32);
+    crate::rom::software_reset_cpu(cpu as u32)
 }
 
 /// Retrieves the reason for the last reset as a SocResetReason enum value.
diff --git a/esp-hal/src/rom/mod.rs b/esp-hal/src/rom/mod.rs
index 1ce2e0451f..5dc0b59bbe 100644
--- a/esp-hal/src/rom/mod.rs
+++ b/esp-hal/src/rom/mod.rs
@@ -122,12 +122,12 @@ pub(crate) fn software_reset_cpu(cpu_num: u32) {
 }
 
 #[inline(always)]
-pub(crate) fn software_reset() {
+pub(crate) fn software_reset() -> ! {
     extern "C" {
-        fn software_reset();
+        fn software_reset() -> !;
     }
 
-    unsafe { software_reset() };
+    unsafe { software_reset() }
 }
 
 #[cfg(esp32s3)]