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Commit 9a2404a

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Small tweaks
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+3
-5
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2 files changed

+3
-5
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inline-verilog/src/Language/Verilog/Inline.hs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -320,7 +320,7 @@ invokeCommand cmd args = do
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compileVerilog :: String -> TH.Q FilePath
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compileVerilog src = do
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-- executables we need
323-
gpp <- fromMaybe "g++" <$> liftIO (lookupEnv "INLINE_C_CPP_COMPILER")
323+
cpp <- fromMaybe "g++" <$> liftIO (lookupEnv "INLINE_C_CPP_COMPILER")
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verilator <- fromMaybe "verilator" <$> liftIO (lookupEnv "INLINE_C_VERILATOR")
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ld <- fromMaybe "ld" <$> liftIO (lookupEnv "INLINE_C_LINKER")
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-- generate verilog source and collect module infos
@@ -373,8 +373,8 @@ compileVerilog src = do
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delete contextp;
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}
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|]
376-
let gppArgs = ["-c", "-I", verilatorRoot ++ "/include", "-I", tmpDir, cppFile, "-o", oFile]
377-
_ <- invokeCommand gpp gppArgs
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let cppArgs = ["-c", "-I", verilatorRoot ++ "/include", "-I", tmpDir, cppFile, "-o", oFile]
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_ <- invokeCommand cpp cppArgs
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return [oFile, tmpDir ++ "/V" ++ (miName minfo) ++ "__ALL.o"]
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let ldArgs = ["-r", "-o", mergedOFile, tmpDir ++ "/verilated.o", tmpDir ++ "/verilated_threads.o"] ++ modsObjs
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void (invokeCommand ld ldArgs)

inline-verilog/test/tests.hs

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -126,8 +126,6 @@ bitManip in_A in_B shuffle_control op_select = do
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// Perform the comparison on the results from the instantiated modules.
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always @(*) begin
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// FIX: Explicitly zero-extend popcount_B_result from 6 bits to 7 bits to
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// match the width of popcount_A_result. This resolves the WIDTHEXPAND warning.
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if (popcount_A_result > {1'b0, popcount_B_result}) begin
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out_popcount_A_gt_B = 1'b1;
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end else begin

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