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gd32f425.mmap
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0x40000000 A PERIPHERAL TIMER1
0x40000000 B REGISTER CTL0 (rw): control register 0
0x40000000 C FIELD 00w01 CEN: Counter enable
0x40000000 C FIELD 01w01 UPDIS: Update disable
0x40000000 C FIELD 02w01 UPS: Update source
0x40000000 C FIELD 03w01 SPM: Single pulse mode
0x40000000 C FIELD 04w01 DIR: Direction
0x40000000 C FIELD 05w02 CAM: Counter aligns mode selection
0x40000000 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40000000 C FIELD 08w02 CKDIV: Clock division
0x40000004 B REGISTER CTL1 (rw): control register 1
0x40000004 C FIELD 03w01 DMAS: DMA request source selection
0x40000004 C FIELD 04w03 MMC: Master mode control
0x40000004 C FIELD 07w01 TI0S: Channel 0 trigger input selection
0x40000008 B REGISTER SMCFG (rw): slave mode control register
0x40000008 C FIELD 00w03 SMC: Slave mode control
0x40000008 C FIELD 04w03 TRGS: Trigger selection
0x40000008 C FIELD 07w01 MSM: Master-slave mode
0x40000008 C FIELD 08w04 ETFC: External trigger filter control
0x40000008 C FIELD 12w02 ETPSC: External trigger prescaler
0x40000008 C FIELD 14w01 SMC1: Part of SMC for enable External clock mode1
0x40000008 C FIELD 15w01 ETP: External trigger polarity
0x4000000C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x4000000C C FIELD 00w01 UPIE: Update interrupt enable
0x4000000C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x4000000C C FIELD 02w01 CH1IE: Channel 1 capture/compare interrupt enable
0x4000000C C FIELD 03w01 CH2IE: Channel 2 capture/compare interrupt enable
0x4000000C C FIELD 04w01 CH3IE: Channel 3 capture/compare interrupt enable
0x4000000C C FIELD 06w01 TRGIE: Trigger interrupt enable
0x4000000C C FIELD 08w01 UPDEN: Update DMA request enable
0x4000000C C FIELD 09w01 CH0DEN: Channel 0 capture/compare DMA request enable
0x4000000C C FIELD 10w01 CH1DEN: Channel 1 capture/compare DMA request enable
0x4000000C C FIELD 11w01 CH2DEN: Channel 2 capture/compare DMA request enable
0x4000000C C FIELD 12w01 CH3DEN: Channel 3 capture/compare DMA request enable
0x4000000C C FIELD 14w01 TRGDEN: Trigger DMA request enable
0x40000010 B REGISTER INTF (rw): interrupt flag register
0x40000010 C FIELD 00w01 UPIF: Update interrupt flag
0x40000010 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40000010 C FIELD 02w01 CH1IF: Channel 1 capture/compare interrupt flag
0x40000010 C FIELD 03w01 CH2IF: Channel 2 capture/compare interrupt enable
0x40000010 C FIELD 04w01 CH3IF: Channel 3 capture/compare interrupt enable
0x40000010 C FIELD 06w01 TRGIF: Trigger interrupt flag
0x40000010 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40000010 C FIELD 10w01 CH1OF: Channel 1 over capture flag
0x40000010 C FIELD 11w01 CH2OF: Channel 2 over capture flag
0x40000010 C FIELD 12w01 CH3OF: Channel 3 over capture flag
0x40000014 B REGISTER SWEVG (wo): event generation register
0x40000014 C FIELD 00w01 UPG: Update generation
0x40000014 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40000014 C FIELD 02w01 CH1G: Channel 1 capture or compare event generation
0x40000014 C FIELD 03w01 CH2G: Channel 2 capture or compare event generation
0x40000014 C FIELD 04w01 CH3G: Channel 3 capture or compare event generation
0x40000014 C FIELD 06w01 TRGG: Trigger event generation
0x40000018 B REGISTER CHCTL0_Input (rw): Channel control register 0 (input mode)
0x40000018 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40000018 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40000018 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40000018 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40000018 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40000018 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40000018 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40000018 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40000018 C FIELD 07w01 CH0COMCEN: Channel 0 output compare clear enable
0x40000018 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000018 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000018 C FIELD 10w01 CH1COMFEN: Channel 1 output compare fast enable
0x40000018 C FIELD 10w02 CH1CAPPSC: Channel 1 input capture prescaler
0x40000018 C FIELD 11w01 CH1COMSEN: Channel 1 output compare shadow enable
0x40000018 C FIELD 12w03 CH1COMCTL: Channel 1 compare output control
0x40000018 C FIELD 12w04 CH1CAPFLT: Channel 1 input capture filter control
0x40000018 C FIELD 15w01 CH1COMCEN: Channel 1 output compare clear enable
0x4000001C B REGISTER CHCTL1_Input (rw): Channel control register 1 (input mode)
0x4000001C B REGISTER CHCTL1_Output (rw): Channel control register 1 (output mode)
0x4000001C C FIELD 00w02 CH2MS: Channel 2 I/O mode selection
0x4000001C C FIELD 00w02 CH2MS: Channel 2 mode selection
0x4000001C C FIELD 02w01 CH2COMFEN: Channel 2 output compare fast enable
0x4000001C C FIELD 02w02 CH2CAPPSC: Channel 2 input capture prescaler
0x4000001C C FIELD 03w01 CH2COMSEN: Channel 2 compare output shadow enable
0x4000001C C FIELD 04w03 CH2COMCTL: Channel 2 compare output control
0x4000001C C FIELD 04w04 CH2CAPFLT: Channel 2 input capture filter control
0x4000001C C FIELD 07w01 CH2COMCEN: Channel 2 output compare clear enable
0x4000001C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x4000001C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x4000001C C FIELD 10w01 CH3COMFEN: Channel 3 output compare fast enable
0x4000001C C FIELD 10w02 CH3CAPPSC: Channel 3 input capture prescaler
0x4000001C C FIELD 11w01 CH3COMSEN: Channel 3 output compare shadow enable
0x4000001C C FIELD 12w03 CH3COMCTL: Channel 3 compare output control
0x4000001C C FIELD 12w04 CH3CAPFLT: Channel 3 input capture filter control
0x4000001C C FIELD 15w01 CH3COMCEN: Channel 3 output compare clear enable
0x40000020 B REGISTER CHCTL2 (rw): Channel control register 2
0x40000020 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40000020 C FIELD 01w01 CH0P: Channel 0 capture/compare function polarity
0x40000020 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40000020 C FIELD 04w01 CH1EN: Channel 1 capture/compare function enable
0x40000020 C FIELD 05w01 CH1P: Channel 1 capture/compare function polarity
0x40000020 C FIELD 07w01 CH1NP: Channel 1 complementary output polarity
0x40000020 C FIELD 08w01 CH2EN: Channel 2 capture/compare function enable
0x40000020 C FIELD 09w01 CH2P: Channel 2 capture/compare function polarity
0x40000020 C FIELD 11w01 CH2NP: Channel 2 complementary output polarity
0x40000020 C FIELD 12w01 CH3EN: Channel 3 capture/compare function enable
0x40000020 C FIELD 13w01 CH3P: Channel 3 capture/compare function polarity
0x40000024 B REGISTER CNT (rw): Counter register
0x40000024 C FIELD 00w32 CNT: counter value
0x40000028 B REGISTER PSC (rw): Prescaler register
0x40000028 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000002C B REGISTER CAR (rw): Counter auto reload register
0x4000002C C FIELD 00w32 CARL: Counter auto reload value
0x40000034 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40000034 C FIELD 00w32 CH0VAL: Capture or compare value of channel 0
0x40000038 B REGISTER CH1CV (rw): Channel 1 capture/compare value register
0x40000038 C FIELD 00w32 CH1VAL: Capture or compare value of channel1
0x4000003C B REGISTER CH2CV (rw): Channel 2 capture/compare value register
0x4000003C C FIELD 00w32 CH2VAL: Capture or compare value of channel 2
0x40000040 B REGISTER CH3CV (rw): Channel 3 capture/compare value register
0x40000040 C FIELD 00w32 CH3VAL: Capture or compare value of channel 3
0x40000048 B REGISTER DMACFG (rw): DMA configuration register
0x40000048 C FIELD 00w05 DMATA: DMA transfer access start address
0x40000048 C FIELD 08w05 DMATC: DMA transfer count
0x4000004C B REGISTER DMATB (rw): DMA transfer buffer register
0x4000004C C FIELD 00w16 DMATB: DMA transfer buffer
0x40000050 B REGISTER IRMP (rw): Input remap register
0x40000050 C FIELD 06w02 CI3_RMP: Channel 3 input remap
0x40000050 C FIELD 10w02 ITI1_RMP: Internal trigger input1 remap
0x400000FC B REGISTER CFG (rw): Configuration
0x400000FC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40000400 A PERIPHERAL TIMER2
0x40000400 B REGISTER CTL0 (rw): control register 0
0x40000400 C FIELD 00w01 CEN: Counter enable
0x40000400 C FIELD 01w01 UPDIS: Update disable
0x40000400 C FIELD 02w01 UPS: Update source
0x40000400 C FIELD 03w01 SPM: Single pulse mode
0x40000400 C FIELD 04w01 DIR: Direction
0x40000400 C FIELD 05w02 CAM: Counter aligns mode selection
0x40000400 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40000400 C FIELD 08w02 CKDIV: Clock division
0x40000404 B REGISTER CTL1 (rw): control register 1
0x40000404 C FIELD 03w01 DMAS: DMA request source selection
0x40000404 C FIELD 04w03 MMC: Master mode control
0x40000404 C FIELD 07w01 TI0S: Channel 0 trigger input selection
0x40000408 B REGISTER SMCFG (rw): slave mode control register
0x40000408 C FIELD 00w03 SMC: Slave mode control
0x40000408 C FIELD 04w03 TRGS: Trigger selection
0x40000408 C FIELD 07w01 MSM: Master-slave mode
0x40000408 C FIELD 08w04 ETFC: External trigger filter control
0x40000408 C FIELD 12w02 ETPSC: External trigger prescaler
0x40000408 C FIELD 14w01 SMC1: Part of SMC for enable External clock mode1
0x40000408 C FIELD 15w01 ETP: External trigger polarity
0x4000040C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x4000040C C FIELD 00w01 UPIE: Update interrupt enable
0x4000040C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x4000040C C FIELD 02w01 CH1IE: Channel 1 capture/compare interrupt enable
0x4000040C C FIELD 03w01 CH2IE: Channel 2 capture/compare interrupt enable
0x4000040C C FIELD 04w01 CH3IE: Channel 3 capture/compare interrupt enable
0x4000040C C FIELD 06w01 TRGIE: Trigger interrupt enable
0x4000040C C FIELD 08w01 UPDEN: Update DMA request enable
0x4000040C C FIELD 09w01 CH0DEN: Channel 0 capture/compare DMA request enable
0x4000040C C FIELD 10w01 CH1DEN: Channel 1 capture/compare DMA request enable
0x4000040C C FIELD 11w01 CH2DEN: Channel 2 capture/compare DMA request enable
0x4000040C C FIELD 12w01 CH3DEN: Channel 3 capture/compare DMA request enable
0x4000040C C FIELD 14w01 TRGDEN: Trigger DMA request enable
0x40000410 B REGISTER INTF (rw): interrupt flag register
0x40000410 C FIELD 00w01 UPIF: Update interrupt flag
0x40000410 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40000410 C FIELD 02w01 CH1IF: Channel 1 capture/compare interrupt flag
0x40000410 C FIELD 03w01 CH2IF: Channel 2 capture/compare interrupt enable
0x40000410 C FIELD 04w01 CH3IF: Channel 3 capture/compare interrupt enable
0x40000410 C FIELD 06w01 TRGIF: Trigger interrupt flag
0x40000410 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40000410 C FIELD 10w01 CH1OF: Channel 1 over capture flag
0x40000410 C FIELD 11w01 CH2OF: Channel 2 over capture flag
0x40000410 C FIELD 12w01 CH3OF: Channel 3 over capture flag
0x40000414 B REGISTER SWEVG (wo): event generation register
0x40000414 C FIELD 00w01 UPG: Update generation
0x40000414 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40000414 C FIELD 02w01 CH1G: Channel 1 capture or compare event generation
0x40000414 C FIELD 03w01 CH2G: Channel 2 capture or compare event generation
0x40000414 C FIELD 04w01 CH3G: Channel 3 capture or compare event generation
0x40000414 C FIELD 06w01 TRGG: Trigger event generation
0x40000418 B REGISTER CHCTL0_Input (rw): Channel control register 0 (input mode)
0x40000418 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40000418 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40000418 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40000418 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40000418 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40000418 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40000418 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40000418 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40000418 C FIELD 07w01 CH0COMCEN: Channel 0 output compare clear enable
0x40000418 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000418 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000418 C FIELD 10w01 CH1COMFEN: Channel 1 output compare fast enable
0x40000418 C FIELD 10w02 CH1CAPPSC: Channel 1 input capture prescaler
0x40000418 C FIELD 11w01 CH1COMSEN: Channel 1 output compare shadow enable
0x40000418 C FIELD 12w03 CH1COMCTL: Channel 1 compare output control
0x40000418 C FIELD 12w04 CH1CAPFLT: Channel 1 input capture filter control
0x40000418 C FIELD 15w01 CH1COMCEN: Channel 1 output compare clear enable
0x4000041C B REGISTER CHCTL1_Input (rw): Channel control register 1 (input mode)
0x4000041C B REGISTER CHCTL1_Output (rw): Channel control register 1 (output mode)
0x4000041C C FIELD 00w02 CH2MS: Channel 2 I/O mode selection
0x4000041C C FIELD 00w02 CH2MS: Channel 2 mode selection
0x4000041C C FIELD 02w01 CH2COMFEN: Channel 2 output compare fast enable
0x4000041C C FIELD 02w02 CH2CAPPSC: Channel 2 input capture prescaler
0x4000041C C FIELD 03w01 CH2COMSEN: Channel 2 compare output shadow enable
0x4000041C C FIELD 04w03 CH2COMCTL: Channel 2 compare output control
0x4000041C C FIELD 04w04 CH2CAPFLT: Channel 2 input capture filter control
0x4000041C C FIELD 07w01 CH2COMCEN: Channel 2 output compare clear enable
0x4000041C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x4000041C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x4000041C C FIELD 10w01 CH3COMFEN: Channel 3 output compare fast enable
0x4000041C C FIELD 10w02 CH3CAPPSC: Channel 3 input capture prescaler
0x4000041C C FIELD 11w01 CH3COMSEN: Channel 3 output compare shadow enable
0x4000041C C FIELD 12w03 CH3COMCTL: Channel 3 compare output control
0x4000041C C FIELD 12w04 CH3CAPFLT: Channel 3 input capture filter control
0x4000041C C FIELD 15w01 CH3COMCEN: Channel 3 output compare clear enable
0x40000420 B REGISTER CHCTL2 (rw): Channel control register 2
0x40000420 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40000420 C FIELD 01w01 CH0P: Channel 0 capture/compare function polarity
0x40000420 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40000420 C FIELD 04w01 CH1EN: Channel 1 capture/compare function enable
0x40000420 C FIELD 05w01 CH1P: Channel 1 capture/compare function polarity
0x40000420 C FIELD 07w01 CH1NP: Channel 1 complementary output polarity
0x40000420 C FIELD 08w01 CH2EN: Channel 2 capture/compare function enable
0x40000420 C FIELD 09w01 CH2P: Channel 2 capture/compare function polarity
0x40000420 C FIELD 11w01 CH2NP: Channel 2 complementary output polarity
0x40000420 C FIELD 12w01 CH3EN: Channel 3 capture/compare function enable
0x40000420 C FIELD 13w01 CH3P: Channel 3 capture/compare function polarity
0x40000424 B REGISTER CNT (rw): Counter register
0x40000424 C FIELD 00w32 CNT: counter value
0x40000428 B REGISTER PSC (rw): Prescaler register
0x40000428 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000042C B REGISTER CAR (rw): Counter auto reload register
0x4000042C C FIELD 00w32 CARL: Counter auto reload value
0x40000434 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40000434 C FIELD 00w32 CH0VAL: Capture or compare value of channel 0
0x40000438 B REGISTER CH1CV (rw): Channel 1 capture/compare value register
0x40000438 C FIELD 00w32 CH1VAL: Capture or compare value of channel1
0x4000043C B REGISTER CH2CV (rw): Channel 2 capture/compare value register
0x4000043C C FIELD 00w32 CH2VAL: Capture or compare value of channel 2
0x40000440 B REGISTER CH3CV (rw): Channel 3 capture/compare value register
0x40000440 C FIELD 00w32 CH3VAL: Capture or compare value of channel 3
0x40000448 B REGISTER DMACFG (rw): DMA configuration register
0x40000448 C FIELD 00w05 DMATA: DMA transfer access start address
0x40000448 C FIELD 08w05 DMATC: DMA transfer count
0x4000044C B REGISTER DMATB (rw): DMA transfer buffer register
0x4000044C C FIELD 00w16 DMATB: DMA transfer buffer
0x40000450 B REGISTER IRMP (rw): Input remap register
0x40000450 C FIELD 06w02 CI3_RMP: Channel 3 input remap
0x40000450 C FIELD 10w02 ITI1_RMP: Internal trigger input1 remap
0x400004FC B REGISTER CFG (rw): Configuration
0x400004FC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40000800 A PERIPHERAL TIMER3
0x40000800 B REGISTER CTL0 (rw): control register 0
0x40000800 C FIELD 00w01 CEN: Counter enable
0x40000800 C FIELD 01w01 UPDIS: Update disable
0x40000800 C FIELD 02w01 UPS: Update source
0x40000800 C FIELD 03w01 SPM: Single pulse mode
0x40000800 C FIELD 04w01 DIR: Direction
0x40000800 C FIELD 05w02 CAM: Counter aligns mode selection
0x40000800 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40000800 C FIELD 08w02 CKDIV: Clock division
0x40000804 B REGISTER CTL1 (rw): control register 1
0x40000804 C FIELD 03w01 DMAS: DMA request source selection
0x40000804 C FIELD 04w03 MMC: Master mode control
0x40000804 C FIELD 07w01 TI0S: Channel 0 trigger input selection
0x40000808 B REGISTER SMCFG (rw): slave mode control register
0x40000808 C FIELD 00w03 SMC: Slave mode control
0x40000808 C FIELD 04w03 TRGS: Trigger selection
0x40000808 C FIELD 07w01 MSM: Master-slave mode
0x40000808 C FIELD 08w04 ETFC: External trigger filter control
0x40000808 C FIELD 12w02 ETPSC: External trigger prescaler
0x40000808 C FIELD 14w01 SMC1: Part of SMC for enable External clock mode1
0x40000808 C FIELD 15w01 ETP: External trigger polarity
0x4000080C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x4000080C C FIELD 00w01 UPIE: Update interrupt enable
0x4000080C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x4000080C C FIELD 02w01 CH1IE: Channel 1 capture/compare interrupt enable
0x4000080C C FIELD 03w01 CH2IE: Channel 2 capture/compare interrupt enable
0x4000080C C FIELD 04w01 CH3IE: Channel 3 capture/compare interrupt enable
0x4000080C C FIELD 06w01 TRGIE: Trigger interrupt enable
0x4000080C C FIELD 08w01 UPDEN: Update DMA request enable
0x4000080C C FIELD 09w01 CH0DEN: Channel 0 capture/compare DMA request enable
0x4000080C C FIELD 10w01 CH1DEN: Channel 1 capture/compare DMA request enable
0x4000080C C FIELD 11w01 CH2DEN: Channel 2 capture/compare DMA request enable
0x4000080C C FIELD 12w01 CH3DEN: Channel 3 capture/compare DMA request enable
0x4000080C C FIELD 14w01 TRGDEN: Trigger DMA request enable
0x40000810 B REGISTER INTF (rw): interrupt flag register
0x40000810 C FIELD 00w01 UPIF: Update interrupt flag
0x40000810 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40000810 C FIELD 02w01 CH1IF: Channel 1 capture/compare interrupt flag
0x40000810 C FIELD 03w01 CH2IF: Channel 2 capture/compare interrupt enable
0x40000810 C FIELD 04w01 CH3IF: Channel 3 capture/compare interrupt enable
0x40000810 C FIELD 06w01 TRGIF: Trigger interrupt flag
0x40000810 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40000810 C FIELD 10w01 CH1OF: Channel 1 over capture flag
0x40000810 C FIELD 11w01 CH2OF: Channel 2 over capture flag
0x40000810 C FIELD 12w01 CH3OF: Channel 3 over capture flag
0x40000814 B REGISTER SWEVG (wo): event generation register
0x40000814 C FIELD 00w01 UPG: Update generation
0x40000814 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40000814 C FIELD 02w01 CH1G: Channel 1 capture or compare event generation
0x40000814 C FIELD 03w01 CH2G: Channel 2 capture or compare event generation
0x40000814 C FIELD 04w01 CH3G: Channel 3 capture or compare event generation
0x40000814 C FIELD 06w01 TRGG: Trigger event generation
0x40000818 B REGISTER CHCTL0_Input (rw): Channel control register 0 (input mode)
0x40000818 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40000818 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40000818 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40000818 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40000818 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40000818 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40000818 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40000818 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40000818 C FIELD 07w01 CH0COMCEN: Channel 0 output compare clear enable
0x40000818 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000818 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000818 C FIELD 10w01 CH1COMFEN: Channel 1 output compare fast enable
0x40000818 C FIELD 10w02 CH1CAPPSC: Channel 1 input capture prescaler
0x40000818 C FIELD 11w01 CH1COMSEN: Channel 1 output compare shadow enable
0x40000818 C FIELD 12w03 CH1COMCTL: Channel 1 compare output control
0x40000818 C FIELD 12w04 CH1CAPFLT: Channel 1 input capture filter control
0x40000818 C FIELD 15w01 CH1COMCEN: Channel 1 output compare clear enable
0x4000081C B REGISTER CHCTL1_Input (rw): Channel control register 1 (input mode)
0x4000081C B REGISTER CHCTL1_Output (rw): Channel control register 1 (output mode)
0x4000081C C FIELD 00w02 CH2MS: Channel 2 I/O mode selection
0x4000081C C FIELD 00w02 CH2MS: Channel 2 mode selection
0x4000081C C FIELD 02w01 CH2COMFEN: Channel 2 output compare fast enable
0x4000081C C FIELD 02w02 CH2CAPPSC: Channel 2 input capture prescaler
0x4000081C C FIELD 03w01 CH2COMSEN: Channel 2 compare output shadow enable
0x4000081C C FIELD 04w03 CH2COMCTL: Channel 2 compare output control
0x4000081C C FIELD 04w04 CH2CAPFLT: Channel 2 input capture filter control
0x4000081C C FIELD 07w01 CH2COMCEN: Channel 2 output compare clear enable
0x4000081C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x4000081C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x4000081C C FIELD 10w01 CH3COMFEN: Channel 3 output compare fast enable
0x4000081C C FIELD 10w02 CH3CAPPSC: Channel 3 input capture prescaler
0x4000081C C FIELD 11w01 CH3COMSEN: Channel 3 output compare shadow enable
0x4000081C C FIELD 12w03 CH3COMCTL: Channel 3 compare output control
0x4000081C C FIELD 12w04 CH3CAPFLT: Channel 3 input capture filter control
0x4000081C C FIELD 15w01 CH3COMCEN: Channel 3 output compare clear enable
0x40000820 B REGISTER CHCTL2 (rw): Channel control register 2
0x40000820 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40000820 C FIELD 01w01 CH0P: Channel 0 capture/compare function polarity
0x40000820 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40000820 C FIELD 04w01 CH1EN: Channel 1 capture/compare function enable
0x40000820 C FIELD 05w01 CH1P: Channel 1 capture/compare function polarity
0x40000820 C FIELD 07w01 CH1NP: Channel 1 complementary output polarity
0x40000820 C FIELD 08w01 CH2EN: Channel 2 capture/compare function enable
0x40000820 C FIELD 09w01 CH2P: Channel 2 capture/compare function polarity
0x40000820 C FIELD 11w01 CH2NP: Channel 2 complementary output polarity
0x40000820 C FIELD 12w01 CH3EN: Channel 3 capture/compare function enable
0x40000820 C FIELD 13w01 CH3P: Channel 3 capture/compare function polarity
0x40000824 B REGISTER CNT (rw): Counter register
0x40000824 C FIELD 00w32 CNT: counter value
0x40000828 B REGISTER PSC (rw): Prescaler register
0x40000828 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000082C B REGISTER CAR (rw): Counter auto reload register
0x4000082C C FIELD 00w32 CARL: Counter auto reload value
0x40000834 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40000834 C FIELD 00w32 CH0VAL: Capture or compare value of channel 0
0x40000838 B REGISTER CH1CV (rw): Channel 1 capture/compare value register
0x40000838 C FIELD 00w32 CH1VAL: Capture or compare value of channel1
0x4000083C B REGISTER CH2CV (rw): Channel 2 capture/compare value register
0x4000083C C FIELD 00w32 CH2VAL: Capture or compare value of channel 2
0x40000840 B REGISTER CH3CV (rw): Channel 3 capture/compare value register
0x40000840 C FIELD 00w32 CH3VAL: Capture or compare value of channel 3
0x40000848 B REGISTER DMACFG (rw): DMA configuration register
0x40000848 C FIELD 00w05 DMATA: DMA transfer access start address
0x40000848 C FIELD 08w05 DMATC: DMA transfer count
0x4000084C B REGISTER DMATB (rw): DMA transfer buffer register
0x4000084C C FIELD 00w16 DMATB: DMA transfer buffer
0x40000850 B REGISTER IRMP (rw): Input remap register
0x40000850 C FIELD 06w02 CI3_RMP: Channel 3 input remap
0x40000850 C FIELD 10w02 ITI1_RMP: Internal trigger input1 remap
0x400008FC B REGISTER CFG (rw): Configuration
0x400008FC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40000C00 A PERIPHERAL TIMER4
0x40000C00 B REGISTER CTL0 (rw): control register 0
0x40000C00 C FIELD 00w01 CEN: Counter enable
0x40000C00 C FIELD 01w01 UPDIS: Update disable
0x40000C00 C FIELD 02w01 UPS: Update source
0x40000C00 C FIELD 03w01 SPM: Single pulse mode
0x40000C00 C FIELD 04w01 DIR: Direction
0x40000C00 C FIELD 05w02 CAM: Counter aligns mode selection
0x40000C00 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40000C00 C FIELD 08w02 CKDIV: Clock division
0x40000C04 B REGISTER CTL1 (rw): control register 1
0x40000C04 C FIELD 03w01 DMAS: DMA request source selection
0x40000C04 C FIELD 04w03 MMC: Master mode control
0x40000C04 C FIELD 07w01 TI0S: Channel 0 trigger input selection
0x40000C08 B REGISTER SMCFG (rw): slave mode control register
0x40000C08 C FIELD 00w03 SMC: Slave mode control
0x40000C08 C FIELD 04w03 TRGS: Trigger selection
0x40000C08 C FIELD 07w01 MSM: Master-slave mode
0x40000C08 C FIELD 08w04 ETFC: External trigger filter control
0x40000C08 C FIELD 12w02 ETPSC: External trigger prescaler
0x40000C08 C FIELD 14w01 SMC1: Part of SMC for enable External clock mode1
0x40000C08 C FIELD 15w01 ETP: External trigger polarity
0x40000C0C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x40000C0C C FIELD 00w01 UPIE: Update interrupt enable
0x40000C0C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x40000C0C C FIELD 02w01 CH1IE: Channel 1 capture/compare interrupt enable
0x40000C0C C FIELD 03w01 CH2IE: Channel 2 capture/compare interrupt enable
0x40000C0C C FIELD 04w01 CH3IE: Channel 3 capture/compare interrupt enable
0x40000C0C C FIELD 06w01 TRGIE: Trigger interrupt enable
0x40000C0C C FIELD 08w01 UPDEN: Update DMA request enable
0x40000C0C C FIELD 09w01 CH0DEN: Channel 0 capture/compare DMA request enable
0x40000C0C C FIELD 10w01 CH1DEN: Channel 1 capture/compare DMA request enable
0x40000C0C C FIELD 11w01 CH2DEN: Channel 2 capture/compare DMA request enable
0x40000C0C C FIELD 12w01 CH3DEN: Channel 3 capture/compare DMA request enable
0x40000C0C C FIELD 14w01 TRGDEN: Trigger DMA request enable
0x40000C10 B REGISTER INTF (rw): interrupt flag register
0x40000C10 C FIELD 00w01 UPIF: Update interrupt flag
0x40000C10 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40000C10 C FIELD 02w01 CH1IF: Channel 1 capture/compare interrupt flag
0x40000C10 C FIELD 03w01 CH2IF: Channel 2 capture/compare interrupt enable
0x40000C10 C FIELD 04w01 CH3IF: Channel 3 capture/compare interrupt enable
0x40000C10 C FIELD 06w01 TRGIF: Trigger interrupt flag
0x40000C10 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40000C10 C FIELD 10w01 CH1OF: Channel 1 over capture flag
0x40000C10 C FIELD 11w01 CH2OF: Channel 2 over capture flag
0x40000C10 C FIELD 12w01 CH3OF: Channel 3 over capture flag
0x40000C14 B REGISTER SWEVG (wo): event generation register
0x40000C14 C FIELD 00w01 UPG: Update generation
0x40000C14 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40000C14 C FIELD 02w01 CH1G: Channel 1 capture or compare event generation
0x40000C14 C FIELD 03w01 CH2G: Channel 2 capture or compare event generation
0x40000C14 C FIELD 04w01 CH3G: Channel 3 capture or compare event generation
0x40000C14 C FIELD 06w01 TRGG: Trigger event generation
0x40000C18 B REGISTER CHCTL0_Input (rw): Channel control register 0 (input mode)
0x40000C18 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40000C18 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40000C18 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40000C18 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40000C18 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40000C18 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40000C18 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40000C18 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40000C18 C FIELD 07w01 CH0COMCEN: Channel 0 output compare clear enable
0x40000C18 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000C18 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40000C18 C FIELD 10w01 CH1COMFEN: Channel 1 output compare fast enable
0x40000C18 C FIELD 10w02 CH1CAPPSC: Channel 1 input capture prescaler
0x40000C18 C FIELD 11w01 CH1COMSEN: Channel 1 output compare shadow enable
0x40000C18 C FIELD 12w03 CH1COMCTL: Channel 1 compare output control
0x40000C18 C FIELD 12w04 CH1CAPFLT: Channel 1 input capture filter control
0x40000C18 C FIELD 15w01 CH1COMCEN: Channel 1 output compare clear enable
0x40000C1C B REGISTER CHCTL1_Input (rw): Channel control register 1 (input mode)
0x40000C1C B REGISTER CHCTL1_Output (rw): Channel control register 1 (output mode)
0x40000C1C C FIELD 00w02 CH2MS: Channel 2 I/O mode selection
0x40000C1C C FIELD 00w02 CH2MS: Channel 2 mode selection
0x40000C1C C FIELD 02w01 CH2COMFEN: Channel 2 output compare fast enable
0x40000C1C C FIELD 02w02 CH2CAPPSC: Channel 2 input capture prescaler
0x40000C1C C FIELD 03w01 CH2COMSEN: Channel 2 compare output shadow enable
0x40000C1C C FIELD 04w03 CH2COMCTL: Channel 2 compare output control
0x40000C1C C FIELD 04w04 CH2CAPFLT: Channel 2 input capture filter control
0x40000C1C C FIELD 07w01 CH2COMCEN: Channel 2 output compare clear enable
0x40000C1C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x40000C1C C FIELD 08w02 CH3MS: Channel 3 mode selection
0x40000C1C C FIELD 10w01 CH3COMFEN: Channel 3 output compare fast enable
0x40000C1C C FIELD 10w02 CH3CAPPSC: Channel 3 input capture prescaler
0x40000C1C C FIELD 11w01 CH3COMSEN: Channel 3 output compare shadow enable
0x40000C1C C FIELD 12w03 CH3COMCTL: Channel 3 compare output control
0x40000C1C C FIELD 12w04 CH3CAPFLT: Channel 3 input capture filter control
0x40000C1C C FIELD 15w01 CH3COMCEN: Channel 3 output compare clear enable
0x40000C20 B REGISTER CHCTL2 (rw): Channel control register 2
0x40000C20 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40000C20 C FIELD 01w01 CH0P: Channel 0 capture/compare function polarity
0x40000C20 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40000C20 C FIELD 04w01 CH1EN: Channel 1 capture/compare function enable
0x40000C20 C FIELD 05w01 CH1P: Channel 1 capture/compare function polarity
0x40000C20 C FIELD 07w01 CH1NP: Channel 1 complementary output polarity
0x40000C20 C FIELD 08w01 CH2EN: Channel 2 capture/compare function enable
0x40000C20 C FIELD 09w01 CH2P: Channel 2 capture/compare function polarity
0x40000C20 C FIELD 11w01 CH2NP: Channel 2 complementary output polarity
0x40000C20 C FIELD 12w01 CH3EN: Channel 3 capture/compare function enable
0x40000C20 C FIELD 13w01 CH3P: Channel 3 capture/compare function polarity
0x40000C24 B REGISTER CNT (rw): Counter register
0x40000C24 C FIELD 00w32 CNT: counter value
0x40000C28 B REGISTER PSC (rw): Prescaler register
0x40000C28 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x40000C2C B REGISTER CAR (rw): Counter auto reload register
0x40000C2C C FIELD 00w32 CARL: Counter auto reload value
0x40000C34 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40000C34 C FIELD 00w32 CH0VAL: Capture or compare value of channel 0
0x40000C38 B REGISTER CH1CV (rw): Channel 1 capture/compare value register
0x40000C38 C FIELD 00w32 CH1VAL: Capture or compare value of channel1
0x40000C3C B REGISTER CH2CV (rw): Channel 2 capture/compare value register
0x40000C3C C FIELD 00w32 CH2VAL: Capture or compare value of channel 2
0x40000C40 B REGISTER CH3CV (rw): Channel 3 capture/compare value register
0x40000C40 C FIELD 00w32 CH3VAL: Capture or compare value of channel 3
0x40000C48 B REGISTER DMACFG (rw): DMA configuration register
0x40000C48 C FIELD 00w05 DMATA: DMA transfer access start address
0x40000C48 C FIELD 08w05 DMATC: DMA transfer count
0x40000C4C B REGISTER DMATB (rw): DMA transfer buffer register
0x40000C4C C FIELD 00w16 DMATB: DMA transfer buffer
0x40000C50 B REGISTER IRMP (rw): Input remap register
0x40000C50 C FIELD 06w02 CI3_RMP: Channel 3 input remap
0x40000C50 C FIELD 10w02 ITI1_RMP: Internal trigger input1 remap
0x40000CFC B REGISTER CFG (rw): Configuration
0x40000CFC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40001000 A PERIPHERAL TIMER5
0x40001000 B REGISTER CTL0 (rw): control register 0
0x40001000 C FIELD 00w01 CEN: Counter enable
0x40001000 C FIELD 01w01 UPDIS: Update disable
0x40001000 C FIELD 02w01 UPS: Update source
0x40001000 C FIELD 03w01 SPM: Single pulse mode
0x40001000 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40001004 B REGISTER CTL1 (rw): control register 1
0x40001004 C FIELD 04w03 MMC: Master mode control
0x4000100C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x4000100C C FIELD 00w01 UPIE: Update interrupt enable
0x4000100C C FIELD 08w01 UPDEN: Update DMA request enable
0x40001010 B REGISTER INTF (rw): Interrupt flag register
0x40001010 C FIELD 00w01 UPIF: Update interrupt flag
0x40001014 B REGISTER SWEVG (wo): event generation register
0x40001014 C FIELD 00w01 UPG: Update generation
0x40001024 B REGISTER CNT (rw): Counter register
0x40001024 C FIELD 00w16 CNT: Low counter value
0x40001028 B REGISTER PSC (rw): Prescaler register
0x40001028 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000102C B REGISTER CAR (rw): Counter auto reload register
0x4000102C C FIELD 00w16 CAR: Counter auto reload value
0x40001400 A PERIPHERAL TIMER6
0x40001400 B REGISTER CTL0 (rw): control register 0
0x40001400 C FIELD 00w01 CEN: Counter enable
0x40001400 C FIELD 01w01 UPDIS: Update disable
0x40001400 C FIELD 02w01 UPS: Update source
0x40001400 C FIELD 03w01 SPM: Single pulse mode
0x40001400 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40001404 B REGISTER CTL1 (rw): control register 1
0x40001404 C FIELD 04w03 MMC: Master mode control
0x4000140C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x4000140C C FIELD 00w01 UPIE: Update interrupt enable
0x4000140C C FIELD 08w01 UPDEN: Update DMA request enable
0x40001410 B REGISTER INTF (rw): Interrupt flag register
0x40001410 C FIELD 00w01 UPIF: Update interrupt flag
0x40001414 B REGISTER SWEVG (wo): event generation register
0x40001414 C FIELD 00w01 UPG: Update generation
0x40001424 B REGISTER CNT (rw): Counter register
0x40001424 C FIELD 00w16 CNT: Low counter value
0x40001428 B REGISTER PSC (rw): Prescaler register
0x40001428 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000142C B REGISTER CAR (rw): Counter auto reload register
0x4000142C C FIELD 00w16 CAR: Counter auto reload value
0x40001800 A PERIPHERAL TIMER11
0x40001800 B REGISTER CTL0 (rw): control register 0
0x40001800 C FIELD 00w01 CEN: Counter enable
0x40001800 C FIELD 01w01 UPDIS: Update disable
0x40001800 C FIELD 02w01 UPS: Update source
0x40001800 C FIELD 03w01 SPM: Single pulse mode
0x40001800 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40001800 C FIELD 08w02 CKDIV: Clock division
0x40001808 B REGISTER SMCFG (rw): slave mode configuration register
0x40001808 C FIELD 00w03 SMC: Slave mode control
0x40001808 C FIELD 04w03 TRGS: Trigger selection
0x40001808 C FIELD 07w01 MSM: Master-slave mode
0x4000180C B REGISTER DMAINTEN (rw): DMA and interrupt enable register
0x4000180C C FIELD 00w01 UPIE: Update interrupt enable
0x4000180C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x4000180C C FIELD 02w01 CH1IE: Channel 1 capture/compare interrupt enable
0x4000180C C FIELD 06w01 TRGIE: Trigger interrupt enable
0x40001810 B REGISTER INTF (rw): interrupt flag register
0x40001810 C FIELD 00w01 UPIF: Update interrupt flag
0x40001810 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40001810 C FIELD 02w01 CH1IF: Channel 1 capture/compare interrupt flag
0x40001810 C FIELD 06w01 TRGIF: Trigger interrupt flag
0x40001810 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40001810 C FIELD 10w01 CH1OF: Channel 1 over capture flag
0x40001814 B REGISTER SWEVG (wo): event generation register
0x40001814 C FIELD 00w01 UPG: Update generation
0x40001814 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40001814 C FIELD 02w01 CH1G: Channel 1 capture or compare event generation
0x40001814 C FIELD 06w01 TRGG: Trigger event generation
0x40001818 B REGISTER CHCTL0_Input (rw): Channel control register 0 (input mode)
0x40001818 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40001818 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40001818 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40001818 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40001818 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40001818 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40001818 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40001818 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40001818 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40001818 C FIELD 08w02 CH1MS: Channel 1 mode selection
0x40001818 C FIELD 10w01 CH1COMFEN: Channel 1 output compare fast enable
0x40001818 C FIELD 10w02 CH1CAPPSC: Channel 1 input capture prescaler
0x40001818 C FIELD 11w01 CH1COMSEN: Channel 1 output compare shadow enable
0x40001818 C FIELD 12w03 CH1COMCTL: Channel 1 compare output control
0x40001818 C FIELD 12w04 CH1CAPFLT: Channel 1 input capture filter control
0x40001820 B REGISTER CHCTL2 (rw): Channel control register 2
0x40001820 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40001820 C FIELD 01w01 CH0P: Channel 0 capture/compare function polarity
0x40001820 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40001820 C FIELD 04w01 CH1EN: Channel 1 capture/compare function enable
0x40001820 C FIELD 05w01 CH1P: Channel 1 capture/compare function polarity
0x40001820 C FIELD 07w01 CH1NP: Channel 1 complementary output polarity
0x40001824 B REGISTER CNT (rw): Counter register
0x40001824 C FIELD 00w16 CNT: current counter value
0x40001828 B REGISTER PSC (rw): Prescaler register
0x40001828 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000182C B REGISTER CAR (rw): Counter auto reload register
0x4000182C C FIELD 00w16 CARL: Counter auto reload value
0x40001834 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40001834 C FIELD 00w16 CH0VAL: Capture or compare value of channel0
0x40001838 B REGISTER CH1CV (rw): Channel 1 capture/compare value register
0x40001838 C FIELD 00w16 CH1VAL: Capture or compare value of channel1
0x400018FC B REGISTER CFG (rw): configuration register
0x400018FC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40001C00 A PERIPHERAL TIMER12
0x40001C00 B REGISTER CTL0 (rw): control register 1
0x40001C00 C FIELD 00w01 CEN: Counter enable
0x40001C00 C FIELD 01w01 UPDIS: Update disable
0x40001C00 C FIELD 02w01 UPS: Update source
0x40001C00 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40001C00 C FIELD 08w02 CKDIV: Clock division
0x40001C0C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x40001C0C C FIELD 00w01 UPIE: Update interrupt enable
0x40001C0C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x40001C10 B REGISTER INTF (rw): interrupt flag register
0x40001C10 C FIELD 00w01 UPIF: Update interrupt flag
0x40001C10 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40001C10 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40001C14 B REGISTER SWEVG (wo): event generation register
0x40001C14 C FIELD 00w01 UPG: Update generation
0x40001C14 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40001C18 B REGISTER CHCTL0_Input (rw): Channel control register 0 ( (input mode)
0x40001C18 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40001C18 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40001C18 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40001C18 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40001C18 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40001C18 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40001C18 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40001C18 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40001C20 B REGISTER CHCTL2 (rw): Channel control register 2
0x40001C20 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40001C20 C FIELD 01w01 CH0P: Channel 0 capture/compare polarity
0x40001C20 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40001C24 B REGISTER CNT (rw): Counter register
0x40001C24 C FIELD 00w16 CNT: current counter value
0x40001C28 B REGISTER PSC (rw): Prescaler register
0x40001C28 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x40001C2C B REGISTER CAR (rw): Counter auto reload register
0x40001C2C C FIELD 00w16 CARL: Counter auto reload value
0x40001C34 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40001C34 C FIELD 00w16 CH0VAL: Capture or compare value of channel 0
0x40001C50 B REGISTER IRMP (rw): channel input remap register
0x40001C50 C FIELD 10w02 ITI1_RMP: Internal trigger input1 remap
0x40001CFC B REGISTER CFG (rw): configuration register
0x40001CFC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40002000 A PERIPHERAL TIMER13
0x40002000 B REGISTER CTL0 (rw): control register 1
0x40002000 C FIELD 00w01 CEN: Counter enable
0x40002000 C FIELD 01w01 UPDIS: Update disable
0x40002000 C FIELD 02w01 UPS: Update source
0x40002000 C FIELD 07w01 ARSE: Auto-reload shadow enable
0x40002000 C FIELD 08w02 CKDIV: Clock division
0x4000200C B REGISTER DMAINTEN (rw): DMA/Interrupt enable register
0x4000200C C FIELD 00w01 UPIE: Update interrupt enable
0x4000200C C FIELD 01w01 CH0IE: Channel 0 capture/compare interrupt enable
0x40002010 B REGISTER INTF (rw): interrupt flag register
0x40002010 C FIELD 00w01 UPIF: Update interrupt flag
0x40002010 C FIELD 01w01 CH0IF: Channel 0 capture/compare interrupt flag
0x40002010 C FIELD 09w01 CH0OF: Channel 0 over capture flag
0x40002014 B REGISTER SWEVG (wo): event generation register
0x40002014 C FIELD 00w01 UPG: Update generation
0x40002014 C FIELD 01w01 CH0G: Channel 0 capture or compare event generation
0x40002018 B REGISTER CHCTL0_Input (rw): Channel control register 0 ( (input mode)
0x40002018 B REGISTER CHCTL0_Output (rw): Channel control register 0 (output mode)
0x40002018 C FIELD 00w02 CH0MS: Channel 0 I/O mode selection
0x40002018 C FIELD 00w02 CH0MS: Channel 0 mode selection
0x40002018 C FIELD 02w01 CH0COMFEN: Channel 0 output compare fast enable
0x40002018 C FIELD 02w02 CH0CAPPSC: Channel 0 input capture prescaler
0x40002018 C FIELD 03w01 CH0COMSEN: Channel 0 compare output shadow enable
0x40002018 C FIELD 04w03 CH0COMCTL: Channel 0 compare output control
0x40002018 C FIELD 04w04 CH0CAPFLT: Channel 0 input capture filter control
0x40002020 B REGISTER CHCTL2 (rw): Channel control register 2
0x40002020 C FIELD 00w01 CH0EN: Channel 0 capture/compare function enable
0x40002020 C FIELD 01w01 CH0P: Channel 0 capture/compare polarity
0x40002020 C FIELD 03w01 CH0NP: Channel 0 complementary output polarity
0x40002024 B REGISTER CNT (rw): Counter register
0x40002024 C FIELD 00w16 CNT: current counter value
0x40002028 B REGISTER PSC (rw): Prescaler register
0x40002028 C FIELD 00w16 PSC: Prescaler value of the counter clock
0x4000202C B REGISTER CAR (rw): Counter auto reload register
0x4000202C C FIELD 00w16 CARL: Counter auto reload value
0x40002034 B REGISTER CH0CV (rw): Channel 0 capture/compare value register
0x40002034 C FIELD 00w16 CH0VAL: Capture or compare value of channel 0
0x40002050 B REGISTER IRMP (rw): channel input remap register
0x40002050 C FIELD 10w02 ITI1_RMP: Internal trigger input1 remap
0x400020FC B REGISTER CFG (rw): configuration register
0x400020FC C FIELD 01w01 CHVSEL: Write CHxVAL register selection
0x40002800 A PERIPHERAL RTC
0x40002800 B REGISTER TIME (rw): time register
0x40002800 C FIELD 00w04 SCU: Second units in BCD format
0x40002800 C FIELD 04w03 SCT: Second tens in BCD format
0x40002800 C FIELD 08w04 MNU: Minute units in BCD format
0x40002800 C FIELD 12w03 MNT: Minute tens in BCD format
0x40002800 C FIELD 16w04 HRU: Hour units in BCD format
0x40002800 C FIELD 20w02 HRT: Hour tens in BCD format
0x40002800 C FIELD 22w01 PM: AM/PM notation
0x40002804 B REGISTER DATE (rw): date register
0x40002804 C FIELD 00w04 DAYU: Date units in BCD code
0x40002804 C FIELD 04w02 DAYT: Date tens in BCD code
0x40002804 C FIELD 08w04 MONU: Month units in BCD code
0x40002804 C FIELD 12w01 MONT: Month tens in BCD code
0x40002804 C FIELD 13w03 DOW: Days of the week
0x40002804 C FIELD 16w04 YRU: Year units in BCD code
0x40002804 C FIELD 20w04 YRT: Year tens in BCD code
0x40002808 B REGISTER CTL: control register
0x40002808 C FIELD 00w03 WTCS (rw): Auto-wakeup timer clock selection
0x40002808 C FIELD 03w01 TSEG (rw): Valid event edge of time-stamp
0x40002808 C FIELD 04w01 REFEN (rw): Reference clock detection function enable enable (50 or 60 Hz)
0x40002808 C FIELD 05w01 BPSHAD (rw): Shadow registers bypass control
0x40002808 C FIELD 06w01 CS (rw): Clock System
0x40002808 C FIELD 07w01 CCEN (rw): Coarse calibration function enable
0x40002808 C FIELD 08w01 ALRM0EN (rw): Alarm-0 function enable
0x40002808 C FIELD 09w01 ALRM1EN (rw): Alarm-1 function enable
0x40002808 C FIELD 10w01 WTEN (rw): Auto-wakeup timer function enable
0x40002808 C FIELD 11w01 TSEN (rw): Time-stamp function enable
0x40002808 C FIELD 12w01 ALRM0IE (rw): RTC alarm-0 interrupt enable
0x40002808 C FIELD 13w01 ALRM1IE (rw): RTC alarm-1 interrupt enable
0x40002808 C FIELD 14w01 WTIE (rw): Auto-wakeup timer interrupt enable
0x40002808 C FIELD 15w01 TSIE (rw): Time-stamp interrupt enable
0x40002808 C FIELD 16w01 A1H (wo): Add 1 hour (summer time change)
0x40002808 C FIELD 17w01 S1H (wo): Subtract 1 hour (winter time change)
0x40002808 C FIELD 18w01 DSM (rw): Daylight saving mark
0x40002808 C FIELD 19w01 COS (rw): Calibration output selection
0x40002808 C FIELD 20w01 OPOL (rw): Output polarity
0x40002808 C FIELD 21w02 OS (rw): Output selection
0x40002808 C FIELD 23w01 COEN (rw): Calibration output enable
0x4000280C B REGISTER STAT: status register
0x4000280C C FIELD 00w01 ALRM0WF (ro): Alarm 0 configuration can be write flag
0x4000280C C FIELD 01w01 ALRM1WF (ro): Alarm 1 configuration can be write flag
0x4000280C C FIELD 02w01 WTWF (ro): Wakeup timer write enable flag
0x4000280C C FIELD 03w01 SOPF (rw): Shift function operation pending flag
0x4000280C C FIELD 04w01 YCM (ro): Year configuration mark
0x4000280C C FIELD 05w01 RSYNF (rw): Register synchronization flag
0x4000280C C FIELD 06w01 INITF (ro): Initialization state flag
0x4000280C C FIELD 07w01 INITM (rw): Enter initialization mode
0x4000280C C FIELD 08w01 ALRM0F (rw): Alarm-0 occurs flag
0x4000280C C FIELD 09w01 ALRM1F (rw): Alarm-1 occurs flag
0x4000280C C FIELD 10w01 WTF (rw): Wakeup timer flag
0x4000280C C FIELD 11w01 TSF (rw): Time-stamp flag
0x4000280C C FIELD 12w01 TSOVRF (rw): Time-stamp overflow flag
0x4000280C C FIELD 13w01 TP0F (rw): RTC_TAMP0 detected flag
0x4000280C C FIELD 14w01 TP1F (rw): RTC_TAMP1 detected flag
0x4000280C C FIELD 16w01 SCPF (ro): Smooth calibration pending flag
0x40002810 B REGISTER PSC (rw): prescaler register
0x40002810 C FIELD 00w15 FACTOR_S: Synchronous prescaler factor
0x40002810 C FIELD 16w07 FACTOR_A: Asynchronous prescaler factor
0x40002814 B REGISTER WUT (rw): Wakeup timer register
0x40002814 C FIELD 00w16 WTRV: Auto-wakeup timer reloads value
0x40002818 B REGISTER COSC (rw): Coarse calibration register
0x40002818 C FIELD 00w05 COSS: Coarse Calibration step
0x40002818 C FIELD 07w01 COSD: Coarse Calibration direction
0x4000281C B REGISTER ALRM0TD (rw): Alarm 0 time and date register
0x4000281C C FIELD 00w04 SCU: Second units in BCD code.
0x4000281C C FIELD 04w03 SCT: Second tens in BCD code.
0x4000281C C FIELD 07w01 MSKS: Alarm seconds mask bit
0x4000281C C FIELD 08w04 MNU: Minute units in BCD code.
0x4000281C C FIELD 12w03 MNT: Minute tens in BCD code.
0x4000281C C FIELD 15w01 MSKM: Alarm minutes mask bit
0x4000281C C FIELD 16w04 HRU: Hour units in BCD code.
0x4000281C C FIELD 20w02 HRT: Hour tens in BCD code.
0x4000281C C FIELD 22w01 PM: AM/PM flag
0x4000281C C FIELD 23w01 MSKH: Alarm hours mask bit
0x4000281C C FIELD 24w04 DAYU: Date units or week day in BCD code.
0x4000281C C FIELD 28w02 DAYT: Date tens in BCD code.
0x4000281C C FIELD 30w01 DOWS: Day of the week selected
0x4000281C C FIELD 31w01 MSKD: Alarm date mask bit
0x40002820 B REGISTER ALRM1TD (rw): Alarm 1 time and date register
0x40002820 C FIELD 00w04 SCU: Second units in BCD code.
0x40002820 C FIELD 04w03 SCT: Second tens in BCD code.
0x40002820 C FIELD 07w01 MSKS: Alarm seconds mask bit
0x40002820 C FIELD 08w04 MNU: Minute units in BCD code.
0x40002820 C FIELD 12w03 MNT: Minute tens in BCD code.
0x40002820 C FIELD 15w01 MSKM: Alarm minutes mask bit
0x40002820 C FIELD 16w04 HRU: Hour units in BCD code.
0x40002820 C FIELD 20w02 HRT: Hour tens in BCD code.
0x40002820 C FIELD 22w01 PM: AM/PM flag
0x40002820 C FIELD 23w01 MSKH: Alarm hours mask bit
0x40002820 C FIELD 24w04 DAYU: Date units or week day in BCD code.
0x40002820 C FIELD 28w02 DAYT: Date tens in BCD code.
0x40002820 C FIELD 30w01 DOWS: Day of the week selected
0x40002820 C FIELD 31w01 MSKD: Alarm date mask bit
0x40002824 B REGISTER WPK (wo): write protection register
0x40002824 C FIELD 00w08 WPK: Write protection key
0x40002828 B REGISTER SS (ro): sub second register
0x40002828 C FIELD 00w16 SSC: Sub second value
0x4000282C B REGISTER SHIFTCTL (wo): shift function control register
0x4000282C C FIELD 00w15 SFS: Subtract a fraction of a second
0x4000282C C FIELD 31w01 A1S: One second add
0x40002830 B REGISTER TTS (ro): Time of time stamp register
0x40002830 C FIELD 00w04 SCU: Second units in BCD code.
0x40002830 C FIELD 04w03 SCT: Second tens in BCD code.
0x40002830 C FIELD 08w04 MNU: Minute units in BCD code.
0x40002830 C FIELD 12w03 MNT: Minute tens in BCD code.
0x40002830 C FIELD 16w04 HRU: Hour units in BCD code.
0x40002830 C FIELD 20w02 HRT: Hour tens in BCD code.
0x40002830 C FIELD 22w01 PM: AM/PM mark
0x40002834 B REGISTER DTS (ro): Date of time stamp register
0x40002834 C FIELD 00w04 DAYU: Date units in BCD format
0x40002834 C FIELD 04w02 DAYT: Date tens in BCD format
0x40002834 C FIELD 08w04 MONU: Month units in BCD format
0x40002834 C FIELD 12w01 MONT: Month tens in BCD format
0x40002834 C FIELD 13w03 DOW: Week day units
0x40002838 B REGISTER SSTS (ro): Sub second of time stamp register
0x40002838 C FIELD 00w16 SSC: Sub second value
0x4000283C B REGISTER HRFC (rw): calibration register
0x4000283C C FIELD 00w09 CMSK: Calibration mask number
0x4000283C C FIELD 13w01 CWND16: Frequency compensation window 16 second selected
0x4000283C C FIELD 14w01 CWND8: Frequency compensation window 8 second selected
0x4000283C C FIELD 15w01 FREQI: Increase RTC frequency by 488.5PPM
0x40002840 B REGISTER TAMP (rw): tamper and alternate function configuration register
0x40002840 C FIELD 00w01 TP0EN: Tamper 0 detection enable
0x40002840 C FIELD 01w01 TP0EG: Tamper 0 event trigger edge
0x40002840 C FIELD 02w01 TPIE: Tamper detection interrupt enable
0x40002840 C FIELD 03w01 TP1EN: Tamper 1 detection enable
0x40002840 C FIELD 04w01 TP1EG: Tamper 1 event trigger edge
0x40002840 C FIELD 07w01 TPTS: Make tamper function used for timestamp function
0x40002840 C FIELD 08w03 FREQ: Sampling frequency of tamper event detection
0x40002840 C FIELD 11w02 FLT: RTC_TAMPx filter count setting
0x40002840 C FIELD 13w02 PRCH: Pre-charge duration time of RTC_TAMPx
0x40002840 C FIELD 15w01 DISPU: RTC_TAMPx pull-up disable
0x40002840 C FIELD 16w01 TP0SEL: Tamper 0 function input mapping selection
0x40002840 C FIELD 17w01 TSSEL: Timestamp input mapping selection
0x40002840 C FIELD 18w01 AOT: RTC_ALARM Output Type
0x40002844 B REGISTER ALRM0SS (rw): alarm A sub second register
0x40002844 C FIELD 00w15 SSC: Alarm sub second value
0x40002844 C FIELD 24w04 MSKSSC: Mask control bit of SSC
0x40002848 B REGISTER ALRM1SS (rw): Alarm 1 sub second register
0x40002848 C FIELD 00w15 SSC: Alarm sub second value
0x40002848 C FIELD 24w04 MSKSSC: Mask control bit of SSC
0x40002850 B REGISTER BKP0 (rw): backup register
0x40002850 C FIELD 00w32 DATA: BKP
0x40002854 B REGISTER BKP1 (rw): backup register
0x40002854 C FIELD 00w32 DATA: Data
0x40002858 B REGISTER BKP2 (rw): backup register
0x40002858 C FIELD 00w32 DATA: Data
0x4000285C B REGISTER BKP3 (rw): backup register
0x4000285C C FIELD 00w32 DATA: Data
0x40002860 B REGISTER BKP4 (rw): backup register
0x40002860 C FIELD 00w32 DATA: Data
0x40002864 B REGISTER BKP5 (rw): backup register
0x40002864 C FIELD 00w32 DATA: Data
0x40002868 B REGISTER BKP6 (rw): backup register
0x40002868 C FIELD 00w32 DATA: Data
0x4000286C B REGISTER BKP7 (rw): backup register
0x4000286C C FIELD 00w32 DATA: Data
0x40002870 B REGISTER BKP8 (rw): backup register
0x40002870 C FIELD 00w32 DATA: Data
0x40002874 B REGISTER BKP9 (rw): backup register
0x40002874 C FIELD 00w32 DATA: Data
0x40002878 B REGISTER BKP10 (rw): backup register
0x40002878 C FIELD 00w32 DATA: Data
0x4000287C B REGISTER BKP11 (rw): backup register
0x4000287C C FIELD 00w32 DATA: Data
0x40002880 B REGISTER BKP12 (rw): backup register
0x40002880 C FIELD 00w32 DATA: Data
0x40002884 B REGISTER BKP13 (rw): backup register
0x40002884 C FIELD 00w32 DATA: Data
0x40002888 B REGISTER BKP14 (rw): backup register
0x40002888 C FIELD 00w32 DATA: Data
0x4000288C B REGISTER BKP15 (rw): backup register
0x4000288C C FIELD 00w32 DATA: Data
0x40002890 B REGISTER BKP16 (rw): backup register
0x40002890 C FIELD 00w32 DATA: Data
0x40002894 B REGISTER BKP17 (rw): backup register
0x40002894 C FIELD 00w32 DATA: Data
0x40002898 B REGISTER BKP18 (rw): backup register
0x40002898 C FIELD 00w32 DATA: Data
0x4000289C B REGISTER BKP19 (rw): backup register
0x4000289C C FIELD 00w32 DATA: Data
0x40002C00 A PERIPHERAL WWDGT
0x40002C00 B REGISTER CTL (rw): Control register
0x40002C00 C FIELD 00w07 CNT: 7-bit counter
0x40002C00 C FIELD 07w01 WDGTEN: Activation bit
0x40002C04 B REGISTER CFG (rw): Configuration register
0x40002C04 C FIELD 00w07 WIN: 7-bit window value
0x40002C04 C FIELD 07w02 PSC: Prescaler
0x40002C04 C FIELD 09w01 EWIE: Early wakeup interrupt
0x40002C08 B REGISTER STAT (rw): Status register
0x40002C08 C FIELD 00w01 EWIF: Early wakeup interrupt flag
0x40003000 A PERIPHERAL FWDGT
0x40003000 B REGISTER CTL (wo): Control register
0x40003000 C FIELD 00w16 CMD: Key value
0x40003004 B REGISTER PSC (rw): Prescaler register
0x40003004 C FIELD 00w03 PSC: Prescaler divider
0x40003008 B REGISTER RLD (rw): Reload register
0x40003008 C FIELD 00w12 RLD: Free watchdog timer counter reload value
0x4000300C B REGISTER STAT (ro): Status register
0x4000300C C FIELD 00w01 PUD: Free watchdog timer prescaler value update
0x4000300C C FIELD 01w01 RUD: Free watchdog timer counter reload value update
0x40003400 A PERIPHERAL I2S1_add
0x40003400 B REGISTER CTL0 (rw): control register 0
0x40003400 C FIELD 00w01 CKPH: Clock Phase Selection
0x40003400 C FIELD 01w01 CKPL: Clock polarity Selection
0x40003400 C FIELD 02w01 MSTMOD: Master Mode Enable
0x40003400 C FIELD 03w03 PSC: Master Clock Prescaler Selection
0x40003400 C FIELD 06w01 SPIEN: SPI enable
0x40003400 C FIELD 07w01 LF: LSB First Mode
0x40003400 C FIELD 08w01 SWNSS: NSS Pin Selection In NSS Software Mode
0x40003400 C FIELD 09w01 SWNSSEN: NSS Software Mode Selection
0x40003400 C FIELD 10w01 RO: Receive only
0x40003400 C FIELD 11w01 FF16: Data frame format
0x40003400 C FIELD 12w01 CRCNT: CRC Next Transfer
0x40003400 C FIELD 13w01 CRCEN: CRC Calculation Enable
0x40003400 C FIELD 14w01 BDOEN: Bidirectional Transmit output enable
0x40003400 C FIELD 15w01 BDEN: Bidirectional enable
0x40003404 B REGISTER CTL1 (rw): control register 1
0x40003404 C FIELD 00w01 DMAREN: Rx buffer DMA enable
0x40003404 C FIELD 01w01 DMATEN: Transmit Buffer DMA Enable
0x40003404 C FIELD 02w01 NSSDRV: Drive NSS Output
0x40003404 C FIELD 04w01 TMOD: SPI TI Mode Enable
0x40003404 C FIELD 05w01 ERRIE: Error interrupt enable
0x40003404 C FIELD 06w01 RBNEIE: RX buffer not empty interrupt enable
0x40003404 C FIELD 07w01 TBEIE: Tx buffer empty interrupt enable
0x40003408 B REGISTER STAT: status register
0x40003408 C FIELD 00w01 RBNE (ro): Receive Buffer Not Empty
0x40003408 C FIELD 01w01 TBE (ro): Transmit Buffer Empty
0x40003408 C FIELD 02w01 I2SCH (ro): I2S channel side
0x40003408 C FIELD 03w01 TXURERR (ro): Transmission underrun error bit
0x40003408 C FIELD 04w01 CRCERR (rw): SPI CRC Error Bit
0x40003408 C FIELD 05w01 CONFERR (ro): SPI Configuration error
0x40003408 C FIELD 06w01 RXORERR (ro): Reception Overrun Error Bit
0x40003408 C FIELD 07w01 TRANS (ro): Transmitting On-going Bit
0x40003408 C FIELD 08w01 FERR (rw): Format Error
0x4000340C B REGISTER DATA (rw): data register
0x4000340C C FIELD 00w16 SPI_DATA: Data transfer register
0x40003410 B REGISTER CPCPOLY (rw): CRC polynomial register
0x40003410 C FIELD 00w16 CPR: CRC polynomial register
0x40003414 B REGISTER RCRC (ro): RX CRC register
0x40003414 C FIELD 00w16 RCR: RX CRC register
0x40003418 B REGISTER TCRC (ro): TX CRC register
0x40003418 C FIELD 00w16 TCR: Tx CRC register
0x4000341C B REGISTER I2SCTL (rw): I2S control register
0x4000341C C FIELD 00w01 CHLEN: Channel length (number of bits per audio channel)
0x4000341C C FIELD 01w02 DTLEN: Data length
0x4000341C C FIELD 03w01 CKPL: Idle state clock polarity
0x4000341C C FIELD 04w02 I2SSTD: I2S standard selection
0x4000341C C FIELD 07w01 PCMSMOD: PCM frame synchronization mode
0x4000341C C FIELD 08w02 I2SOPMOD: I2S operation mode
0x4000341C C FIELD 10w01 I2SEN: I2S Enable
0x4000341C C FIELD 11w01 I2SSEL: I2S mode selection
0x40003420 B REGISTER I2SPSC (rw): I2S prescaler register
0x40003420 C FIELD 00w08 DIV: Dividing factor for the prescaler
0x40003420 C FIELD 08w01 OF: Odd factor for the prescaler
0x40003420 C FIELD 09w01 MCKOEN: I2S_MCK output enable
0x40003800 A PERIPHERAL SPI1
0x40003800 B REGISTER CTL0 (rw): control register 0
0x40003800 C FIELD 00w01 CKPH: Clock Phase Selection
0x40003800 C FIELD 01w01 CKPL: Clock polarity Selection
0x40003800 C FIELD 02w01 MSTMOD: Master Mode Enable
0x40003800 C FIELD 03w03 PSC: Master Clock Prescaler Selection
0x40003800 C FIELD 06w01 SPIEN: SPI enable
0x40003800 C FIELD 07w01 LF: LSB First Mode
0x40003800 C FIELD 08w01 SWNSS: NSS Pin Selection In NSS Software Mode
0x40003800 C FIELD 09w01 SWNSSEN: NSS Software Mode Selection
0x40003800 C FIELD 10w01 RO: Receive only
0x40003800 C FIELD 11w01 FF16: Data frame format
0x40003800 C FIELD 12w01 CRCNT: CRC Next Transfer
0x40003800 C FIELD 13w01 CRCEN: CRC Calculation Enable
0x40003800 C FIELD 14w01 BDOEN: Bidirectional Transmit output enable
0x40003800 C FIELD 15w01 BDEN: Bidirectional enable
0x40003804 B REGISTER CTL1 (rw): control register 1
0x40003804 C FIELD 00w01 DMAREN: Rx buffer DMA enable
0x40003804 C FIELD 01w01 DMATEN: Transmit Buffer DMA Enable
0x40003804 C FIELD 02w01 NSSDRV: Drive NSS Output
0x40003804 C FIELD 04w01 TMOD: SPI TI Mode Enable
0x40003804 C FIELD 05w01 ERRIE: Error interrupt enable
0x40003804 C FIELD 06w01 RBNEIE: RX buffer not empty interrupt enable
0x40003804 C FIELD 07w01 TBEIE: Tx buffer empty interrupt enable
0x40003808 B REGISTER STAT: status register
0x40003808 C FIELD 00w01 RBNE (ro): Receive Buffer Not Empty
0x40003808 C FIELD 01w01 TBE (ro): Transmit Buffer Empty
0x40003808 C FIELD 02w01 I2SCH (ro): I2S channel side
0x40003808 C FIELD 03w01 TXURERR (ro): Transmission underrun error bit
0x40003808 C FIELD 04w01 CRCERR (rw): SPI CRC Error Bit
0x40003808 C FIELD 05w01 CONFERR (ro): SPI Configuration error
0x40003808 C FIELD 06w01 RXORERR (ro): Reception Overrun Error Bit
0x40003808 C FIELD 07w01 TRANS (ro): Transmitting On-going Bit
0x40003808 C FIELD 08w01 FERR (rw): Format Error
0x4000380C B REGISTER DATA (rw): data register
0x4000380C C FIELD 00w16 SPI_DATA: Data transfer register
0x40003810 B REGISTER CPCPOLY (rw): CRC polynomial register
0x40003810 C FIELD 00w16 CPR: CRC polynomial register
0x40003814 B REGISTER RCRC (ro): RX CRC register
0x40003814 C FIELD 00w16 RCR: RX CRC register
0x40003818 B REGISTER TCRC (ro): TX CRC register
0x40003818 C FIELD 00w16 TCR: Tx CRC register
0x4000381C B REGISTER I2SCTL (rw): I2S control register
0x4000381C C FIELD 00w01 CHLEN: Channel length (number of bits per audio channel)
0x4000381C C FIELD 01w02 DTLEN: Data length
0x4000381C C FIELD 03w01 CKPL: Idle state clock polarity
0x4000381C C FIELD 04w02 I2SSTD: I2S standard selection
0x4000381C C FIELD 07w01 PCMSMOD: PCM frame synchronization mode
0x4000381C C FIELD 08w02 I2SOPMOD: I2S operation mode
0x4000381C C FIELD 10w01 I2SEN: I2S Enable
0x4000381C C FIELD 11w01 I2SSEL: I2S mode selection