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DSLX DMA: Implementation
Signed-off-by: Michal Czyz <[email protected]>
1 parent d381e14 commit 035355f

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‎.github/actions/build/action.yml

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name: build
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description: 'Build XLS'
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runs:
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using: "composite"
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steps:
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- name: Cache
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uses: ./.github/actions/cache
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- name: Install dependencies via apt
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shell: bash
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run: sudo apt-get install python3-distutils python3-dev python-is-python3 libtinfo5 build-essential liblapack-dev libblas-dev gfortran
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- name: Install bazelisk
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shell: bash
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run: |
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curl -LO "https://github.com/bazelbuild/bazelisk/releases/download/v1.19.0/bazelisk-linux-amd64"
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mkdir -p "${GITHUB_WORKSPACE}/bin/"
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mv bazelisk-linux-amd64 "${GITHUB_WORKSPACE}/bin/bazel"
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chmod +x "${GITHUB_WORKSPACE}/bin/bazel"
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- name: Bazel Build Tools (opt)
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shell: bash
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run: |
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"${GITHUB_WORKSPACE}/bin/bazel" build --local_cpu_resources=HOST_CPUS-1 --local_ram_resources=HOST_RAM*.9 -c opt --test_output=errors -- //xls/dslx:interpreter_main //xls/dslx/ir_convert:ir_converter_main //xls/tools:opt_main //xls/tools:codegen_main
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‎.github/actions/cache/action.yml

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name: cache
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description: 'Cache Bazel'
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runs:
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using: "composite"
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steps:
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- name: Mount Bazel Cache
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uses: actions/cache@v4
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with:
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path: "~/.cache/bazel"
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# Create/use a cache called bazel-cache-22_04-<commit hash>
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# and read the latest cache with prefix bazel-cache-22_04-
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# if it doesn't already exist.
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key: bazel-cache-22_04-${{ github.sha }}
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restore-keys: bazel-cache-22_04-

‎.github/actions/free-disk/action.yml

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name: free-disk
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description: 'Removes unused files from runner'
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# WARNING
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# This is not a 100% safe method of reclaiming space.
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# Your workflow may depend on removed files.
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runs:
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using: "composite"
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steps:
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- name: Increase build space
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shell: bash
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run: |
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echo "Before cleanup"
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df -H
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sudo rm -rf /usr/share/dotnet/*
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sudo rm -rf /usr/local/lib/android/*
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sudo rm -rf /usr/share/dotnet
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sudo rm -rf /opt/ghc
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sudo rm -rf "/usr/local/share/boost"
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sudo rm -rf "$AGENT_TOOLSDIRECTORY"
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echo "After cleanup"
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df -H

‎.github/actions/implementation/action.yml

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name: implementation
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description: 'DSLX to Openroad P&R'
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inputs:
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xls_module:
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description: 'Module in //xls/modules'
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required: true
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default: 'xls/modules/dma'
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rule_ir:
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description: 'Bazel rule to generate optimized IR'
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required: true
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default: 'csr_opt_ir_benchmark'
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rule_verilog:
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description: 'Bazel rule to generate verilog'
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required: true
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default: 'verilog_csr'
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rule_synthesis:
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description: 'Bazel rule to synthesize verilog'
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required: true
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default: 'csr_benchmark_synth'
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rule_pnr:
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description: 'Bazel rule to place and route'
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required: true
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default: 'csr_place_and_route'
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runs:
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using: "composite"
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steps:
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- uses: ./.github/actions/cache
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- name: Summary page
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shell: bash
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run: |
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echo "Module ${{inputs.xls_module}}" >> $GITHUB_STEP_SUMMARY
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- name: IR
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shell: bash
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run: |
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bazel run --local_cpu_resources=HOST_CPUS-1 --local_ram_resources=HOST_RAM*.9 ${{inputs.xls_module}}:${{inputs.rule_ir}}
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- name: Summary page
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shell: bash
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run: |
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echo "Generate IR :white_check_mark:" >> $GITHUB_STEP_SUMMARY
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- name: Verilog
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shell: bash
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run: |
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bazel build --local_cpu_resources=HOST_CPUS-1 --local_ram_resources=HOST_RAM*.9 ${{inputs.xls_module}}:${{inputs.rule_verilog}}
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- name: Summary page
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shell: bash
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run: |
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echo "Verilog codegen :white_check_mark:" >> $GITHUB_STEP_SUMMARY
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- name: Synthesis
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shell: bash
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run: |
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bazel run --local_cpu_resources=HOST_CPUS-1 --local_ram_resources=HOST_RAM*.9 ${{inputs.xls_module}}:${{inputs.rule_synthesis}}
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- name: Summary page
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shell: bash
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run: |
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echo -n "Synthesis :white_check_mark:" >> $GITHUB_STEP_SUMMARY
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- name: P&R
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shell: bash
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run: |
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bazel build --local_cpu_resources=HOST_CPUS-1 --local_ram_resources=HOST_RAM*.9 ${{inputs.xls_module}}:${{inputs.rule_pnr}}
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- name: Summary page
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shell: bash
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run: |
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echo -n "Place & Route :white_check_mark:" >> $GITHUB_STEP_SUMMARY
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# ${variable/character_to_replace/new_character}
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# ${variable/ slash / underscore }
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- name: Prepare artifact name
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if: always()
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shell: bash
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run: |
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name_input=${{inputs.xls_module}}/${{inputs.rule_ir}}
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name_output="${name_input//\//_}"
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echo "artifact_name=${name_output}" >> "$GITHUB_ENV"
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- name: Artifacts
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if: always()
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uses: actions/upload-artifact@v4
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with:
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name: artifacts-impl-${{ env.artifact_name }}
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path: |
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./bazel-bin/${{inputs.xls_module}}/*.log
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./bazel-bin/${{inputs.xls_module}}/*.textproto
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./bazel-bin/${{inputs.xls_module}}/*.ir
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./bazel-bin/${{inputs.xls_module}}/*.v
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./bazel-bin/${{inputs.xls_module}}/*.sv

‎.github/actions/test/action.yml

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name: test
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description: 'DSLX Test'
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inputs:
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xls_module:
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description: 'Module in //xls/modules'
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required: true
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default: 'xls/modules/dma'
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rule_test:
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description: 'Bazel rule to test DSLX'
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required: true
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default: 'test_csr'
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runs:
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using: "composite"
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steps:
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- uses: ./.github/actions/cache
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- name: IR
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shell: bash
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env:
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BAZEL_RESOURCES_OPT: "--local_cpu_resources=HOST_CPUS-1 --local_ram_resources=HOST_RAM*.9"
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BAZEL_RUN_OPT: ""
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run: |
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bazel run ${BAZEL_RESOURCES_OPT} ${BAZEL_RUN_OPT} ${{inputs.xls_module}}/${{inputs.rule_test}}

‎.github/scripts/validate_json.py

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# Copyright 2024 The XLS Authors
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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import json
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import os
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# Execution
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# In root dir: python .github/scripts/validate_json.py
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# This script uses bazel query to check if each target defined
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# in the xls-modules.json exists in the BUILD.
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json_file = open('.github/workflows/xls-modules.json')
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data = json.load(json_file)
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json_file.close()
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bazel_rules = []
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for module in data['module']:
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for type in ["rule_ir", "rule_verilog", "rule_synthesis", "rule_pnr"]:
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bazel_rule = "bazel query " + module['xls_module'] + ":" + module[type]
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bazel_rules.append(bazel_rule)
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for bazel_rule in bazel_rules:
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RC = os.system(bazel_rule)
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assert RC == 0

‎.github/workflows/xls-modules.json

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{
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"module": [
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{
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"xls_module": "//xls/modules/dma",
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"rule_ir": "csr_opt_ir_benchmark",
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"rule_verilog": "verilog_csr",
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"rule_synthesis": "csr_benchmark_synth",
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"rule_pnr": "csr_place_and_route"
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},
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{
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"xls_module": "//xls/modules/dma",
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"rule_ir": "axi_csr_opt_ir_benchmark",
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"rule_verilog": "verilog_axi_csr",
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"rule_synthesis": "axi_csr_benchmark_synth",
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"rule_pnr": "axi_csr_place_and_route"
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},
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{
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"xls_module": "//xls/modules/dma",
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"rule_ir": "address_generator_opt_ir_benchmark",
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"rule_verilog": "verilog_address_generator",
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"rule_synthesis": "address_generator_benchmark_synth",
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"rule_pnr": "address_generator_place_and_route"
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},
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{
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"xls_module": "//xls/modules/dma",
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"rule_ir": "frontend_reader_opt_ir_benchmark",
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"rule_verilog": "verilog_frontend_reader",
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"rule_synthesis": "frontend_reader_benchmark_synth",
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"rule_pnr": "frontend_reader_place_and_route"
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},
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{
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"xls_module": "//xls/modules/dma",
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"rule_ir": "frontend_writer_opt_ir_benchmark",
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"rule_verilog": "verilog_frontend_writer",
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"rule_synthesis": "frontend_writer_benchmark_synth",
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"rule_pnr": "frontend_writer_place_and_route"
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}
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]
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}

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