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mtdudekmtdudek
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[DSLX] Add advanced RunLengthEncoder
This encoder is capable of ingesting multiple symbols and produces multiple compressed pairs. It should offer faster compression in exchange for area used. Signed-off-by: Maciej Dudek <[email protected]>
1 parent 0c95190 commit bcd00e3

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‎xls/modules/rle/BUILD

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@@ -106,6 +106,215 @@ xls_benchmark_ir(
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},
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)
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xls_dslx_library(
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name = "rle_enc_adv_reduce_stage_dslx",
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srcs = [
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"rle_enc_adv_reduce_stage.x",
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],
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deps = [
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":rle_common_dslx"
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],
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)
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xls_dslx_test(
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name = "rle_enc_adv_reduce_stage_dslx_test",
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dslx_test_args = {
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"compare": "none",
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},
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library = "rle_enc_adv_reduce_stage_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_reduce_stage_dslx_ir_test",
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dslx_test_args = {
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"compare": "interpreter",
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},
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library = "rle_enc_adv_reduce_stage_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_reduce_stage_dslx_jit_test",
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dslx_test_args = {
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"compare": "jit",
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},
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library = "rle_enc_adv_reduce_stage_dslx",
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)
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xls_dslx_library(
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name = "rle_enc_adv_realign_stage_dslx",
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srcs = [
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"rle_enc_adv_realign_stage.x",
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],
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deps = [
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":rle_common_dslx"
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],
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)
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xls_dslx_test(
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name = "rle_enc_adv_realign_stage_dslx_test",
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dslx_test_args = {
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"compare": "none",
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},
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library = "rle_enc_adv_realign_stage_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_realign_stage_dslx_ir_test",
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dslx_test_args = {
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"compare": "interpreter",
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},
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library = "rle_enc_adv_realign_stage_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_realign_stage_dslx_jit_test",
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dslx_test_args = {
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"compare": "jit",
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},
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library = "rle_enc_adv_realign_stage_dslx",
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)
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xls_dslx_library(
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name = "rle_enc_adv_core_dslx",
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srcs = [
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"rle_enc_adv_core.x",
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],
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deps = [
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":rle_common_dslx"
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],
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)
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xls_dslx_test(
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name = "rle_enc_adv_core_dslx_test",
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dslx_test_args = {
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"compare": "none",
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},
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library = "rle_enc_adv_core_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_core_dslx_ir_test",
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dslx_test_args = {
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"compare": "interpreter",
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},
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library = "rle_enc_adv_core_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_core_dslx_jit_test",
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dslx_test_args = {
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"compare": "jit",
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},
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library = "rle_enc_adv_core_dslx",
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)
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xls_dslx_library(
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name = "rle_enc_adv_adjust_width_stage_dslx",
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srcs = [
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"rle_enc_adv_adjust_width_stage.x",
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],
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deps = [
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":rle_common_dslx"
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],
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)
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xls_dslx_test(
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name = "rle_enc_adv_adjust_width_stage_dslx_test",
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dslx_test_args = {
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"compare": "none",
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},
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library = "rle_enc_adv_adjust_width_stage_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_adjust_width_stage_dslx_ir_test",
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dslx_test_args = {
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"compare": "interpreter",
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},
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library = "rle_enc_adv_adjust_width_stage_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_adjust_width_stage_dslx_jit_test",
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dslx_test_args = {
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"compare": "jit",
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},
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library = "rle_enc_adv_adjust_width_stage_dslx",
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)
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xls_dslx_library(
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name = "rle_enc_adv_dslx",
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srcs = [
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"rle_enc_adv.x",
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],
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deps = [
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":rle_common_dslx",
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":rle_enc_adv_reduce_stage_dslx",
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":rle_enc_adv_realign_stage_dslx",
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":rle_enc_adv_core_dslx",
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":rle_enc_adv_adjust_width_stage_dslx",
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],
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)
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xls_dslx_test(
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name = "rle_enc_adv_dslx_test",
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dslx_test_args = {
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"compare": "none",
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},
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library = "rle_enc_adv_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_dslx_ir_test",
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dslx_test_args = {
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"compare": "interpreter",
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},
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library = "rle_enc_adv_dslx",
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)
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xls_dslx_test(
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name = "rle_enc_adv_dslx_jit_test",
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dslx_test_args = {
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"compare": "jit",
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},
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library = "rle_enc_adv_dslx",
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)
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xls_dslx_ir(
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name = "rle_enc_adv_ir",
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dslx_top = "RunLengthEncoder8_8_4_2",
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library = "rle_enc_adv_dslx",
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ir_file = "rle_enc_adv.ir",
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)
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xls_ir_opt_ir(
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name = "rle_enc_adv_opt_ir",
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src = "rle_enc_adv.ir",
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top = "__xls_modules_rle_rle_enc_adv_core__RunLengthEncoder8_8_4_2__RunLengthEncoderAdvanced__RunLengthEncoderAdvancedCoreStage_0__8_4_8_next",
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)
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xls_ir_verilog(
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name = "rle_enc_adv_verilog",
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src = ":rle_enc_adv_opt_ir.opt.ir",
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verilog_file = "rle_enc_adv.v",
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codegen_args = {
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"module_name": "rle_enc_adv",
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"delay_model": "unit",
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"pipeline_stages": "2",
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"reset": "rst",
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"use_system_verilog": "false",
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},
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)
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xls_benchmark_ir(
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name = "rle_enc_adv_ir_benchmark",
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src = ":rle_enc_adv_opt_ir.opt.ir",
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benchmark_ir_args = {
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"pipeline_stages": "2",
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"delay_model": "unit",
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}
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)
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xls_dslx_library(
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name = "rle_dec_dslx",
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srcs = [

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