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gre-gorngre-gorn
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CPU 6502 implementation
Full implementation of 6502 CPU
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8 files changed

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8 files changed

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‎65C02.csproj

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<Project Sdk="Microsoft.NET.Sdk">
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<PropertyGroup>
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<OutputType>Exe</OutputType>
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<TargetFramework>net5.0</TargetFramework>
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<RootNamespace>CPU6502</RootNamespace>
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<AssemblyName>CPU6502</AssemblyName>
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</PropertyGroup>
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</Project>

‎65C02.sln

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Microsoft Visual Studio Solution File, Format Version 12.00
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# Visual Studio Version 16
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VisualStudioVersion = 16.0.32126.315
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MinimumVisualStudioVersion = 10.0.40219.1
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Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "65C02", "65C02.csproj", "{D31177AD-0E61-4B06-91E3-B790A57B84AE}"
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EndProject
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Global
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GlobalSection(SolutionConfigurationPlatforms) = preSolution
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Debug|Any CPU = Debug|Any CPU
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Release|Any CPU = Release|Any CPU
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EndGlobalSection
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GlobalSection(ProjectConfigurationPlatforms) = postSolution
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{D31177AD-0E61-4B06-91E3-B790A57B84AE}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
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{D31177AD-0E61-4B06-91E3-B790A57B84AE}.Debug|Any CPU.Build.0 = Debug|Any CPU
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{D31177AD-0E61-4B06-91E3-B790A57B84AE}.Release|Any CPU.ActiveCfg = Release|Any CPU
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{D31177AD-0E61-4B06-91E3-B790A57B84AE}.Release|Any CPU.Build.0 = Release|Any CPU
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EndGlobalSection
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GlobalSection(SolutionProperties) = preSolution
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HideSolutionNode = FALSE
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EndGlobalSection
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GlobalSection(ExtensibilityGlobals) = postSolution
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SolutionGuid = {DC9F3E9D-93B8-40B4-A031-9301A693934A}
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EndGlobalSection
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EndGlobal

‎ANTIC.cs

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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Text;
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using System.Threading.Tasks;
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namespace Emulators
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{
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/*
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* https://en.wikipedia.org/wiki/ANTIC
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*/
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public class ANTIC
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{
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public enum GraphicMode
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{
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Null,
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}
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//When CPU writes value to RAM ANTIC reads that value from RAM
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//For below table we need to:
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//- read value for 'Write' registers
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//- write value for 'Read' registers
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/*
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DMACTL | Direct Memory Access Control | Write | $D400 | 54272 | SDMCTL | $022F | 559
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CHACTL | Character Control | Write | $D401 | 54273 | CHART | $02F3 | 755
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DLISTL | Display List Pointer (low byte) | Write | $D402 | 54274 | SDLSTL | $0230 | 560
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DLISTH | Display List Pointer (high byte) | Write | $D403 | 54275 | SDLSTH | $0231 | 561
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HSCROL | Horizontal Fine Scroll | Write | $D404 | 54276
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VSCROL | Vertical Fine Scroll | Write | $D405 | 54277
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PMBASE | Player/Missile Base Address | Write | $D407 | 54279
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CHBASE | Character Set Base Address | Write | $D409 | 54281 | CHBAS | $02F4 | 756
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WSYNC | Wait for Horizontal Sync | Write | $D40A | 54282
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VCOUNT | Vertical Line Counter | Read | $D40B | 54283
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PENH | Light Pen Horizontal Position | Read | $D40C | 54284 | LPENH | $0234 | 564
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PENV | Light Pen Vertical Position | Read | $D40D | 54285 | LPENV | $0235 | 565
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NMIEN | Non-Maskable Interrupt (NMI) Enable | Write | $D40E | 54286
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NMIRES | Non-Maskable Interrupt (NMI) Reset | Write | $D40F | 54287
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NMIST | Non-Maskable Interrupt (NMI) Status | Read | $D40F | 54287
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*/
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//ANTIC registers
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//direct memory acces control, write, 0xd400
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byte DMACTL
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{
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set
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{
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//TODO: _bus.Write(0xd400, Value);
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}
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get
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{
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return _bus.Read(0xd400);
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}
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}
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//character control, write, 0xd401
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byte CHACTL
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{
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set
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{
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//TODO: _bus.Write(0xd401, Value);
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}
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get
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{
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//TODO: _bus.Read(0xd400);
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return 0x00;
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}
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}
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//display list pointer (low byte), write, 0xd402
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byte DLISTL
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{
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get
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{
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return _bus.Read(0xd402);
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}
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}
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//display list pointer (high byte), write, 0xd403
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byte DLISTH
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{
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get
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{
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return _bus.Read(0xd403);
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}
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}
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//horizontal fine scroll, write, 0xd404
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byte HSCROL
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{
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set
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{
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//TODO: _bus.Write(0xd404, Value);
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}
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get
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{
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//TODO: _bus.Read(0xd404);
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return 0x00;
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}
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}
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//vertical fine scroll, write, 0xd405
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byte VSCROL
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{
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set
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{
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//TODO: _bus.Write(0xd405, Value);
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}
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get
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{
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//TODO: _bus.Read(0xd405);
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return 0x00;
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}
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}
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//player/missile base address, write, 0xd407
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byte PMBASE
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{
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set
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{
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//TODO: _bus.Write(0xd407, Value);
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}
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get
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{
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//TODO: _bus.Read(0xd407);
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return 0x00;
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}
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}
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//character set base address, write, 0xd409
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byte CHBASE
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{
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set
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{
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//TODO: _bus.Write(0xd409, Value);
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}
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get
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{
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//TODO: _bus.Read(0xd409);
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return 0x00;
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}
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}
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//wait for sync, write, 0xd40a
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byte WSYNC
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{
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set
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{
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//TODO: _bus.Write(0xd40a, Value);
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}
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get
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{
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//TODO: _bus.Read(0xd40a);
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return 0x00;
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}
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}
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//verctical line counter, read, 0xd40b
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byte VCOUNT
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{
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get
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{
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//TODO: _bus.Read(0xd40b);
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return 0x00;
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}
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}
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//light pen horizontal position, read, 0xd40c
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//write to ram to be able to read by CPU
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byte PENH
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{
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get
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{
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//TODO: _bus.Read(0xd40c);
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return 0x00;
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}
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}
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//light pen vertical position, read, 0xd40d
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//write to ram to be able to read by CPU
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byte PENV
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{
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set
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{
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_bus.Write(0xd40d, value);
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}
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}
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//nmi enable, write, 0xd40e
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//read from ram after CPU writes the value
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byte NMIEN
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{
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get
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{
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return _bus.Read(0xd40e);
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}
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}
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//nmi reset, write, 0xd40f
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//read from ram after CPU writes the value
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byte NMIRES
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{
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get
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{
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return _bus.Read(0xd40f);
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}
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}
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//nmi status, read
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//write to ram to be able to read by CPU
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byte NMIST
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{
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set
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{
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_bus.Write(0xd40f, value);
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}
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}
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private IBus _bus;
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//Link ANTIC with system Bus
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public void ConnectBus(ref IBus bus)
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{
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_bus = bus;
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}
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public void Tick()
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{
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ushort dlist_addr = (ushort)((DLISTH << 8) | DLISTL);
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Console.WriteLine("dlist: ${0:X4}", dlist_addr);
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}
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}
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}

‎Bus.cs

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using System;
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using System.Collections.Generic;
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using System.Text;
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namespace Emulators
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{
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public class Bus : IBus
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{
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private byte _size = 0;
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public byte Size
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{
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get => _size;
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set
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{
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if (value <= 64)
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{
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_size = value;
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ram = new byte[_size * 1024];
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ClearRam();
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}
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}
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}
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private void ClearRam()
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{
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Array.Clear(ram, 0, _size * 1024);
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}
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//ram
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byte[] ram;
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public Bus(byte size)
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{
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Size = size;
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}
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//read/write methods
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public void Write(ushort addr, byte data)
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{
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if (addr >= 0x0000 && addr < _size * 1024)
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ram[addr] = data;
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}
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public byte Read(ushort addr)
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{
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if (addr >= 0x0000 && addr < _size * 1024)
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return ram[addr];
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else
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return 0x00;
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}
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}
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}

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