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target/loongarch: Enable the disassembler for host tcg
Reuse the decodetree based disassembler from target/loongarch/ for tcg/loongarch64/. The generation of decode-insns.c.inc into ./libcommon.fa.p/ could eventually result in conflict, if any other host requires the same trick, but this is good enough for now. Reviewed-by: WANG Xuerui <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Richard Henderson <[email protected]>
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-1
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+4
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disas.c

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Original file line numberDiff line numberDiff line change
@@ -198,6 +198,8 @@ static void initialize_debug_host(CPUDebug *s)
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s->info.cap_insn_split = 6;
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#elif defined(__hppa__)
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s->info.print_insn = print_insn_hppa;
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#elif defined(__loongarch__)
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s->info.print_insn = print_insn_loongarch;
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#endif
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}
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target/loongarch/meson.build

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Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@ gen = decodetree.process('insns.decode')
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loongarch_ss = ss.source_set()
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loongarch_ss.add(files(
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'cpu.c',
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'disas.c',
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))
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loongarch_tcg_ss = ss.source_set()
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loongarch_tcg_ss.add(gen)
@@ -24,6 +23,8 @@ loongarch_softmmu_ss.add(files(
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'iocsr_helper.c',
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))
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common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
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loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
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target_arch += {'loongarch': loongarch_ss}

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