Merge pull request #196 from bgamari/misc

Miscellaneous warnings fixes

Author: bgamari

src/zinc/drivers/chario.rs

@@ -15,7 +15,6 @@
 
 //! Generic char output trait.
 
-use core::ops::Slice;
 use core::str::{Str, StrSlice};
 use core::slice::ImmutableSlice;
 use core::collections::Collection;

src/zinc/hal/cortex_m3/isr.rs

@@ -46,9 +46,11 @@ pub extern fn isr_default_fault() {
 #[cfg(test)]
 pub extern fn isr_default_fault() { unimplemented!() }
 
+#[allow(non_upper_case_globals)]
 const ISRCount: uint = 16;
 
 #[link_section=".isr_vector"]
+#[allow(non_upper_case_globals)]
 #[no_mangle]
 pub static ISRVectors: [Option<unsafe extern fn()>, ..ISRCount] = [
   Some(__STACK_BASE),

src/zinc/hal/k20/isr.rs

@@ -88,9 +88,11 @@ extern {
   fn isr_soft();
 }
 
+#[allow(non_upper_case_globals)]
 const ISRCount: uint = 95;
 
 #[link_section=".isr_vector_nvic"]
+#[allow(non_upper_case_globals)]
 #[no_mangle]
 pub static NVICVectors: [Option<unsafe extern fn()>, ..ISRCount] = [
   Some(isr_dma_0),

src/zinc/hal/k20/sim.rs

@@ -18,7 +18,7 @@
 use super::pin;
 
 /// Enable clock to a PORTx peripheral
-#[allow(non_snake_case_functions)]
+#[allow(non_snake_case)]
 pub fn enable_PORT(port: pin::Port) {
   match port {
     pin::PortA => {reg::SIM.scgc5.set_porta(true);},

src/zinc/util/lang_items.rs

@@ -33,6 +33,6 @@ extern fn begin_unwind() {}
 #[cfg(not(test))]
 #[lang="fail_fmt"]
 #[no_stack_check]
-pub fn fail_fmt(fmt: &Arguments, file_line: &(&'static str, uint)) -> ! {
+pub fn fail_fmt(_fmt: &Arguments, _file_line: &(&'static str, uint)) -> ! {
   loop { }
 }