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Update AEX-Notify default handler. (#959)
Signed-off-by: Zhang, Lili Z <[email protected]>
1 parent 4b888cd commit a1eeccb

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2 files changed

+37
-50
lines changed

2 files changed

+37
-50
lines changed

sdk/trts/linux/trts_mitigation.S

Lines changed: 33 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -83,11 +83,11 @@ aex_notify_c3_cache:
8383
* 1. The low-order bit of `stack_tickle_pages` is 1 if a second stack
8484
* page should be tickled (specifically, the stack page immediately
8585
* below the page specified in the upper bits)
86-
* 2. The low-order bit of `code_tickle_page` is 1 if the cycle delay
87-
* should be added to the mitigation
88-
* 3. The low-order bit of `data_tickle_page` is 1 if `data_tickle_page`
86+
* 2. Bit 0 of `code_tickle_page` is 1 if `data_tickle_address`
8987
* is writable, and therefore should be tested for write permissions
9088
* by the mitigation
89+
* 3. Bit 4 of `code_tickle_page` is 1 if the cycle delay
90+
* should be added to the mitigation
9191
*
9292
* Stack:
9393
* bottom of stack -> ---------------------------
@@ -286,7 +286,13 @@ DECLARE_LOCAL_FUNC constant_time_apply_sgxstep_mitigation_and_continue_execution
286286
mov RSVD_DATA_TICKLE_OFFSET(%rsp), %rdx
287287
mov RSVD_C3_ADDRESS_OFFSET(%rsp), %rdi
288288

289-
# Restore flags
289+
# Set up the stack tickles
290+
shrb $1, %bpl # Bit 0 in %rbp indicates whether a second stack page can be tickled
291+
mov %rbp, %rbx
292+
jnc .restore_flags
293+
sub $0x1000, %rbx
294+
295+
.restore_flags:
290296
lea RSVD_FLAGS_OFFSET(%rsp), %rax
291297
xchg %rax, %rsp
292298
popf
@@ -308,72 +314,53 @@ DECLARE_LOCAL_FUNC constant_time_apply_sgxstep_mitigation_and_continue_execution
308314

309315
.global __ct_mitigation_begin
310316
__ct_mitigation_begin:
311-
# Step 1: Inject random cycle noise
312-
movzx %sil, %rcx # The lowest byte in %xsi indicates whether cycles should be added
313-
mov $0, %sil
314317
lfence
315-
jrcxz .ct_set_up_tickles
316-
CYCLE_DELAY 20, %rax
317318

318-
.ct_set_up_tickles:
319-
lfence
320-
movzx %bpl, %rcx # The lowest byte in %rbp indicates whether a second stack page can be tickled
321-
jrcxz .ct_set_up_tickles_with_one_stack_page
322-
mov $0x00, %bpl
323-
lea -0x1000(%rbp), %rbx
324-
jmp .ct_warm_caches_and_tlbs
325-
.ct_set_up_tickles_with_one_stack_page:
326-
lea 0x08(%rbp), %rbx
319+
.ct_check_write:
320+
movl $63, %ecx
321+
shlx %rcx, %rsi, %rcx # Bit 0 in %rsi indicates whether data_tickle_address can be written
322+
jrcxz .ct_clear_low_bits_of_rdx
323+
lea -1(%rsi), %rsi # Clear bit 0 in %rsi
324+
movb (%rdx), %al
325+
movb %al, (%rdx) # Will fault if the data page is not writable
327326

328-
# Load all working set cache lines and warm the TLB entries
329-
.ct_warm_caches_and_tlbs:
330-
movzx %dl, %rcx # The lowest byte in %rdx indicates whether data_tickle_page can be written to
331-
mov $0x10, %dl # avoid sequencing uops, in case rbp and rdx alias
332-
jrcxz .ct_warm_caches_and_tlbs_data_read_pre
327+
.ct_clear_low_bits_of_rdx:
328+
movl $12, %ecx
329+
shrx %rcx, %rdx, %rdx
330+
shlx %rcx, %rdx, %rdx
333331

334-
.ct_warm_caches_and_tlbs_data_write_pre:
335-
mov $0x1000, %ecx
336-
.align 0x10
337-
.ct_warm_caches_and_tlbs_data_write:
338-
lea -0x40(%ecx), %ecx
332+
.ct_check_execute:
339333
call *%rdi
340-
mov (%rsi, %rcx), %eax
341-
mov (%rbp, %rcx), %eax
342-
mov %eax, (%rbp, %rcx)
343-
mov (%rbx, %rcx), %eax
344-
mov %eax, (%rbx, %rcx)
345-
mov (%rdx, %rcx), %eax
346-
mov %eax, (%rdx, %rcx)
347-
jrcxz .ct_restore_state
348-
jmp .ct_warm_caches_and_tlbs_data_write # loops 64 times
349334

350-
// This block is identical to the previous one, except that it doesn't write
351-
// to data_tickle_page.
352-
.ct_warm_caches_and_tlbs_data_read_pre:
335+
# Load all working set cache lines and warm the TLB entries
353336
mov $0x1000, %ecx
354337
.align 0x10
355-
.ct_warm_caches_and_tlbs_data_read:
338+
.ct_warm_caches_and_tlbs:
356339
lea -0x40(%ecx), %ecx
357-
call *%rdi
358340
mov (%rsi, %rcx), %eax
359341
mov (%rbp, %rcx), %eax
360-
mov %eax, (%rbp, %rcx)
361342
mov (%rbx, %rcx), %eax
362-
mov %eax, (%rbx, %rcx)
363343
mov (%rdx, %rcx), %eax
364344
jrcxz .ct_restore_state
365-
jmp .ct_warm_caches_and_tlbs_data_read # loops 64 times
345+
jmp .ct_warm_caches_and_tlbs # loops 64 times
366346

367347
.ct_restore_state:
348+
movzx %sil, %ecx # Bit 4 of %sil indicates whether cycles should be added
368349
mov RSVD_REDZONE_WORD_OFFSET(%rsp), %rdi
369350
mov %rdi, -SE_WORDSIZE(%rsp) # restore the first q/dword of the red zone
370351
mov RSVD_RDI_OFFSET(%rsp), %rdi
371352
mov RSVD_RSI_OFFSET(%rsp), %rsi
372353
mov RSVD_RBP_OFFSET(%rsp), %rbp
373354
mov RSVD_RBX_OFFSET(%rsp), %rbx
374355
mov RSVD_RDX_OFFSET(%rsp), %rdx
375-
mov RSVD_RCX_OFFSET(%rsp), %rcx
376356
mov RSVD_RAX_OFFSET(%rsp), %rax
357+
358+
# Inject random cycle noise
359+
jrcxz .ct_restore_rcx
360+
CYCLE_DELAY 20, %rsp
361+
362+
.ct_restore_rcx:
363+
mov RSVD_RCX_OFFSET(%rsp), %rcx
377364
__ct_mitigation_end:
378365
jmp *RSVD_RIP_OFFSET(%rsp)
379366

sdk/trts/trts_veh.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -260,18 +260,18 @@ static void apply_constant_time_sgxstep_mitigation_and_continue_execution(sgx_ex
260260
}
261261
thread_data->aex_notify_entropy_remaining = 31;
262262
}
263-
code_tickle_page |= thread_data->aex_notify_entropy_cache & 1;
263+
code_tickle_page |= (thread_data->aex_notify_entropy_cache & 1) << 4;
264264
thread_data->aex_notify_entropy_cache >>= 1;
265265

266266
// There are three additional "implicit" parameters to this function:
267267
// 1. The low-order bit of `stack_tickle_pages` is 1 if a second stack
268268
// page should be tickled (specifically, the stack page immediately
269269
// below the page specified in the upper bits)
270-
// 2. The low-order bit of `code_tickle_page` is 1 if the cycle delay
271-
// should be added to the mitigation
272-
// 3. The low-order bit of `data_tickle_page` is 1 if `data_tickle_page`
270+
// 2. Bit 0 of `code_tickle_page` is 1 if `data_tickle_address`
273271
// is writable, and therefore should be tested for write permissions
274272
// by the mitigation
273+
// 3. Bit 4 of `code_tickle_page` is 1 if the cycle delay
274+
// should be added to the mitigation
275275
constant_time_apply_sgxstep_mitigation_and_continue_execution(
276276
info, thread_data->first_ssa_gpr + offsetof(ssa_gpr_t, aex_notify),
277277
stack_tickle_pages, code_tickle_page,

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