@@ -83,11 +83,11 @@ aex_notify_c3_cache:
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* 1. The low-order bit of `stack_tickle_pages` is 1 if a second stack
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* page should be tickled (specifically, the stack page immediately
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* below the page specified in the upper bits)
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- * 2. The low-order bit of `code_tickle_page` is 1 if the cycle delay
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- * should be added to the mitigation
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- * 3. The low-order bit of `data_tickle_page` is 1 if `data_tickle_page`
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+ * 2. Bit 0 of `code_tickle_page` is 1 if `data_tickle_address`
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* is writable, and therefore should be tested for write permissions
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* by the mitigation
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+ * 3. Bit 4 of `code_tickle_page` is 1 if the cycle delay
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+ * should be added to the mitigation
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*
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* Stack:
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* bottom of stack -> ---------------------------
@@ -286,7 +286,13 @@ DECLARE_LOCAL_FUNC constant_time_apply_sgxstep_mitigation_and_continue_execution
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mov RSVD_DATA_TICKLE_OFFSET(%rsp ), %rdx
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mov RSVD_C3_ADDRESS_OFFSET(%rsp ), %rdi
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- # Restore flags
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+ # Set up the stack tickles
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+ shrb $1 , %bpl # Bit 0 in %rbp indicates whether a second stack page can be tickled
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+ mov %rbp , %rbx
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+ jnc .restore_flags
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+ sub $0x1000 , %rbx
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+
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+ .restore_flags:
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lea RSVD_FLAGS_OFFSET(%rsp ), %rax
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xchg %rax , %rsp
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popf
@@ -308,72 +314,53 @@ DECLARE_LOCAL_FUNC constant_time_apply_sgxstep_mitigation_and_continue_execution
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.global __ct_mitigation_begin
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__ct_mitigation_begin:
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- # Step 1: Inject random cycle noise
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- movzx %sil , %rcx # The lowest byte in %xsi indicates whether cycles should be added
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- mov $0 , %sil
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lfence
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- jrcxz .ct_set_up_tickles
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- CYCLE_DELAY 20 , %rax
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- .ct_set_up_tickles:
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- lfence
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- movzx %bpl , %rcx # The lowest byte in %rbp indicates whether a second stack page can be tickled
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- jrcxz .ct_set_up_tickles_with_one_stack_page
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- mov $0x00 , %bpl
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- lea -0x1000 (%rbp ), %rbx
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- jmp .ct_warm_caches_and_tlbs
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- .ct_set_up_tickles_with_one_stack_page:
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- lea 0x08 (%rbp ), %rbx
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+ .ct_check_write:
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+ movl $63 , %ecx
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+ shlx %rcx , %rsi , %rcx # Bit 0 in %rsi indicates whether data_tickle_address can be written
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+ jrcxz .ct_clear_low_bits_of_rdx
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+ lea -1 (%rsi ), %rsi # Clear bit 0 in %rsi
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+ movb (%rdx ), %al
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+ movb %al , (%rdx ) # Will fault if the data page is not writable
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- # Load all working set cache lines and warm the TLB entries
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- .ct_warm_caches_and_tlbs:
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- movzx %dl , %rcx # The lowest byte in %rdx indicates whether data_tickle_page can be written to
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- mov $0x10 , %dl # avoid sequencing uops, in case rbp and rdx alias
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- jrcxz .ct_warm_caches_and_tlbs_data_read_pre
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+ .ct_clear_low_bits_of_rdx:
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+ movl $12 , %ecx
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+ shrx %rcx , %rdx , %rdx
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+ shlx %rcx , %rdx , %rdx
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- .ct_warm_caches_and_tlbs_data_write_pre:
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- mov $0x1000 , %ecx
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- .align 0x10
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- .ct_warm_caches_and_tlbs_data_write:
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- lea -0x40 (%ecx ), %ecx
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+ .ct_check_execute:
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call *%rdi
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- mov (%rsi , %rcx ), %eax
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- mov (%rbp , %rcx ), %eax
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- mov %eax , (%rbp , %rcx )
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- mov (%rbx , %rcx ), %eax
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- mov %eax , (%rbx , %rcx )
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- mov (%rdx , %rcx ), %eax
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- mov %eax , (%rdx , %rcx )
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- jrcxz .ct_restore_state
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- jmp .ct_warm_caches_and_tlbs_data_write # loops 64 times
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- // This block is identical to the previous one, except that it doesn't write
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- // to data_tickle_page.
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- .ct_warm_caches_and_tlbs_data_read_pre:
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+ # Load all working set cache lines and warm the TLB entries
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mov $0x1000 , %ecx
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.align 0x10
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- .ct_warm_caches_and_tlbs_data_read :
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+ .ct_warm_caches_and_tlbs :
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lea -0x40 (%ecx ), %ecx
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- call *%rdi
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mov (%rsi , %rcx ), %eax
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mov (%rbp , %rcx ), %eax
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- mov %eax , (%rbp , %rcx )
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mov (%rbx , %rcx ), %eax
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- mov %eax , (%rbx , %rcx )
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mov (%rdx , %rcx ), %eax
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jrcxz .ct_restore_state
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- jmp .ct_warm_caches_and_tlbs_data_read # loops 64 times
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+ jmp .ct_warm_caches_and_tlbs # loops 64 times
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.ct_restore_state:
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+ movzx %sil , %ecx # Bit 4 of %sil indicates whether cycles should be added
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mov RSVD_REDZONE_WORD_OFFSET(%rsp ), %rdi
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mov %rdi , -SE_WORDSIZE(%rsp ) # restore the first q/dword of the red zone
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mov RSVD_RDI_OFFSET(%rsp ), %rdi
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mov RSVD_RSI_OFFSET(%rsp ), %rsi
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mov RSVD_RBP_OFFSET(%rsp ), %rbp
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mov RSVD_RBX_OFFSET(%rsp ), %rbx
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mov RSVD_RDX_OFFSET(%rsp ), %rdx
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- mov RSVD_RCX_OFFSET(%rsp ), %rcx
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mov RSVD_RAX_OFFSET(%rsp ), %rax
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+
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+ # Inject random cycle noise
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+ jrcxz .ct_restore_rcx
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+ CYCLE_DELAY 20 , %rsp
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+
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+ .ct_restore_rcx:
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+ mov RSVD_RCX_OFFSET(%rsp ), %rcx
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__ct_mitigation_end:
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jmp *RSVD_RIP_OFFSET(%rsp )
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