work-experience.html

<b>Co-op Student (May 2023 - Aug 2024) at Microchip Technology, SmartHLS Compiler Group</b>

  <p>
    - Developed open-source software libraries and example designs in C++ to demonstrate how to use the SmartHLS compiler (see <a href="https://github.com/jennifermah76">Github</a>) <br>
    
    - Provided technical support to internal customers and FAEs on how to use SmartHLS <br>
    
    - Became familiar with FPGA debugging through JTAG, and created and filed a patent for an automatic FPGA instrumentation tool <br>
    
    - Wrote a custom Python tool to parse code comments and resource usage reports into documentation <br>
    
    - Maintained CI infrastructure that automated end-to-end (from C++ to RTL compilation to running on the FPGAs) tests using Jenkins and Docker <br>
    
    - Led the Toronto office social committee and planned social events for the Toronto office <br>  </p>


<b> Undergraduate Summer Research Assistant (May 2022 - Aug 2022) at University of Toronto, Verilog to Routing Organisation</b>

<p>
    - Became familiar with FPGA packing, placement, routing, and timing analysis <br>
    - Created, tested, and debugged VPR command line options <br>
    - Used C++ and Glade to create a graphical interface to visualise chip floorplanning constraints <br>
    - Refactored codebase and updated it from C standards to C++ standards <br>


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