Make JFPJC BRAM usage FPGA agnostic

[johnMamish]

JFPJC explicitly instantiates iCE40 block RAM in its core. This explicit dependence on iCE40 block ram should be removed. Instead, arrays of memory with parameterizable size should be used so that synthesis tools can infer appropriate block sizes. Furthermore, we should also provide options / infrastructure that lets a user explicitly instantiate block RAMs by changing an include and adding a short verilog module.

The BRAMs are used in a few different spots; their usage needs to be updated in all these spots:

• Make JFPJC ingestion pipeline BRAM usage FPGA agnostic #5
• Make JFPJC quantization table storage FPGA agnostic #10
• Make JFPJC quantization output buffer FPGA agnostic #11
• Make JFPJC DCT output buffers FPGA agnostic #12