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28 | 28 | /**
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29 | 29 | * @file libmaple/i2c.c
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30 | 30 | * @author Perry Hung <[email protected]>
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31 |
| - * @author Barry Carter <[email protected]> |
32 | 31 | * @brief Inter-Integrated Circuit (I2C) support.
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33 | 32 | *
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34 |
| - * Master and Slave supported |
35 |
| - * Slave code added Barry Carter 2012 |
| 33 | + * Currently, only master mode is supported. |
36 | 34 | */
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37 | 35 |
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38 | 36 | #include "i2c_private.h"
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@@ -220,26 +218,6 @@ void i2c_master_enable(i2c_dev *dev, uint32 flags) {
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220 | 218 | dev->state = I2C_STATE_IDLE;
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221 | 219 | }
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222 | 220 |
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223 |
| -/** |
224 |
| - * @brief Initialize an I2C device as slave (and master) |
225 |
| - * @param dev Device to enable |
226 |
| - * @param flags Bitwise or of the following I2C options: |
227 |
| - * I2C_FAST_MODE: 400 khz operation, |
228 |
| - * I2C_DUTY_16_9: 16/9 Tlow/Thigh duty cycle (only applicable for |
229 |
| - * fast mode), |
230 |
| - * I2C_BUS_RESET: Reset the bus and clock out any hung slaves on |
231 |
| - * initialization, |
232 |
| - * I2C_10BIT_ADDRESSING: Enable 10-bit addressing, |
233 |
| - * I2C_REMAP: (deprecated, STM32F1 only) Remap I2C1 to SCL/PB8 |
234 |
| - * SDA/PB9. |
235 |
| - * I2C_SLAVE_DUAL_ADDRESS: Slave can respond on 2 i2C addresses |
236 |
| - * I2C_SLAVE_GENERAL_CALL: SLA+W broadcast to all general call |
237 |
| - * listeners on bus. Addr 0x00 |
238 |
| - * I2C_SLAVE_USE_RX_BUFFER: Use a buffer to receive the incoming |
239 |
| - * data. Callback at end of recv |
240 |
| - * I2C_SLAVE_USE_TX_BUFFER: Use a buffer to transmit data. |
241 |
| - * Callback will be called before tx |
242 |
| - */ |
243 | 221 | void i2c_slave_enable(i2c_dev *dev, uint32 flags) {
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244 | 222 | i2c_disable(dev);
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245 | 223 | i2c_master_enable(dev, dev->config_flags | flags);
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@@ -344,10 +322,11 @@ void _i2c_irq_handler(i2c_dev *dev) {
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344 | 322 | */
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345 | 323 | dev->timestamp = systick_uptime();
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346 | 324 |
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347 |
| - /* |
348 |
| - * Add Slave support |
| 325 | + /* Add Slave support |
| 326 | + * Barry Carter 2012 |
| 327 | + |
349 | 328 | */
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350 |
| - |
| 329 | + |
351 | 330 | /* Check to see if MSL master slave bit is set */
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352 | 331 | if ((sr2 & I2C_SR2_MSL) != I2C_SR2_MSL) { /* 0 = slave mode 1 = master */
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353 | 332 |
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@@ -480,15 +459,6 @@ void _i2c_irq_handler(i2c_dev *dev) {
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480 | 459 | /* The callback with the data will happen on a NACK of the last data byte.
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481 | 460 | * This is handled in the error IRQ (AF bit)
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482 | 461 | */
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483 |
| - /* Handle the case where the master misbehaves by sending no NACK */ |
484 |
| - if (dev->state != I2C_STATE_IDLE) { |
485 |
| - if (dev->state == I2C_STATE_SL_RX) { |
486 |
| - if (dev->i2c_slave_recv_callback != NULL) (*(dev->i2c_slave_recv_callback))(dev->i2c_slave_msg); |
487 |
| - } |
488 |
| - else { |
489 |
| - if (dev->i2c_slave_transmit_callback != NULL) (*(dev->i2c_slave_transmit_callback))(dev->i2c_slave_msg); |
490 |
| - } |
491 |
| - } |
492 | 462 | }
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493 | 463 |
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494 | 464 | sr1 = sr2 = 0;
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