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Fixup: Use getFreeze in DAGCombiner.
Also avoid some not needed isGuaranteedNotToBePoison calls in getNode.
1 parent f6ffe48 commit 33ebb39

26 files changed

+1708
-1701
lines changed

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -22931,9 +22931,8 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
2293122931
IndexC->getZExtValue());
2293222932
if (DAG.isGuaranteedNotToBePoison(InVec, EltMask))
2293322933
return InVec;
22934-
} else if (DAG.isGuaranteedNotToBePoison(InVec)) {
22935-
return InVec;
2293622934
}
22935+
return DAG.getFreeze(InVec);
2293722936
}
2293822937

2293922938
if (!IndexC)
@@ -27380,8 +27379,8 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
2738027379
InsIdx + SubVecNumElts);
2738127380
if (DAG.isGuaranteedNotToBePoison(N0, EltMask))
2738227381
return N0;
27383-
} else if (DAG.isGuaranteedNotToBePoison(N0))
27384-
return N0;
27382+
}
27383+
return DAG.getFreeze(N0);
2738527384
}
2738627385

2738727386
// If this is an insert of an extracted vector into an undef/poison vector, we

‎llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -229,10 +229,9 @@ define void @insert_vec_v3i16_uaddlv_from_v8i16(ptr %0) {
229229
; CHECK: ; %bb.0: ; %entry
230230
; CHECK-NEXT: movi.2d v0, #0000000000000000
231231
; CHECK-NEXT: movi.2d v1, #0000000000000000
232+
; CHECK-NEXT: add x8, x0, #8
232233
; CHECK-NEXT: uaddlv.8h s0, v0
233234
; CHECK-NEXT: mov.h v1[0], v0[0]
234-
; CHECK-NEXT: mov.h v1[3], w8
235-
; CHECK-NEXT: add x8, x0, #8
236235
; CHECK-NEXT: ushll.4s v1, v1, #0
237236
; CHECK-NEXT: ucvtf.4s v1, v1
238237
; CHECK-NEXT: st1.s { v1 }[2], [x8]

‎llvm/test/CodeGen/AArch64/arm64-build-vector.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,8 +57,8 @@ define void @widen_f16_build_vector(ptr %addr) {
5757
; CHECK-LABEL: widen_f16_build_vector:
5858
; CHECK: // %bb.0:
5959
; CHECK-NEXT: mov w8, #13294 // =0x33ee
60-
; CHECK-NEXT: movk w8, #13294, lsl #16
61-
; CHECK-NEXT: str w8, [x0]
60+
; CHECK-NEXT: dup v0.4h, w8
61+
; CHECK-NEXT: str s0, [x0]
6262
; CHECK-NEXT: ret
6363
store <2 x half> <half 0xH33EE, half 0xH33EE>, ptr %addr, align 2
6464
ret void

‎llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,6 @@ define <16 x i8> @test_insert_v16i8_insert_2_undef_base_skip8(i32 %a0) {
8484
; CHECK-NEXT: lsr w8, w0, #5
8585
; CHECK-NEXT: dup.16b v0, w8
8686
; CHECK-NEXT: mov.b v0[5], wzr
87-
; CHECK-NEXT: mov.b v0[8], w8
8887
; CHECK-NEXT: mov.b v0[9], wzr
8988
; CHECK-NEXT: ret
9089
%a1 = lshr exact i32 %a0, 5
@@ -145,7 +144,6 @@ define <16 x i8> @test_insert_v16i8_insert_2_undef_base_different_valeus_skip8(i
145144
; CHECK-NEXT: mov.b v0[2], w8
146145
; CHECK-NEXT: mov.b v0[5], wzr
147146
; CHECK-NEXT: mov.b v0[7], w8
148-
; CHECK-NEXT: mov.b v0[8], w8
149147
; CHECK-NEXT: mov.b v0[9], wzr
150148
; CHECK-NEXT: mov.b v0[12], w8
151149
; CHECK-NEXT: mov.b v0[15], w8

‎llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll

Lines changed: 8 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -93,17 +93,14 @@ define i32 @combine_add_8xi32(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i3
9393
define i32 @combine_undef_add_8xi32(i32 %a, i32 %b, i32 %c, i32 %d) local_unnamed_addr #0 {
9494
; CHECK-LABEL: combine_undef_add_8xi32:
9595
; CHECK: // %bb.0:
96-
; CHECK-NEXT: fmov s1, w0
97-
; CHECK-NEXT: movi v0.2d, #0000000000000000
98-
; CHECK-NEXT: mov v1.s[1], w1
99-
; CHECK-NEXT: uhadd v0.4h, v0.4h, v0.4h
100-
; CHECK-NEXT: mov v1.s[2], w2
101-
; CHECK-NEXT: mov v1.s[3], w3
102-
; CHECK-NEXT: xtn v2.4h, v1.4s
103-
; CHECK-NEXT: shrn v1.4h, v1.4s, #16
104-
; CHECK-NEXT: uhadd v1.4h, v2.4h, v1.4h
105-
; CHECK-NEXT: mov v1.d[1], v0.d[0]
106-
; CHECK-NEXT: uaddlv s0, v1.8h
96+
; CHECK-NEXT: fmov s0, w0
97+
; CHECK-NEXT: mov v0.s[1], w1
98+
; CHECK-NEXT: mov v0.s[2], w2
99+
; CHECK-NEXT: mov v0.s[3], w3
100+
; CHECK-NEXT: uzp2 v1.8h, v0.8h, v0.8h
101+
; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h
102+
; CHECK-NEXT: uhadd v0.8h, v0.8h, v1.8h
103+
; CHECK-NEXT: uaddlv s0, v0.8h
107104
; CHECK-NEXT: fmov w0, s0
108105
; CHECK-NEXT: ret
109106
%a1 = insertelement <8 x i32> poison, i32 %a, i32 0

‎llvm/test/CodeGen/Thumb2/active_lane_mask.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -306,10 +306,9 @@ define void @test_width2(ptr nocapture readnone %x, ptr nocapture %y, i8 zeroext
306306
; CHECK-NEXT: ldrne.w r3, [r12]
307307
; CHECK-NEXT: vmovne.32 q0[0], r3
308308
; CHECK-NEXT: lsls r0, r0, #30
309-
; CHECK-NEXT: ittt mi
309+
; CHECK-NEXT: itt mi
310310
; CHECK-NEXT: ldrmi.w r0, [r12, #4]
311311
; CHECK-NEXT: vmovmi.32 q0[2], r0
312-
; CHECK-NEXT: vmovmi.32 q0[3], r0
313312
; CHECK-NEXT: vmrs r3, p0
314313
; CHECK-NEXT: and r0, r3, #1
315314
; CHECK-NEXT: ubfx r3, r3, #8, #1

‎llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll

Lines changed: 16 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -110,10 +110,9 @@ define void @foo_sext_v2i64_v2i32(ptr %dest, ptr %mask, ptr %src) {
110110
; CHECK-LE-NEXT: ldrne r3, [r2]
111111
; CHECK-LE-NEXT: vmovne.32 q1[0], r3
112112
; CHECK-LE-NEXT: lsls r1, r1, #30
113-
; CHECK-LE-NEXT: ittt mi
113+
; CHECK-LE-NEXT: itt mi
114114
; CHECK-LE-NEXT: ldrmi r1, [r2, #4]
115115
; CHECK-LE-NEXT: vmovmi.32 q1[2], r1
116-
; CHECK-LE-NEXT: vmovmi.32 q1[3], r0
117116
; CHECK-LE-NEXT: vmov r2, s6
118117
; CHECK-LE-NEXT: movs r1, #0
119118
; CHECK-LE-NEXT: vmov r3, s0
@@ -220,9 +219,9 @@ define void @foo_sext_v2i64_v2i32_unaligned(ptr %dest, ptr %mask, ptr %src) {
220219
; CHECK-LE-NEXT: sub sp, #4
221220
; CHECK-LE-NEXT: ldrd r12, lr, [r1]
222221
; CHECK-LE-NEXT: movs r1, #0
223-
; CHECK-LE-NEXT: @ implicit-def: $q1
222+
; CHECK-LE-NEXT: @ implicit-def: $q0
224223
; CHECK-LE-NEXT: rsbs.w r3, r12, #0
225-
; CHECK-LE-NEXT: vmov q0[2], q0[0], r12, lr
224+
; CHECK-LE-NEXT: vmov q1[2], q1[0], r12, lr
226225
; CHECK-LE-NEXT: sbcs.w r3, r1, r12, asr #31
227226
; CHECK-LE-NEXT: csetm r3, lt
228227
; CHECK-LE-NEXT: rsbs.w r4, lr, #0
@@ -233,36 +232,35 @@ define void @foo_sext_v2i64_v2i32_unaligned(ptr %dest, ptr %mask, ptr %src) {
233232
; CHECK-LE-NEXT: lsls r3, r1, #31
234233
; CHECK-LE-NEXT: itt ne
235234
; CHECK-LE-NEXT: ldrne r3, [r2]
236-
; CHECK-LE-NEXT: vmovne.32 q1[0], r3
235+
; CHECK-LE-NEXT: vmovne.32 q0[0], r3
237236
; CHECK-LE-NEXT: lsls r1, r1, #30
238-
; CHECK-LE-NEXT: ittt mi
237+
; CHECK-LE-NEXT: itt mi
239238
; CHECK-LE-NEXT: ldrmi r1, [r2, #4]
240-
; CHECK-LE-NEXT: vmovmi.32 q1[2], r1
241-
; CHECK-LE-NEXT: vmovmi.32 q1[3], r0
242-
; CHECK-LE-NEXT: vmov r2, s6
239+
; CHECK-LE-NEXT: vmovmi.32 q0[2], r1
240+
; CHECK-LE-NEXT: vmov r2, s2
243241
; CHECK-LE-NEXT: movs r1, #0
244-
; CHECK-LE-NEXT: vmov r3, s0
245-
; CHECK-LE-NEXT: vmov r4, s4
246-
; CHECK-LE-NEXT: vmov q1[2], q1[0], r4, r2
242+
; CHECK-LE-NEXT: vmov r3, s4
243+
; CHECK-LE-NEXT: vmov r4, s0
244+
; CHECK-LE-NEXT: vmov q0[2], q0[0], r4, r2
247245
; CHECK-LE-NEXT: rsbs r5, r3, #0
248246
; CHECK-LE-NEXT: asr.w r12, r2, #31
249247
; CHECK-LE-NEXT: sbcs.w r2, r1, r3, asr #31
250-
; CHECK-LE-NEXT: vmov r3, s2
248+
; CHECK-LE-NEXT: vmov r3, s6
251249
; CHECK-LE-NEXT: csetm r2, lt
252250
; CHECK-LE-NEXT: asr.w lr, r4, #31
253-
; CHECK-LE-NEXT: vmov q1[3], q1[1], lr, r12
251+
; CHECK-LE-NEXT: vmov q0[3], q0[1], lr, r12
254252
; CHECK-LE-NEXT: rsbs r5, r3, #0
255253
; CHECK-LE-NEXT: sbcs.w r3, r1, r3, asr #31
256254
; CHECK-LE-NEXT: bfi r1, r2, #0, #1
257255
; CHECK-LE-NEXT: csetm r2, lt
258256
; CHECK-LE-NEXT: bfi r1, r2, #1, #1
259257
; CHECK-LE-NEXT: lsls r2, r1, #31
260258
; CHECK-LE-NEXT: itt ne
261-
; CHECK-LE-NEXT: vmovne r2, r3, d2
259+
; CHECK-LE-NEXT: vmovne r2, r3, d0
262260
; CHECK-LE-NEXT: strdne r2, r3, [r0]
263261
; CHECK-LE-NEXT: lsls r1, r1, #30
264262
; CHECK-LE-NEXT: itt mi
265-
; CHECK-LE-NEXT: vmovmi r1, r2, d3
263+
; CHECK-LE-NEXT: vmovmi r1, r2, d1
266264
; CHECK-LE-NEXT: strdmi r1, r2, [r0, #8]
267265
; CHECK-LE-NEXT: add sp, #4
268266
; CHECK-LE-NEXT: pop {r4, r5, r7, pc}
@@ -365,10 +363,9 @@ define void @foo_zext_v2i64_v2i32(ptr %dest, ptr %mask, ptr %src) {
365363
; CHECK-LE-NEXT: ldrne r3, [r2]
366364
; CHECK-LE-NEXT: vmovne.32 q0[0], r3
367365
; CHECK-LE-NEXT: lsls r1, r1, #30
368-
; CHECK-LE-NEXT: ittt mi
366+
; CHECK-LE-NEXT: itt mi
369367
; CHECK-LE-NEXT: ldrmi r1, [r2, #4]
370368
; CHECK-LE-NEXT: vmovmi.32 q0[2], r1
371-
; CHECK-LE-NEXT: vmovmi.32 q0[3], r0
372369
; CHECK-LE-NEXT: vmov r2, s4
373370
; CHECK-LE-NEXT: movs r1, #0
374371
; CHECK-LE-NEXT: vand q0, q0, q2
@@ -481,10 +478,9 @@ define void @foo_zext_v2i64_v2i32_unaligned(ptr %dest, ptr %mask, ptr %src) {
481478
; CHECK-LE-NEXT: ldrne r3, [r2]
482479
; CHECK-LE-NEXT: vmovne.32 q0[0], r3
483480
; CHECK-LE-NEXT: lsls r1, r1, #30
484-
; CHECK-LE-NEXT: ittt mi
481+
; CHECK-LE-NEXT: itt mi
485482
; CHECK-LE-NEXT: ldrmi r1, [r2, #4]
486483
; CHECK-LE-NEXT: vmovmi.32 q0[2], r1
487-
; CHECK-LE-NEXT: vmovmi.32 q0[3], r0
488484
; CHECK-LE-NEXT: vmov r2, s4
489485
; CHECK-LE-NEXT: movs r1, #0
490486
; CHECK-LE-NEXT: vand q0, q0, q2

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