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4 changes: 4 additions & 0 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17684,6 +17684,8 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
break;
case 'v':
switch (BitWidth) {
case 1:
return std::pair(0U, nullptr);
case 16:
RC = Subtarget->useRealTrue16Insts() ? &AMDGPU::VGPR_16RegClass
: &AMDGPU::VGPR_32_Lo256RegClass;
Expand All @@ -17701,6 +17703,8 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
if (!Subtarget->hasMAIInsts())
break;
switch (BitWidth) {
case 1:
return std::pair(0U, nullptr);
case 16:
RC = &AMDGPU::AGPR_32RegClass;
break;
Expand Down
24 changes: 24 additions & 0 deletions llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
Original file line number Diff line number Diff line change
Expand Up @@ -153,3 +153,27 @@ define <4 x i32> @misaligned_sgpr_4xi32_out_2() {
%asm = call <4 x i32> asm sideeffect "; def $0", "={s[2:5]}"()
ret <4 x i32> %asm
}

; ERR: error: couldn't allocate input reg for constraint 'v'
define void @i1_used_as_vgpr_operand(ptr %p, i1 %b) {
tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,v"(ptr %p, i1 %b)
ret void
}
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Check the def case for good measure?

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Also AGPR + SGPR cases, those are probably equally broken

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Check the def case for good measure?

What do you mean by "def case"?

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call i1 asm "; def $0", "=v"()


; ERR: error: couldn't allocate input reg for constraint 'a'
define void @i1_used_as_agpr_operand(ptr %p, i1 %b) {
tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,a"(ptr %p, i1 %b)
ret void
}

; ERR: error: couldn't allocate input reg for constraint 's'
define void @i1_used_as_sgpr_operand_s(ptr %p, i1 %b) {
tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,s"(ptr %p, i1 %b)
ret void
}

; ERR: error: couldn't allocate input reg for constraint 'r'
define void @i1_used_as_sgpr_operand_r(ptr %p, i1 %b) {
tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,r"(ptr %p, i1 %b)
ret void
}
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