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| 1 | +--- |
| 2 | +title: "The TSP1 Neural Network Accelerator Chip: Advancing Brain-Inspired Computing" |
| 3 | +author: |
| 4 | + - "Chris Eliasmith" |
| 5 | + - "Danny Rosen" |
| 6 | +date: 2025-11-11 |
| 7 | +start_time: "8:00" |
| 8 | +end_time: "9:00" |
| 9 | +time_zone: "EST" |
| 10 | +description: "Join Chris Eliasmith for an in-depth exploration of the TSP1 chip from Applied Brain Research. Learn about this groundbreaking hardware platform and its implications for brain-inspired computing." |
| 11 | +upcoming: true |
| 12 | +video: "" |
| 13 | +aliases: |
| 14 | + - /workshops/tsp1-neural-chip-chris-eliasmith/ |
| 15 | +image: "ABR-TSP1-Chip.jpg" |
| 16 | +type: "workshops" |
| 17 | +hardware_tags: ["tsp1"] |
| 18 | +--- |
| 19 | + |
| 20 | +## About This Workshop |
| 21 | + |
| 22 | +Join us for an exciting workshop featuring Dr. Chris Eliasmith as he presents the **TSP1 (Time Series Processor 1)** neural network accelerator chip — a cutting-edge hardware platform developed by Applied Brain Research. |
| 23 | +This event will provide insights into how brain-inspired computing can set world records in efficiency for AI applications. |
| 24 | + |
| 25 | +## What You'll Learn |
| 26 | + |
| 27 | +In this workshop, Dr. Eliasmith will cover: |
| 28 | + |
| 29 | +- **The TSP1 Architecture**: An overview of the TSP1 chip's unique design and capabilities |
| 30 | +- **Brain-Inspired Computing**: How the TSP1 embodies principles from neuroscience to create efficient, low-power computing solutions |
| 31 | +- **Real-World Applications**: Practical use cases where neural accelerator hardware like TSP1 excels, including edge computing, robotics, and adaptive systems |
| 32 | +- **Performance and Efficiency**: Comparisons with traditional computing architectures and insights into power consumption and speed |
| 33 | + |
| 34 | +## About the TSP1 Chip |
| 35 | + |
| 36 | +The **TSP1 (Time Series Processor 1)** represents a significant advancement in brain-inspired computing, offering: |
| 37 | + |
| 38 | +- **Ultra-low power consumption** suitable for edge deployment |
| 39 | +- **Real-time processing** of complex neural computations |
| 40 | +- **Scalable architecture** for building large-scale AI applications |
| 41 | +- **Native support** for temporal dynamics and time series processing |
| 42 | + |
| 43 | +This hardware platform enables researchers and developers to deploy sophisticated AI applications and neural networks in real-world applications where power efficiency and real-time performance are critical. |
| 44 | + |
| 45 | +## Who Should Attend |
| 46 | + |
| 47 | +This workshop is ideal for: |
| 48 | + |
| 49 | +- Researchers in neural computing and efficient AI |
| 50 | +- Engineers working on edge AI and embedded systems |
| 51 | +- Developers interested in brain-inspired computing platforms |
| 52 | +- Students exploring neural accelerator hardware and time series modeling |
| 53 | +- Anyone curious about the future of efficient AI computing |
| 54 | + |
| 55 | +## Speaker |
| 56 | + |
| 57 | +**Chris Eliasmith**, Professor and Canada Research Chair in Theoretical Neuroscience, and CTO at Applied Brain Research. |
| 58 | +His research focuses on large-scale brain modelling, neural dynamics, efficient AI, and brain-inspired computing. |
| 59 | + |
| 60 | +## Resources |
| 61 | + |
| 62 | +- [Applied Brain Research Technology Page](https://www.appliedbrainresearch.com/technology) |
| 63 | +- [Centre for Theoretical Neuroscience](https://uwaterloo.ca/centre-for-theoretical-neuroscience/) |
| 64 | + |
| 65 | +## Registration |
| 66 | + |
| 67 | +Registration details and the event link will be announced soon. Stay tuned for updates on how to join this exciting workshop! |
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