Merge pull request open-neuromorphic#408 from Nelias/seneca

content: Add SENeCA to hardware

Author: neural-loop

content/neuromorphic-computing/hardware/seneca-imec/imec.png

@@ -0,0 +1,36 @@
+---
+active_product: true
+description: "RISC-V based digital neuromorphic processor"
+type: neuromorphic-hardware
+image: seneca.png
+organization:
+  group_name: null
+  org_logo: imec.png
+  org_name: imec
+  org_website: https://www.imec-int.com/en/the-netherlands
+  product_page_link: https://imec-publications.be/entities/publication/0ad2a426-20f0-4fc4-b41b-35de4b55f9c9
+  social_media_links:
+    linkedin: https://www.linkedin.com/company/imec-the-netherlands
+    twitter: https://twitter.com/imec_int
+    wikipedia: https://en.wikipedia.org/wiki/IMEC
+product:
+  announced_date: 2022-03-01
+  applications: Extreme edge applications
+  chip_type: Digital
+  activation_bits: null
+  on_chip_learning: true
+  power: 
+  release_year: 2022
+  release_date: 2022-03-01
+  software: SENeCA SDK 
+  status:
+    announced: true
+    released: true
+    retired: false
+product_name: SENeCA
+summary: "SENeCA is a RISC-V-based digital neuromorphic processor targeting extreme edge applications by accelerating Spiking Neural Networks inside or near sensors and small devices where ultra-low power and adaptivity are required. It inherits fundamental properties from the biological brain: spatio-temporal sparsity exploitation, parallel processing, infinite scalability, low-precision parameters, asynchronous non-deterministic execution, adaptation and fault-tolerance architecture, interconnect of neuron cluster cores with RISC-V-based instruction set."
+title: SENeCA by imec
+---
+
+## Overview
+SENeCA is a RISC-V-based digital neuromorphic processor targeting extreme edge applications by accelerating Spiking Neural Networks inside or near sensors and small devices where ultra-low power and adaptivity are required. It inherits fundamental properties from the biological brain: spatio-temporal sparsity exploitation, parallel processing, infinite scalability, low-precision parameters, asynchronous non-deterministic execution, adaptation and fault-tolerance architecture, interconnect of neuron cluster cores with RISC-V-based instruction set. SENeCA has fully programmable neuron models and learning/adaptivity algorithms. It is accessible for academic research.