-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathram_bandwidth.h
149 lines (134 loc) · 3.34 KB
/
ram_bandwidth.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
#include "constants.h"
#define SIZE 64 // size of array in MB
#define FREQ 2.9 //processor frequency in GHz
#define ITER 1000
//returns bandwidth in MBPS
uint64_t benchmarkReadRamBandwidth(fun_ptr _ignore)
{
long size = (long)(SIZE * 1024 * 1024);
int temp = 0.0;
int *arr = (int *) malloc(size);
uint64_t bw = 0;
for (int i=0; i<ITER; i++) {
uint32_t cycles_high0, cycles_low0, cycles_low1, cycles_high1;
asm volatile (
"CPUID\n\t"
"RDTSC\n\t"
"mov %%edx, %0\n\t"
"mov %%eax, %1\n\t": "=r" (cycles_high0),
"=r" (cycles_low0)::"rax", "%rbx", "%rcx", "%rdx"
);
for (int i = 0; i < (size/sizeof(int))-480; i+=480)
{
temp += arr[i];
temp += arr[i+16];
temp += arr[i+32];
temp += arr[i+48];
temp += arr[i+64];
temp += arr[i+80];
temp += arr[i+96];
temp += arr[i+112];
temp += arr[i+128];
temp += arr[i+144];
temp += arr[i+160];
temp += arr[i+176];
temp += arr[i+192];
temp += arr[i+208];
temp += arr[i+224];
temp += arr[i+240];
temp += arr[i+256];
temp += arr[i+272];
temp += arr[i+288];
temp += arr[i+304];
temp += arr[i+320];
temp += arr[i+336];
temp += arr[i+352];
temp += arr[i+368];
temp += arr[i+384];
temp += arr[i+400];
temp += arr[i+416];
temp += arr[i+432];
temp += arr[i+448];
temp += arr[i+464];
}
asm volatile (
"RDTSCP\n\t"
"mov %%edx, %0\n\t"
"mov %%eax, %1\n\t": "=r" (cycles_high1),
"=r" (cycles_low1)::"rax", "%rbx", "%rcx", "%rdx"
);
uint64_t start = ((uint64_t)cycles_high0 << 32) | cycles_low0;
uint64_t end = ((long)cycles_high1 << 32) | cycles_low1;
uint64_t total = end - start;
bw += (uint64_t)((SIZE*FREQ*pow(10, 9))/total);
}
free(arr);
return (uint64_t)bw/ITER;
}
//returns bandwidth in MBPS
uint64_t benchmarkWriteRamBandwidth(fun_ptr _ignore)
{
long size = (long)(SIZE * 1024 * 1024);
int temp = 1;
int *arr = (int *) malloc(size);
uint64_t bw = 0;
for (int i=0; i<ITER; i++) {
uint32_t cycles_high0, cycles_low0, cycles_low1, cycles_high1;
asm volatile (
"CPUID\n\t"
"RDTSC\n\t"
"mov %%edx, %0\n\t"
"mov %%eax, %1\n\t": "=r" (cycles_high0),
"=r" (cycles_low0)::"rax", "%rbx", "%rcx", "%rdx"
);
for (int i = 0; i < (size/sizeof(int))-480; i+=480)
{
arr[i] = temp;
arr[i+16] = temp;
arr[i+32] = temp;
arr[i+48] = temp;
arr[i+64] = temp;
arr[i+80] = temp;
arr[i+96] = temp;
arr[i+112] = temp;
arr[i+128] = temp;
arr[i+144] = temp;
arr[i+160] = temp;
arr[i+176] = temp;
arr[i+192] = temp;
arr[i+208] = temp;
arr[i+224] = temp;
arr[i+240] = temp;
arr[i+256] = temp;
arr[i+272] = temp;
arr[i+288] = temp;
arr[i+304] = temp;
arr[i+320] = temp;
arr[i+336] = temp;
arr[i+352] = temp;
arr[i+368] = temp;
arr[i+384] = temp;
arr[i+400] = temp;
arr[i+416] = temp;
arr[i+432] = temp;
arr[i+448] = temp;
arr[i+464] = temp;
}
asm volatile (
"RDTSCP\n\t"
"mov %%edx, %0\n\t"
"mov %%eax, %1\n\t": "=r" (cycles_high1),
"=r" (cycles_low1)::"rax", "%rbx", "%rcx", "%rdx"
);
uint64_t start = ((uint64_t)cycles_high0 << 32) | cycles_low0;
uint64_t end = ((uint64_t)cycles_high1 << 32) | cycles_low1;
uint64_t total = end - start;
bw += (uint64_t)((SIZE*FREQ*pow(10, 9))/total);
}
free(arr);
return (uint64_t)bw/ITER;
}