@@ -185,6 +185,8 @@ module issue_read_operands
185185 logic [ CVA6Cfg.NrIssuePorts- 1 : 0 ] rs3_raw_check;
186186 logic [ CVA6Cfg.NrIssuePorts- 1 : 0 ] rs3_has_raw;
187187 logic [ CVA6Cfg.NrIssuePorts- 1 : 0 ] rs3_fpr;
188+ // CVXIF rs3 is a gpr and has to be accessed
189+ logic [ CVA6Cfg.NrIssuePorts- 1 : 0 ] rs3_gpr_cvxif;
188190
189191
190192 logic [CVA6Cfg.NR_SB_ENTRIES - 1 : 0 ][ariane_pkg :: REG_ADDR_SIZE - 1 : 0 ] rd_list;
@@ -428,6 +430,8 @@ module issue_read_operands
428430 assign rs1_fpr[i] = (CVA6Cfg.FpPresent && ariane_pkg :: is_rs1_fpr (issue_instr_i[i].op));
429431 assign rs2_fpr[i] = (CVA6Cfg.FpPresent && ariane_pkg :: is_rs2_fpr (issue_instr_i[i].op));
430432 assign rs3_fpr[i] = (CVA6Cfg.FpPresent && ariane_pkg :: is_imm_fpr (issue_instr_i[i].op));
433+ assign rs3_gpr_cvxif[i] = CVA6Cfg.CvxifEn && (OPERANDS_PER_INSTR == 3 )
434+ && issue_instr_i[i].fu == CVXIF ;
431435 end
432436
433437 // ----------------------------------
@@ -485,7 +489,7 @@ module issue_read_operands
485489 .idx_o (idx_hzd_rs3[i]),
486490 .valid_o (rs3_raw_check[i])
487491 );
488- assign rs3_has_raw[i] = rs3_raw_check[i] && rs3_fpr[i];
492+ assign rs3_has_raw[i] = rs3_raw_check[i] && ( rs3_fpr[i] || rs3_gpr_cvxif[i]) ;
489493 end
490494
491495 // ----------------------------------
@@ -557,7 +561,7 @@ module issue_read_operands
557561 end
558562 end
559563
560- if (rs3_has_raw[i] && rs3_fpr[i] ) begin
564+ if (rs3_has_raw[i]) begin
561565 if (rs3_valid[i]) begin
562566 forward_rs3[i] = 1'b1 ;
563567 end else begin // the operand is not available -> stall
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