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target: add Ambiq Apollo3 target and NM180410 board support (#1632)
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‎pyocd/board/board_ids.py

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@@ -317,4 +317,5 @@ class BoardInfo(NamedTuple):
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"9906": BoardInfo( "micro:bit v2", "nrf52833", "microbitv2.bin", ),
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"C004": BoardInfo( "tinyK20", "k20d50m", "l1_k20d50m.bin", ),
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"C006": BoardInfo( "VBLUno51", "nrf51", "l1_nrf51.bin", ),
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"D000": BoardInfo( "NM180410", "ama3b1kk_kbr", "l1_ama3b1kk_kbr.bin", ),
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}

‎pyocd/debug/svd/data/apollo3.svd

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‎pyocd/target/builtin/__init__.py

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@@ -137,6 +137,7 @@
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from . import target_STM32H7B0xx
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from . import target_Air001
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from . import target_Air32F103xx
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from . import target_AMA3B1KK
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## @brief Dictionary of all builtin targets.
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#
@@ -318,4 +319,5 @@
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'air32f103xp': target_Air32F103xx.Air32F103xP,
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'air32f103xe': target_Air32F103xx.Air32F103xE,
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'air32f103xg': target_Air32F103xx.Air32F103xG,
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'ama3b1kk_kbr': target_AMA3B1KK.AMA3B1KK_KBR,
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}

‎pyocd/target/builtin/target_AMA3B1KK.py

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# pyOCD debugger
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# Copyright (c) 2023 Northern Mechatronics, Inc.
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# SPDX-License-Identifier: Apache-2.0
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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import logging
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from ...core import exceptions
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from ...core.memory_map import (FlashRegion, RamRegion, MemoryMap)
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from ...coresight.coresight_target import CoreSightTarget
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from ...debug.svd.loader import SVDFile
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from ..family.target_ama3b import AMA3BFamily
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LOG = logging.getLogger(__name__)
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FLASH_ALGO = {
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'load_address' : 0x10000000,
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# Flash algorithm as a hex string
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'instructions': [
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0xE00ABE00, 0x062D780D, 0x24084068, 0xD3000040, 0x1E644058, 0x1C49D1FA, 0x2A001E52, 0x4770D1F2,
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0x2040f04f, 0x61812147, 0x61412100, 0x46086181, 0x20004770, 0xe92d4770, 0x4e3341f0, 0x4f332500,
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0x444e2406, 0x68734622, 0x46382100, 0x43054798, 0x2c401c64, 0x6832dbf6, 0x46382101, 0x43284790,
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0x81f0e8bd, 0x0cc1b510, 0x2101d000, 0x444a4a26, 0xf3c06853, 0x48253245, 0x28004798, 0x2001d000,
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0xe92dbd10, 0x460747f0, 0x07884616, 0x2001d000, 0x0491eb00, 0x8070f8df, 0x0006ea47, 0xa06cf8df,
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0x44c80780, 0x2000d025, 0xf5b4e01f, 0xd2017f00, 0xe00100a5, 0x6500f44f, 0x20004915, 0xe0044449,
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0x2b01f816, 0x2b01f801, 0x42a81c40, 0x4910d3f8, 0xc008f8d8, 0xf02708ab, 0x44490203, 0x47e04650,
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0xd1042800, 0x0495eba4, 0x2c00442f, 0xe8bdd1dd, 0xf8d887f0, 0x46235008, 0x4631463a, 0x46ac4650,
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0x47f0e8bd, 0x00004760, 0x00000004, 0x12344321, 0x00000024, 0x00000000, 0x0800004d, 0x08000051,
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0x08000055, 0x08000059, 0x0800005d, 0x08000061, 0x08000065, 0x08000069, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
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],
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# Relative function addresses
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'pc_init': 0x10000021,
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'pc_unInit': 0x10000033,
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'pc_program_page': 0x10000083,
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'pc_erase_sector': 0x10000065,
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'pc_eraseAll': 0x10000037,
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'static_base' : 0x10000000 + 0x00000020 + 0x000000F4,
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'begin_stack' : 0x10000400,
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'begin_data' : 0x10000000 + 0x1000,
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'page_size' : 0x2000,
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'analyzer_supported' : False,
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'analyzer_address' : 0x00000000,
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'page_buffers' : [0x10001000, 0x10003000], # Enable double buffering
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'min_program_length' : 0x2000,
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# Flash information
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'flash_start': 0xC000,
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'flash_size': 0xF4000,
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'sector_sizes': (
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(0x0, 0x2000),
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)
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}
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class AMA3B1KK_KBR(CoreSightTarget):
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VENDOR = "Ambiq Micro"
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MEMORY_MAP = MemoryMap(
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FlashRegion(name='flash', start=0x0000C000, length=0x000F4000, access='rx',
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page_size=0x2000,
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sector_size=0x2000,
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is_boot_memory=True,
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algo=FLASH_ALGO),
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RamRegion( name='sram', start=0x10000000, length=0x00060000, access='rwx')
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)
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CortexM_Core = AMA3BFamily
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def __init__(self, link):
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super().__init__(link, self.MEMORY_MAP)
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self._svd_location = SVDFile.from_builtin("apollo3.svd")
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def create_init_sequence(self):
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seq = super().create_init_sequence()
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seq.wrap_task('discovery',
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lambda seq: seq.replace_task('create_cores', self.create_cores)
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)
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return seq
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def create_cores(self):
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try:
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core = self.CortexM_Core(self.session, self.aps[0], self.memory_map, 0)
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core.default_reset_type = self.ResetType.SW_SYSRESETREQ
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self.aps[0].core = core
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core.init()
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self.add_core(core)
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except exceptions.Error:
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LOG.error("No Apollo3 Core found")

‎pyocd/target/family/target_ama3b.py

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# pyOCD debugger
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# Copyright (c) 2023 Northern Mechatronics, Inc.
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# SPDX-License-Identifier: Apache-2.0
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
15+
# limitations under the License.
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17+
import logging
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from ...coresight.cortex_m import CortexM
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LOG = logging.getLogger(__name__)
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class AMA3BFamily(CortexM):
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REG_MCU_CTRL_BOOTLOADER = 0x400201A0
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REG_MCU_CTRL_SCRATCH0 = 0x400201B0
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def set_reset_catch(self, reset_type=None):
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# If Debugger Support is disabled by the SDBG bit in INFO0_SECURITY,
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# The least significant bit of register REG_MCU_CTRL_SCRATCH0 must be
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# set to indicate that a halt is requested by the debugger after
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# primary boot.
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#
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# Refer to document A-SOCA3B-UGGA02EN for more details.
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# Check the REG_MCU_CTRL_BOOTLOADER register to see if secure boot
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# is enabled for:
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# bit 31:30 warm reset
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# bit 29:28 cold reset
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# bit 27:26 secure boot feature enabled
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secure_boot = False
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reg_bootloader = self.read_memory(self.REG_MCU_CTRL_BOOTLOADER)
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if (reg_bootloader & 0xFC000000):
43+
secure_boot = True
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LOG.debug("AMA3B Secure Boot: %x" % secure_boot)
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if(secure_boot is True):
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# Modify only the least significant bit and preserve the scratch
48+
# register as it could be used by the application firmware.
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reg_scratch0 = self.read_memory(self.REG_MCU_CTRL_SCRATCH0) | 0x01
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self.write_memory(self.REG_MCU_CTRL_SCRATCH0, reg_scratch0)
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else:
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LOG.debug("normal_set_reset_catch")
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super().set_reset_catch(reset_type)

‎test/data/binaries/l1_ama3b1kk_kbr.bin

16.3 KB
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