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This repository was archived by the owner on Nov 4, 2024. It is now read-only.
Copy file name to clipboardExpand all lines: docs/source/cgf.rst
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@@ -376,13 +376,16 @@ A covergroup contains the following nodes:
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This string is divided into three parts - opcode list, assign list and condition list separated by :: symbol. It is parsed and all the three lists are obtained separately. The variables available for use in the expression are as follows:
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* ``instr_name`` : The instruction names in the opcode list
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* ``instruction_alias``: The instruction alias for a set of instructions as defined in ``/riscv_isac/data/instr_alias.yaml``
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* ``rs1`` : The register number of source register 1 of the current instruction in the assign list.
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* ``rs2`` : The register number of source register 2 of the current instruction in the assign list.
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* ``rd`` : The register number of destination register of the current instruction in the assign list.
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Instruction aliases when used will be expanded into a tuple of instruction under the given alias.
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Along with the above mentioned variable any valid python comparison operators can be used in the condition list.
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@@ -401,7 +404,7 @@ A covergroup contains the following nodes:
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.. code-block:: python
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[(add,sub) : ? : (add,sub) ] :: [a=rd : ? : ? ] :: [rd==x10 : rd!=a and rs1!=a and rs2!=a : rs1==a or rs2==a ]
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[(add,sub) : rv32i_arith : (add,sub) ] :: [a=rd : ? : ? ] :: [rd==x10 : rd!=a and rs1!=a and rs2!=a : rs1==a or rs2==a ]
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3. WAW for an add instruction followed by a subtract instruction with 3 non-consuming instructions in between.
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