F4 GPIO

Author: burrbull

.vscode/settings.json

@@ -1,8 +1,6 @@
 {
   "rust-analyzer.check.allTargets": false,
-  "rust-analyzer.check.extraArgs": [
-    "--examples",
-  ],
+  "rust-analyzer.check.extraArgs": ["--examples"],
   "rust-analyzer.cargo.target": "thumbv7em-none-eabihf",
   "rust-analyzer.cargo.features": [
     "stm32g484",

Cargo.toml

@@ -80,19 +80,225 @@ rt = ["stm32g4/rt"]
 usb = ["dep:stm32-usbd"]
 stm32g431 = ["stm32g4/stm32g431", "cat2"]
 stm32g441 = ["stm32g4/stm32g441", "cat2"]
-stm32g473 = ["stm32g4/stm32g473", "cat3", "adc3", "adc4", "adc5"]
-stm32g474 = ["stm32g4/stm32g474", "cat3", "adc3", "adc4", "adc5"]
-stm32g483 = ["stm32g4/stm32g483", "cat3", "adc3", "adc4", "adc5"]
-stm32g484 = ["stm32g4/stm32g484", "cat3", "adc3", "adc4", "adc5"]
-stm32g491 = ["stm32g4/stm32g491", "cat4", "adc3"]
-stm32g4a1 = ["stm32g4/stm32g4a1", "cat4", "adc3"]
+stm32g473 = ["stm32g4/stm32g473", "cat3"]
+stm32g474 = ["stm32g4/stm32g474", "cat3"]
+stm32g483 = ["stm32g4/stm32g483", "cat3"]
+stm32g484 = ["stm32g4/stm32g484", "cat3"]
+stm32g491 = ["stm32g4/stm32g491", "cat4"]
+stm32g4a1 = ["stm32g4/stm32g4a1", "cat4"]
 
+gpio-g43x = [
+    "comp1",
+    "comp2",
+    "comp3",
+    "comp4",
+    "crs",
+    "fdcan1",
+    "gpioa",
+    "gpiob",
+    "gpioc",
+    "gpiod",
+    "gpioe",
+    "gpiof",
+    "gpiog",
+    "i2c1",
+    "i2c2",
+    "i2c3",
+    "i2s",
+    "i2s2",
+    "i2s3",
+    "ir",
+    "lptim1",
+    "lpuart1",
+    "rcc",
+    "rtc",
+    "sai1",
+    "spi1",
+    "spi2",
+    "spi3",
+    "sys",
+    "tim1",
+    "tim15",
+    "tim16",
+    "tim17",
+    "tim2",
+    "tim3",
+    "tim4",
+    "tim8",
+    "uart4",
+    "ucpd1",
+    "usart1",
+    "usart2",
+    "usart3",
+]
+gpio-g47x = [
+    "adc3",
+    "adc4",
+    "adc5",
+    "comp1",
+    "comp2",
+    "comp3",
+    "comp4",
+    "comp5",
+    "comp6",
+    "comp7",
+    "crs",
+    "fdcan1",
+    "fdcan2",
+    "fdcan3",
+    "fmc",
+    "gpioa",
+    "gpiob",
+    "gpioc",
+    "gpiod",
+    "gpioe",
+    "gpiof",
+    "gpiog",
+    "hrtim1",
+    "i2c1",
+    "i2c2",
+    "i2c3",
+    "i2c4",
+    "i2s",
+    "i2s2",
+    "i2s3",
+    "ir",
+    "lptim1",
+    "lpuart1",
+    "quadspi1",
+    "rcc",
+    "rtc",
+    "sai1",
+    "spi1",
+    "spi2",
+    "spi3",
+    "spi4",
+    "sys",
+    "tim1",
+    "tim15",
+    "tim16",
+    "tim17",
+    "tim2",
+    "tim20",
+    "tim3",
+    "tim4",
+    "tim5",
+    "tim8",
+    "uart4",
+    "uart5",
+    "ucpd1",
+    "usart1",
+    "usart2",
+    "usart3",
+]
+gpio-g49x = [
+    "adc3",
+    "comp1",
+    "comp2",
+    "comp3",
+    "comp4",
+    "crs",
+    "fdcan1",
+    "fdcan2",
+    "gpioa",
+    "gpiob",
+    "gpioc",
+    "gpiod",
+    "gpioe",
+    "gpiof",
+    "gpiog",
+    "i2c1",
+    "i2c2",
+    "i2c3",
+    "i2s",
+    "i2s2",
+    "i2s3",
+    "ir",
+    "lptim1",
+    "lpuart1",
+    "quadspi1",
+    "rcc",
+    "rtc",
+    "sai1",
+    "spi1",
+    "spi2",
+    "spi3",
+    "sys",
+    "tim1",
+    "tim15",
+    "tim16",
+    "tim17",
+    "tim2",
+    "tim20",
+    "tim3",
+    "tim4",
+    "tim8",
+    "uart4",
+    "uart5",
+    "ucpd1",
+    "usart1",
+    "usart2",
+    "usart3",
+]
 
-gpio-g43x = []
-
-gpio-g47x = []
-
-gpio-g49x = []
+adc3 = []
+adc4 = []
+adc5 = []
+comp1 = []
+comp2 = []
+comp3 = []
+comp4 = []
+comp5 = []
+comp6 = []
+comp7 = []
+crs = []
+fdcan1 = []
+fdcan2 = []
+fdcan3 = []
+fmc = []
+gpioa = []
+gpiob = []
+gpioc = []
+gpiod = []
+gpioe = []
+gpiof = []
+gpiog = []
+hrtim1 = []
+i2c1 = []
+i2c2 = []
+i2c3 = []
+i2c4 = []
+i2s = []
+i2s2 = []
+i2s3 = []
+ir = []
+lptim1 = []
+lpuart1 = []
+quadspi1 = []
+rcc = []
+rtc = []
+sai1 = []
+spi1 = []
+spi2 = []
+spi3 = []
+spi4 = []
+sys = []
+tim1 = []
+tim15 = []
+tim16 = []
+tim17 = []
+tim2 = []
+tim20 = []
+tim3 = []
+tim4 = []
+tim5 = []
+tim8 = []
+uart4 = []
+uart5 = []
+ucpd1 = []
+usart1 = []
+usart2 = []
+usart3 = []
 
 log-itm = ["cortex-m-log/itm"]
 log-rtt = []
@@ -106,9 +312,6 @@ defmt = [
     "embedded-io/defmt-03",
 ]
 cordic = ["dep:fixed"]
-adc3 = []
-adc4 = []
-adc5 = []
 
 # Device category
 cat2 = ["gpio-g43x"]

examples/i2c.rs

@@ -22,12 +22,13 @@ fn main() -> ! {
     let mut rcc = dp.RCC.constrain();
     let gpiob = dp.GPIOB.split(&mut rcc);
 
-    let sda = gpiob.pb9.into_alternate_open_drain();
-    let scl = gpiob.pb8.into_alternate_open_drain();
+    let sda = gpiob.pb9;
+    let scl = gpiob.pb8;
 
     let mut i2c = dp.I2C1.i2c(sda, scl, 40.kHz(), &mut rcc);
     // Alternatively, it is possible to specify the exact timing as follows (see the documentation
     // of with_timing() for an explanation of the constant):
+    //use hal::i2c::Config;
     //let mut i2c = dp
     //  .I2C1
     //   .i2c(sda, scl, Config::with_timing(0x3042_0f13), &mut rcc);

examples/spi-dma.rs

@@ -6,7 +6,6 @@
 
 use crate::hal::{
     delay::DelayFromCountDownTimer,
-    gpio::{AF5, PA5, PA6, PA7},
     prelude::*,
     pwr::PwrExt,
     rcc::Config,
@@ -40,9 +39,9 @@ fn main() -> ! {
     let mut delay_tim2 = DelayFromCountDownTimer::new(timer2.start_count_down(100.millis()));
 
     let gpioa = dp.GPIOA.split(&mut rcc);
-    let sclk: PA5<AF5> = gpioa.pa5.into_alternate();
-    let miso: PA6<AF5> = gpioa.pa6.into_alternate();
-    let mosi: PA7<AF5> = gpioa.pa7.into_alternate();
+    let sclk = gpioa.pa5;
+    let miso = gpioa.pa6;
+    let mosi = gpioa.pa7;
 
     let spi = dp
         .SPI1

src/gpio.rs

@@ -58,6 +58,7 @@ use core::marker::PhantomData;
 
 use crate::pac;
 use crate::rcc::Rcc;
+pub mod alt;
 mod convert;
 pub use convert::PinMode;
 mod partially_erased;
@@ -172,6 +173,8 @@ pub(crate) mod marker {
     /// Marker trait for active pin modes
     pub trait Active {}
     /// Marker trait for all pin modes except alternate
+    pub trait NotAlt {}
+    /// Marker trait for pins with alternate function `A` mapping
     pub trait IntoAf<const A: u8> {}
 }
 
@@ -186,6 +189,9 @@ impl<Otype> marker::OutputSpeed for Output<Otype> {}
 impl<const A: u8, Otype> marker::OutputSpeed for Alternate<A, Otype> {}
 impl<Otype> marker::Active for Output<Otype> {}
 impl<const A: u8, Otype> marker::Active for Alternate<A, Otype> {}
+impl marker::NotAlt for Input {}
+impl<Otype> marker::NotAlt for Output<Otype> {}
+impl marker::NotAlt for Analog {}
 
 /// GPIO Pin speed selection
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -623,9 +629,13 @@ const fn gpiox<const P: char>() -> *const crate::pac::gpioa::RegisterBlock {
         'A' => crate::pac::GPIOA::ptr(),
         'B' => crate::pac::GPIOB::ptr() as _,
         'C' => crate::pac::GPIOC::ptr() as _,
+        #[cfg(feature = "gpiod")]
         'D' => crate::pac::GPIOD::ptr() as _,
+        #[cfg(feature = "gpioe")]
         'E' => crate::pac::GPIOE::ptr() as _,
+        #[cfg(feature = "gpiof")]
         'F' => crate::pac::GPIOF::ptr() as _,
+        #[cfg(feature = "gpiog")]
         'G' => crate::pac::GPIOG::ptr() as _,
         _ => panic!("Unknown GPIO port"),
     }